KR100392817B1 - Parallel inverse multiplexing method and system for large capacity switching - Google Patents

Abstract

1. Technical field to which the invention described in the claims belongs

The present invention relates to a parallel demultiplexing system, method and computer record carrier for a large capacity switching system.

2. Technical problem to be solved by the invention

The present invention provides a fast parallel demultiplexing system and method for rearranging a plurality of cells or packets within a limited delay time to increase transmission capacity and improve fault tolerance while using a plurality of detailed paths (or planes), and to implement the same. To provide a computer-readable recording medium that records a program to do so.

3. Summary of Solution to Invention

The parallel demultiplexing system of the present invention comprises a cell distribution unit for connecting digital transmission data to a tree structure in a tree structure and using a predetermined tree traversal method to divide and transmit the data in parallel to detailed paths corresponding to each cell, and a cell having the tree structure. And a cell reassembly unit for reassembling in parallel by searching for the tree traversal method.

4. Important uses of the invention

The present invention is used in a large-capacity switching system using a plurality of low-capacity detailed paths such as demultiplexing of ATM AAL layer and parallel multiple-plane switching system.

Description

PARALLEL INVERSE MULTIPLEXING METHOD AND SYSTEM FOR LARGE CAPACITY SWITCHING

The present invention relates to a parallel demultiplexing system for a large-capacity switching system, and more particularly, by connecting cells in a tree structure and distributing them into detailed paths to be transmitted to each cell, and transmitting and reconfiguring the cells through a plurality of detailed paths. A demultiplexing system, method, and computer program product for implementing the same are described.

In general, demultiplexing technology is a low-bandwidth transmission and switching system that implements a wider bandwidth system. The process of transmitting a cell or packet by distributing transmission data into a plurality of subpaths. And reassembling the transmitted cells or packets in order.

Such demultiplexing technologies include multilink point-to-point protocol (MP), parallel ATM switches, packet striping, channel aggregation method for video conferencing (CITT H.221), inverse multiplexing for ATM (IMA), and SCIMA. (switched connection inverse multiplexing for ATM) and advanced frame recovery (AFR) are used.

Recently, demultiplexing studies using multiple switching planes (or detailed paths) have been actively conducted to increase transmission capacity of switching systems. However, since demultiplexing transmits a given transmission data in a plurality of different detailed paths, there has been a problem that a large cell delay variation (CDV) phenomenon with different transmission times occurs according to each detailed path.

In order to solve this problem, U.S. Patent No. 5,875,192 proposes a synchronous demultiplexing system that transmits point-to-point data streams round-robin once over multiple physical links. have. This demultiplexing system inserts a separate ICP (IMA control protocol) with information to reconstruct the cell order into each IMA frame and transmits it, and then adjusts the link delay time and link state by detecting the arrival time at each receiver. The transmitter adopts a method of inserting an SCell in order to maintain the speed between cell layers in an IMA frame when continuously transmitting cells. However, the IMA has a problem in that cell reassembly is impossible when bandwidth is wasted due to the addition of an ICP cell and an S cell, and an unpredictable massive cell delay variation between each detailed path link occurs.

On the other hand, according to the SCIMA (switched connection inverse multiplexing for ATM) proposed by the IEEE (Globecom '98 conference, Generalized Inverse Multiplexing of Switched ATM Connections, P 3134-3140, Fabio M Chiussi, etc.) in 1998, a new asynchronous demultiplexing The system recovers the cell order for each virtual path (VC), and predicts by constructing a linked list using the order value of each subpath and the detailed path of the next cell to be transmitted instead of the order value between cells. Even if a large cell delay time variation (CDV) between virtual paths that do not occur occurs, the cell order can be efficiently recovered. Furthermore, the circuit execution time or circuit area is shorter than that of the IMA disclosed in US Pat. No. 5,875,192, and an additional cell is not inserted. There is an advantage to not need. However, SCIMA has a problem in that cell order cannot be recovered when cells are lost continuously.

In order to solve the SCIMA cell recovery problem, the IEEE 1999 paper (Proc.Int'l Conf. On ATM'99, P 404-412, Fabio M. Chiussi et al.) Has an advanced frame recovery (AFR) demultiplexing system. Proposed. According to the demultiplexing system, a solution for continuous cell loss is proposed by discarding a cell in a frame in which cell loss occurs and recovering a cell from a next frame. However, the existing SCIMA provides a solution for reassembling N transmitted cells. The problem that O (N) takes time is not overcome.

In other words, the cell transmission time determines the reassembly time. The current high speed ATM switching system has a constraint that the transmission delay time of the cell must be performed within 8-16 clocks under 160ns. The multiplexing system is also limited to the minimum O (N) time to process N ordered cells in the case of k switching planes, so it cannot be implemented within the cell transmission delay time in 8-16 plane demultiplexing switching systems. .

In addition, in order to increase the capacity of the switching system, a means of increasing the transmission speed of each port or increasing the number of ports of the switch has been studied, but this has been limited by the constraints such as the delay time and the area of the circuit.

Therefore, in the art, a high speed parallel cell distribution unit and reassembly unit that realigns a plurality of cells or packets within a limited delay time while using a plurality of detailed paths (or planes) to increase transmission capacity and improve fault tolerance is provided. There is a need for an efficient demultiplexing system.

In order to solve the problems described above, the present invention connects cells, which are input data, in a tree structure, distributes them in parallel to detailed paths to be transmitted to each cell by using a tree traversal method, and cell headers. A demultiplexing system and method for implementing high-speed mass communication by inserting a link indicating a detailed path of a next cell to be transmitted in a plurality of detailed paths and then reconfiguring them in parallel to a computer that stores a program for realizing the same. It is an object of the present invention to provide a readable recording medium.

In addition, another object of the present invention is to omit at least one or more of the links indicating the detailed path number to be transmitted of the next cell inserted in the cell header, and to omit the omitted link based on the detailed path distribution scheme and the cell identifier (ID). To provide a demultiplexing system and method for calculating and reconfiguring a cell to be transmitted.

1 is a block diagram of a parallel demultiplexing system according to an embodiment of the present invention.

2 (a) is a cell flow diagram of a conventional demultiplexing system.

Figure 2 (b) is a cell flow diagram of the demultiplexing system according to the present invention.

Figure 3 is a cell header format comparison of the conventional demultiplexing system and the demultiplexing system of the present invention.

4 is a cell flow comparison diagram implemented in the conventional demultiplexing system and the demultiplexing system of the present invention.

5 (a) to 5 (c) are diagrams illustrating embodiments of cell tree distribution and transmission according to various tree traversal methods that can be implemented in the present invention.

6 (a) and 6 (b) are exemplary structural diagrams of a cell tree implemented in the present invention.

7 is a cell distribution structure diagram of an embodiment according to the present invention;

8 (a) to 8 (c) are diagrams showing the operation of the detailed route distribution means employable in the present invention.

9 is an operational diagram of the binary tree two-parallel cell assembly of the present invention.

Figure 10 is one embodiment of a binary tree two-parallel cell assembly of the present invention.

11 is an operational diagram of the binary tree k-parallel cell assembly of the present invention.

12 is a cell flow diagram implemented in another embodiment of the present invention.

Figure 13 is a cell header format structure diagram embodied in another embodiment of the present invention.

14 is an exemplary structural diagram of a cell reassembly implemented in another embodiment of the present invention.

Figure 15 is a cell tree structure diagram implemented in another embodiment of the present invention.

<Code Description of Main Parts of Drawing>

210: parallel cell distribution unit 211: cell distribution input queue

212: cell distribution means 213: load adjusting means

214: Output queue for each detailed path 220: Parallel cell reassembly

221: cell reassembly output queue 222: input queue for each detailed path

According to the present invention for achieving the above object, in a parallel demultiplexing system, after splitting the input data into cells, and connected in a multi-tree structure rooted by a leader cell (tree), a predetermined tree traversal method (tree traversal) A cell distribution unit for distributing each cell in parallel to the detailed paths to be transmitted by using the C-bit, and adding a link indicating the detailed path of the next cell to be transmitted to the cell header and transmitting the detailed paths to each of the distributed detailed paths; Storing a cell transmitted from each subpath as a cell queue for each subpath, and analyzing the link indicating the subpath of the cell to be transmitted after adding the stored cell queue to each cell header using the predetermined tree traversal method; The cell is recursively reassembled in parallel according to the analyzed result, and a cell reassembly unit for transmitting the reassembled cells.

According to another aspect of the present invention, there is provided a parallel demultiplexing method comprising: a first step of dividing input data into cells and then connecting a multi-tree structure having a leader cell as a root; A second step of distributing the cells connected in the tree structure in a detailed path to which each cell is to be transmitted using a predetermined tree traversal method; Adding a link indicating a detailed path of a cell to be transmitted next to the cell header according to the distributed result; Transmitting the cell in each of the distributed detailed paths; A fifth step of analyzing the received cell by using the predetermined tree traversal method, a link indicating a cell order within a detailed path to be transmitted added to each cell header and a detailed path to a next transmitted cell; According to the analysis result, it characterized in that the sixth step of reassembly the cells recursively parallel.

Furthermore, the present invention distributes an input cell queue and transmits it to a plurality of detailed paths, and in a demultiplexing system for reassembling the transmitted cell, a multi-tree in which the input cell queue is routed as a leader cell. The ability to connect into a structure; Distributing the cells connected in the tree structure in parallel to the detailed paths to which each cell is to be transmitted using a predetermined tree traversal method; Adding a link indicating a detailed path of a next transmission cell to the cell header according to the distributed result; Transmitting the cell in each of the distributed detailed paths; A function of analyzing a link indicating a detailed path to a cell to be transmitted after the received cell is added to each cell header from the leader cell by using the tree traversal method; According to the analyzed result, a computer-readable recording medium having stored thereon a program for realizing a function of reassembling the cells recursively is provided. In addition, the method may be implemented as a hardware device such as a logic circuit, a semiconductor device, and a main board.

EMBODIMENT OF THE INVENTION Hereinafter, with reference to drawings, preferred embodiment of this invention is described in detail.

1 is a structural diagram of a parallel demultiplexing system 200 according to an embodiment of the present invention. The parallel demultiplexing system includes a parallel cell distribution unit 210 and a parallel cell reassembly unit 220, and the parallel cell distribution unit 210 and the parallel cell reassembly unit 220 have multiple (k) detailed paths ( Or switching plane).

The parallel cell dividing unit 210 includes an input queue 211 for storing data received for each port and a cell distribution means 212 for distributing cells stored in the input queue 211 in a detailed path for transmitting each cell; A load adjustment means 213 for determining and adjusting the load level of the detailed path of the cell to be transmitted and an output queue for each detailed path 214 for storing the cell according to the distributed detailed path and transmitting the detailed path. . In addition, the cell reassembly 220 reassembles in parallel the cells stored in the sub-path input queue 223 and the sub-path input queue 223 for storing the cell queue transmitted by the detail path in parallel. The assembly means 222 and the output queue 221 for storing the reassembled cell queue and output to the other port.

In particular, the cell distributing means 212 connects cells in a multi-tree form (M-way tree or M-ary tree) using a leader cell as a root and uses a predetermined tree traversal method. And distributes the detailed paths to be transmitted to each cell, and inserts a link indicating a cell sequence within the detailed path to be transmitted to the cell header and the detailed path of the next cell to be transmitted. Meanwhile, the cell reassembly means 222 reassembles the cells input for each detailed path in the same manner as the tree traversal method. Here, the tree traversal method refers to a method of visiting all node points on the tree in a certain order.

One of the main features of the present invention is to connect cells in a tree structure to implement cell distribution and reconfiguration. 2 (a) and 2 (b) are SCIMA (Switched Connection IMA), which is an demultiplexing system that improves the existing inverse multiplexing for ATM (IMA), and a cell flow chart of the present invention, respectively. Referring to FIG. 2 (a), it can be seen that in SCIMA, the flow of cells is transmitted in the form of a linked list. On the contrary, in the present invention, the cells are connected in the form of a tree rooted by the lead cell 351, such as the binary tree shown in FIG. Thus, it is possible to simultaneously distribute and assemble more cells than SCIMA. That is, in the cell distributing means and the cell reassembling means of the present invention, unlike the SCIMA, the descendant cells of the leader cell can be simultaneously distributed and reconfigured in detail. In addition, cells simultaneously transmitted in detail paths can be rearranged and reassembled in parallel at the same time. Therefore, in the present invention, not only the memory location and the circuit area of the SCIMA can be implemented, but also can be implemented at high speed.

The term 'multiple tree' used in the present invention refers to a tree in which an internal node of the tree has one parent and M descendants, and a leaf node has one parent and M descendants or less. Each node is composed of cells.

In addition, the present invention provides a header format of a new cell to efficiently implement a method of allocating and reassembling cells in a tree structure. 3 is a diagram illustrating a cell header format according to an embodiment of the present invention compared with the cell header format of another conventional demultiplexing system. Here, each bit is included when the maximum frame sequence number is F, the number of detailed paths of the demultiplexing system is K, and the maximum cell sequence number is M.

Referring to FIG. 3, the cell header format of the conventional SCIMA includes a split ID, a sequence number, a next subpath of a next transmitting cell, and a detailed path of a next transmitting cell of a preceding cell. next subpath). In this case, in case of continuous cell loss, the cell header format employed in the AFR (Advanced Frame Recovery) demultiplexing system is used to replace the cell type and frame instead of the split ID in the SCIMA cell header format. The sequence number is inserted.

In contrast, the cell header format of the present invention exemplifies a header format of a binary tree structure, and additionally inserts detailed path information for the left link and the right link for the cell. Therefore, in the present invention, the cell can be simultaneously distributed in detail paths, and the header information can be analyzed to reconstruct both links simultaneously.

In addition, in the present invention, whether or not a cell is lost can be verified by confirming a cell sequence in a detailed path in a cell header. If it is confirmed that the cell is lost, it is possible to recover the descendant cell for the cell identified as lost using the detailed path of the next transmission cell of the preceding cell.

4 is a cell flow diagram of a conventional demultiplexing system and the present invention. Figure 4 illustrates the transmission by each demultiplexing system in four detailed paths to aid in the understanding of the present invention. Referring to FIG. 4, when recovering the 11 cells in order of cells, at least 10 steps of links are restored in order, but in the case of cells connected to a binary tree according to an embodiment of the present invention, only up to 3 steps of link recovery is possible. You can see that. Therefore, the cell transmission delay time is also O (N) in the case of SCIMA, it can be reduced to O (logN) in the present invention.

In addition, the tree traversal method used for distributing and reassembling the detailed paths to be transmitted to the cells connected in the tree structure may apply various tree traversal methods well known in the art. For example, breadth first search and depth first search, as well as preorder traversal, inorder traversal, postorder traversal, and symmetric traversal (for example, breadth first search and depth first search). Known tree traversal methods such as symmetric traversal) can be applied to the present invention. However, the conditions under which the method adopted for distributing the detailed paths should be equally applied in the reassembly process.

Hereinafter, detailed path distribution, transmission, and reassembly according to various tree traversal methods will be described in detail. 5 (a) to 5 (c) show distribution and transmission processes according to various tree traversal methods.

Referring to FIG. 5 (a), a process of distributing cells by a potential traversal method of first visiting the root node of the cell tree and then visiting the left subtree and the right subtree is illustrated. The process of distributing cells is performed by traversing the left subtree first, then the right subtree, and the traversal method that visits the root node. Finally, FIG. 5 (c) distributes the detailed paths to each cell by first visiting the left partial tree for the root node and then visiting the right partial tree with respect to the root node by the median traversal method. In addition to the above-mentioned traversal method, the reverse preorder traversal, the reverse inorder traversal, and the reverse postorder traversal are also applicable to the present invention by visiting the tree on the right side first. .

As described above, the present invention selects one of the tree traversal methods described above, distributes the detailed paths, transmits them, and receives them to reconstruct the tree traversal method selected in the distribution process. However, if the tree traversal method is different from the breadth-first search method, all cells must wait until the detailed path input queue 223 arrives, so that the larger capacity in the breadth-first search that can store all the cells to be sorted is required. Buffer memory is required. For this reason, the breadth-first search method transmits the cells sequentially and transmits them to the later system during the reassembly process without waiting for all the cells to arrive, whereas other tree traversal methods do not transmit and sort the cells sequentially. Because it is not. Therefore, in the present invention, it is preferable to distribute cells by the breadth-first search method because a buffer memory having a smaller capacity can be used than other tree traversal methods.

Hereinafter, the operation and implementation method of the main components of the present invention in detail for a full understanding of the present invention. In addition, the embodiment described below will be described as an example of applying the breadth-first search method unless otherwise specified.

6 (a) and 6 (b) show a binary cell tree structure and a multi-tree structure employed in the demultiplexing system according to the present invention. Referring to FIG. 6 (a), it can be seen that the tree cells are connected in the order inputted from the leader cell 351. The parallel cell distribution means is configured to distribute cells in parallel by arranging the cells in a tree structure using breadth-first search. An example of an algorithm using breadth-first search (BFS) implemented in such cell distribution means is as follows.

BFS (leader) {

init local Queue, q, to empty

Enqueue (leader)

While (q is not empty)) {

v = Dequeue (q)

v-> plane = get_plane ();

Enqueue (children of v);

send v through plane v-> plane;

}

Fig. 6 (b) shows a multi-tree structure of a cell, in which a tree structure is formed using a leader cell as a root. An example of an algorithm using breadth-first search (BFS) to implement parallel cell distribution means for a multi-tree structure is as follows. However, the algorithm below assumes that there are k switching planes (or subpaths).

BFS (leader) {

init local VC Queue, q, to empty

v-> plane = get_plane ();

Enqueue (leader)

While (q is not empty)) {

for (k = 0; k <#planes; k ++) {/ * in parallel * /

v _k = Dequeue (q)

v _k- >right-> plane = get_plane ();

v _k- >left-> plane = get_plane ();

Enqueue (children of v);

send v _k through plane v _k- >plane;

}

}

According to the cell distribution means implemented as described above, the delay time can be reduced to O (logN) level compared with O (N) which is a delay time of the conventional SCIMA.

Figure 7 shows one embodiment of a parallel cell distribution unit 210 employing a binary tree. Referring to FIG. 7, an exemplary embodiment of the output queue 214 for each detailed path is shown. Here, the part indicated by M (K _l , K _r ) in the output queue for each detailed path means a bit inserted in each cell header, M is a cell order, K _l , K _r are left link and right link, That is, the detail path number of the left progeny cell and the detail path number of the right progeny cell are shown.

Referring to FIG. 7, a process of converting an input queue 211 from an output queue 214 for each detailed path by the cell distribution operation of the cell distribution unit 210 may be seen. First, the cell distribution unit distributes the detailed paths P0 to the leader cells of the cell discriminator 1, which are input to the input queue, and then the detailed paths P1 and P2 to which the cells 2 and 3 to be transmitted are input. Insert it into the header of the leader cell. In this way ten cells can be distributed over a maximum of four stages.

The parallel cell distribution unit 210 of the present invention may adopt various path distribution means of various forms. For example, there may be fully-associative mapping, direct mapping, and some set-associative mapping.

8 is an example of the detailed path distribution means employable in the present invention. 8 (a) may implement a parallel cell distribution unit capable of allocating all the detailed paths 130 to the total combination mapping means 710. In addition, FIG. 8 (b) may be implemented in a manner of distributing only specific paths according to characteristics of a cell directly input to the mapping means 720. As shown in FIG. 8 (c), some combination mapping means 730 is provided. It can be implemented to implement as a subset of the subset of the detailed path to the characteristics of the input cell. It will be appreciated by those of ordinary skill in the art that the above means may be implemented by adopting only one, but may be implemented by combining two or more thereof.

Hereinafter, the cell reassembly means 222 of the demultiplexing system according to an embodiment of the present invention will be described. The cell reassembling means 222 may reassemble the cell by a process of searching the cell transmission tree structure as shown in FIG. 6 from the root to the top down breadth-first search. The breadth-first means of traversing the tree structure from the root downwards can be implemented using a simple FIFO queue. Other depth-first search means can be implemented using stacks, and other search means can be implemented using similar data structures. The following is an example of an algorithm for implementing the cell reassembly means 222 using a breadth-first search means in a binary tree structure.

BFS (leader) {

init local Queue, q, to empty

v = Find a Leader Cell;

Enqueue (v)

Store v;

While (q is not empty)) {

v = Dequeue (q)

Enqueue (children of v);

store v;

}

In addition, an example of an algorithm for implementing a cell assembly means using k number of detail paths using a breadth-first search method is as follows.

BFS (leader) {

init local VC Queue, q, to empty

v = Find a Leader Cell;

Enqueue (leader);

Enqueue (v)

Store v;

While (q is not empty)) {

for (k = 0; k <#planes; k ++) {/ * in parallel * /

v _k = Dequeue (q);

Enqueue (children of v _k );

store v _k ;

}

}

As described above, the delay time of the cell reassembly means 222 implemented by the algorithm can be shortened to O (logN) in the present invention, compared to O (N) in the case of the conventional SCIMA. Thus, as described above, it can be seen that the parallel demultiplexing system of the present invention can satisfy the cell transmission latency of a high speed ATM switching system using more detail paths or planes (e.g., 8-16 or more). Can be.

Hereinafter, the operation of the parallel cell reassembly unit 220 including the cell reassembly means 222 will be described in more detail. 9 shows the operation of cell reassembly 220 employing a binary tree structure. Referring to FIG. 9, a leader cell is first searched in the input queue 223 for each detailed path of the cell assembly unit, and the headers of the leader cells are analyzed to detail path numbers P2 and P3 of the next transmission cells 2 and 3. Recognize and enqueue to the tail point of the output queue 221 in units of two cells in the detailed path input queue 223. In this principle, two next transmission cells are dequeued from the output queue 221 and enqueued at the rear end position of (tail + 2).

Figure 10 is an embodiment of the operation of the reassembly means described above. Find the leader cell 1, analyze the header of the leader cell, find out the detailed path of the next transmission cell from the left link and the right link, and check the cells (2, 3) in the output queue of the corresponding detail paths (P2, P3). Fetch and sort into the output queue. In the same operation, the headers of the cells 2 and 3 are analyzed, respectively, and the corresponding cells are extracted from the input queue of the corresponding detailed path. For example, in the case of the cell 2, the cell 4 of the detail path P0 input queue is pulled out by the left link and the cell 5 of the detail path P1 input cue is drawn out by the right link. The output queue 221 is aligned. In this way, enqueuing of two or more descendant cells can be realized simultaneously.

11 shows the operation of the reassembly in the demultiplexing system using k subpaths. FIG. 11 is performed by the same operation principle as FIG. However, the position to enqueue the cell drawn from the output queue for each detailed path is different only from tail + k * (k-2) points.

Furthermore, another feature of the present invention is that it can be omitted by using at least one or more of the detailed path numbers of the next transmission cell inserted into the head as a prediction link. 8 shows the cell flow for this embodiment. The cell flow diagram shown in FIG. 12 is an example in which a left link of two links is formed as an implicit link in a demultiplexing system employing a binary tree structure. The predictive link refers to a link type that can be predicted by other information in the cell reassembly unit even though the corresponding link is not substantially added to the cell header and transmitted. Therefore, in this case, since the prediction link can be omitted in the cell header, the number of additional bits of the cell header can be reduced.

Referring to FIG. 12, the right link is indicated by a dotted line and the left link is indicated by a solid line. This is a cell flow diagram of a parallel demultiplexing system that transmits cells in four detailed paths and employs a path combining means in a total combination mapping method. In this case, the left link is not added to the cell header as the predictive link, and can be calculated only by the detail path number of the parent cell and the total number of detail paths (K).

For example, in the binary tree structure, the distance of the right and left descendant cells from the parent cell can be calculated by predicting (2A)% K and (2A + 1)% K. Here, A is the cell order of the parent cell, K is the number of detailed paths used for the total distribution.

In the M-way tree structure, the cell discriminator of the descendant cell from the parent cell can be predicted by integers from (AM-M + 2) to (AM + 1), and each detailed path You can also predict.

Through this equation, it is possible to reduce the number of additional bits of the cell header by employing the prediction link, and it can be seen that the cell reassembly unit can reconfigure the cell by predicting the prediction link.

The reason why the prediction link prediction method is possible in the present invention is based on the regularity of the tree structure having the same branch number at one node and the cell identifier (ID) which is given in order when decomposing the first cell. Based on the regularity of the tree structure, the cell reassembly means 222 may predict and reconstruct the next transmission cell using the cell discriminator in order.

In the prediction method, the number of links that can omit additional bits and a calculation method for prediction vary according to a method of allocating detailed paths. For example, in the fully-associative mapping method, the detailed path allocation method calculates the distance between the parent cells based on the detail path number of the parent cell and the number of detail paths even if all the links are omitted. Can be.

FIG. 13 is a cell header format of the present embodiment compared with the cell header format of FIG. The case where the header format of the second embodiment omits the left link as a prediction form. Therefore, the number of bits of 2log (k) can be reduced when omitting the preceding link for the cell recovery operation.

14 shows an example of the cell reassembly operation according to the embodiment of FIG. 12 and FIG. Unlike the cell header of the input queue shown in FIG. 10, the cells of the input queue for each detailed path shown in FIG. 14 are omitted in the form of (M, K _r ) in the form of predictable left link K _l . . In FIG. 14, the reassembly unit analyzes a header of one cell, grasps two next transmission cells in detail, draws them from the input queue 223 for each detailed path, and stores them in the output queue 221. However, for the darkly displayed cells, the next transmission cell corresponding to the left link of each cell is adopted to predict and draw the distance between the cells.

On the other hand, another feature of the present invention is that it is possible to reduce the circuit area by configuring a plurality of cell tree structure in the form of a linked list (linked list). In general, the parallel cell reassembly unit 220 requires a queue 223 having a size corresponding to the maximum cell order of each detailed path. If the maximum cell order is large, there is a problem in that the capacity of the buffer memory becomes large and the circuit area increases to implement the queue 223 suitable for this. Therefore, in order to solve this problem, the present embodiment applies a method of reducing the maximum cell order by limiting the depth of the cell tree.

Fig. 15 shows a plurality of cell tree structures having a linked list form. Referring to Fig. 15, the next tree structure 1401 is linked using the last cell of one tree structure 1400 as the leader cell. In the same manner, an additional cell may be linked to a leader cell of the last cell of the cell tree 1401. Such a linked list cell tree structure can be easily implemented by limiting the tree depth and adopting a means of organizing each cell tree structure into a linked list. As described above, the present invention has an advantage of reducing circuit area and execution time by adding a means for limiting the tree depth.

In addition, the present invention provides a parallel demultiplexing method for distributing a cell queue input from a first path, transmitting the cell queue in a plurality of detailed paths, and reassembling the transmitted cell in a second path.

The cell queues input from the first path according to the parallel demultiplexing method of the present invention are connected in a multi-tree structure rooted by a leader cell, and the cells connected to the tree structure by using a predetermined tree traversal method. Each cell distributes the detailed paths to be transmitted in parallel. Subsequently, after inserting a link indicating a cell sequence within a detailed path to be transmitted and a detailed path of a next cell to be transmitted to the cell header, the cell is transmitted by the determined detailed path according to the distributed result. In this step, the circuit area and the execution time may be reduced by adding the step of limiting the depth of the tree structure and configuring the plurality of trees in the form of a linked list.

Then, the demultiplexing method of the present invention analyzes a link indicating a cell order within a subpath to be transmitted and a subpath to a next cell to be transmitted by adding the received cell to each cell header using the tree traversal method. It can be implemented by sequentially reassembling and transferring the reassembled data to the second path. In addition, by adopting the breadth-first search method as the tree traversal method, by sequentially transmitting the cells, some of the transmitted cells can be transferred to a later system in advance, thereby reducing the buffer memory capacity.

The method of the present invention as described above may be implemented as a computer program and stored in a computer-readable form on a recording medium (eg, CD-ROM, floppy disk, hard disk, ROM, RAM, magneto-optical disk, etc.) The method may also be implemented as a hardware device such as a logic circuit, a semiconductor device, or a main board.

The present invention described above is not limited by the above-described embodiment and the accompanying drawings, but by the appended claims. Therefore, it will be apparent to those skilled in the art that various forms of substitution, modification, and alteration are possible without departing from the technical spirit of the present invention described in the claims.

As described above, according to the parallel demultiplexing system of the present invention, an efficient demultiplexing system, a method for implementing a large-capacity transmission network using a plurality of low-cost low-speed transmission paths, and a computer-readable recording storing a program for realizing the same. A medium can be provided. The demultiplexing system and method of the present invention can be used in various fields such as demultiplexing of ATM AAL layer, parallel multi-plane switching system, and can significantly reduce the recovery time of cell order and transmit bandwidth compared to the conventional demultiplexing system and method. The burden of (bandwidth) can be reduced, and the circuit implementation is easy.

Claims (22)

In a parallel demultiplexing system using multiple detailed paths, After splitting the input data into a plurality of cells, the leader cells are connected to a multi-tree tree (M-way tree), which is a root, and each cell is transmitted using a predetermined tree traversal method. Parallel cell distribution unit for distributing parallel to detailed paths and transmitting each cell to the distributed detailed paths by inserting a link indicating a detailed path of a next transmission cell into a header of the cell; The cell transmitted from each subpath is stored in a cell queue for each subpath, and the link indicating the subpath of the next transmission cell inserted into the header of each cell is analyzed using the predetermined tree traversal method, and the analysis thereof. And a parallel cell reassembly for recursively parallel reassembling the cells and transmitting the reassembled cells. The method of claim 1, The parallel cell distribution unit, A cell distributor input queue for dividing and storing the inputted data into a plurality of cells; The cells stored in the cell distribution unit input queue are connected in a multi-tree structure in which a leader cell is the root, and the cells are distributed in parallel to the detailed paths to which each cell is transmitted by using a predetermined tree traversal method. Cell distributing means for adding a link representing a detailed path of the cell; An output queue for each detailed path for receiving and storing a cell from the cell distribution means; And cell transmitting means for transmitting the cells stored in the cell distribution unit output queue to the determined detailed path. The method of claim 2, The parallel cell distribution unit, And a load adjusting means for adjusting the cell input from the distribution means to the output queue for each subpath, based on the degree of load of each subpath to the cell. The method of claim 1, The parallel cell reassembly unit, A detailed route input queue for storing cells inputted from the detailed route; Analyzing a link representing a detailed path of a next transmission cell by using a predetermined tree traversal method for cells stored and connected to the cell assembly input queue in a multi-tree structure, and recursively searching the cells according to the analyzed result Cell reassembly means for parallel reassembly; A cell reassembling unit output queue for storing the assembled cells; And a cell reassembly transmitter for transmitting the cell queue stored in the cell reassembly output queue. The method of claim 1, The parallel cell distribution unit, In the header of the cell, a cell link in a detailed path in which each cell is to be transmitted, and a backup link indicating a detailed path of a next transmitting cell of the preceding cell are additionally inserted. The parallel cell reassembly unit, Means for verifying cell loss using the cell order in the detailed path; And if the verification means confirms the loss, further comprising means for recovering the descendant cells of the lost cell by using a backup link indicating the detailed path of the next transmission cell of the preceding cell. Multiplexing system. The method of claim 1, The predetermined tree traversal method is a breadth first search traversal method, And said cell reassembly uses a top down breadth first search traversal method from a leader cell. The method of claim 1, The multi-tree structure is a binary tree structure, wherein the link indicating the detailed path of the next transmission cell indicates the detailed path of the next transmission cell connected to the left side and the detailed path of the next transmission cell connected to the right side. Parallel demultiplexing system. The method of claim 1, The parallel cell distribution unit At least one of a means that the input cell can be assigned to all subpaths (fully-associative mapping) and a set-associative mapping to one subset of the subpaths according to the characteristics of the input cell. Parallel demultiplexing system, characterized in that it comprises. The method of claim 1, The parallel cell distribution unit Parallel demultiplexing system, characterized in that the input cell comprises a direct mapping for all subpaths. The method according to claim 8 or 9, At least one or more of the links representing the detailed paths of the next transmission cell are implicit links, The parallel cell reassembly unit predicts the detailed path of the next transmission cell by using the prediction link as the identifier of a parent cell and the number of branches for each node of the tree structure. system. The method of claim 10, All of the links representing the detailed paths of the next transmission cell are predictive links, And the parallel cell reassembly unit predicts the detailed path of the next transmission cell by using the prediction link as the distinguisher of the parent cell and the number of branches for each node of the tree structure. The method of claim 1, The parallel cell distribution unit And means for limiting the multiple tree structure to a predetermined depth and transmitting a plurality of cell trees distributed to the predetermined depth in the form of a linked list. In the parallel demultiplexing method using a plurality of detailed paths, A first step of dividing the inputted data into cells and then connecting a multi-tree structure in which a leader cell is a root; A second step of distributing the cells connected in the tree structure in a detailed path to which each cell is to be transmitted using a predetermined tree traversal method; Inserting a link indicating a detailed path of a next transmission cell according to the distributed result; Transmitting the cell in each of the distributed detailed paths; A fifth step of analyzing a link indicating a detailed path of a next transmission cell which inserts the received cell into the header of each cell by using the predetermined tree traversal method; A sixth step of recursively parallel reassembling the cells according to the analyzed result Parallel demultiplexing method comprising a. The method of claim 13, The predetermined tree traversal method is a breadth first search traversal method, And wherein the cell reassembly uses a top down breadth first search traversal method from a leader cell. The method of claim 13, The third step, And inserting, in the header of the cell, a backup link indicating a cell sequence in a detailed path in which each cell is to be transmitted and a detailed path of a next transmitting cell of the preceding cell. The sixth step, Verifying cell loss using the cell order in the detailed path; And if it is confirmed in the verifying step that the lost cell is recovered, using the backup link indicating the detailed path of the next transmission cell of the preceding cell, recovering descendant cells of the lost cell. Multiplexing method. The method of claim 13, The multi-tree structure is a binary tree structure, wherein the link indicating the detailed path of the next transmission cell indicates the detailed path of the next transmission cell connected to the left side and the detailed path of the next transmission cell connected to the right side. Parallel demultiplexing method. The method of claim 13, The second step, At least one of a fully-associative mapping of the input cell to all subpaths and a set-associative mapping of a subset of the subpaths to the characteristics of the input cell. Parallel demultiplexing method characterized in that. The method of claim 13, The second step, Parallel demultiplexing method characterized in that the input cell includes a direct mapping that can be assigned to all subpaths. The method of claim 17 or 18, At least one or more of the links representing the detailed paths of the next transmission cell are prediction links, And the fifth step further comprises estimating the detailed path of the next transmission cell by using the prediction link as a distinguisher of a parent cell and the number of branches for each node of the tree structure. The method of claim 18, All of the links representing the detailed paths of the next transmission cell are predictive links, And wherein the fifth step includes estimating the detailed path of the next transmission cell using the identifier of the parent cell and the number of branches of each node of the tree structure. The method of claim 13, The second step is Limiting the multi-tree structure to a predetermined depth, and transmitting the plurality of cell trees distributed to the predetermined depth in the form of a linked list. . In parallel demultiplexing systems using multiple paths, A function of dividing the input data into cells and then connecting a multi-tree structure in which a leader cell is the root; Distributing the cells connected in the tree structure in parallel to the detailed paths to which each cell is to be transmitted using a predetermined tree traversal method; Inserting a link indicating a detailed path to a cell to be transmitted next in the cell header according to the distributed result; Transmitting the cell to each of the distributed detailed paths; A function of analyzing a link indicating a detailed path of a next transmission cell by using the predetermined cell traversal method for the received cell; Reassemble the cells recursively in parallel according to the analyzed result A computer readable recording medium having stored thereon a program for realizing the problem.