KR100388455B1 - Closed caption processing divice with memory address generator - Google Patents

Abstract

The present invention relates to an apparatus for extracting a character broadcasting signal for television. In particular, the present invention provides a text signal by receiving a television signal in order to reduce the operation burden of the central processing unit when extracting a character broadcasting signal with a built-in memory address generator. A data extractor which extracts only and generates a first control signal when the text signal extraction is completed; A user interface to designate line information and field information in the data extractor, to designate a region in which the data extractor receives a text signal, and to output a signal specifying a line and a field; An address generator configured to generate an address in response to a signal specifying a line and a field output from the user interface and the first control signal; A write signal generator configured to generate a second control signal in response to the first control signal; And a memory for recording the rub signal extracted from the data extractor in order in response to the first control signal and the second control signal. The memory is divided into four areas, and the first area includes the first line information and the first line information. Data for the odd field area is stored, data for the first line information and the even field area is stored in the second area, data for the second line information and the odd field area is stored for the third area, and data for the second line information is stored for the fourth area. A character signal processing apparatus incorporating a memory address generator characterized in that it is configured to receive data in an even field region.

Description

Character signal processing device with a built-in memory address generator {Closed caption processing divice with memory address generator}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for extracting a character broadcast signal for a television (TV). In particular, a text address signal for relieving the operation burden of a central processing unit (CPU) when processing a character broadcast signal with a built-in memory address generator is extracted. It relates to a device to.

There are two ways to do text broadcasting on television. One is open caption, which is used for emergency broadcasting by broadcasters, and the other is closed caption developed for the hearing impaired. There is a way.

In the open caption method, a caption signal is included and transmitted in an active section of a television signal, and the viewer does not have a right to receive the caption signal. The difference between being able to select whether or not to view the subtitle signal by the selection of the viewer is included.

Before describing the character broadcasting signal processing, the characteristics of the broadcasting signal used in Korea, the United States, and Canada are as follows. In the NTSC method, the television signal has 525 lines on the television reception screen, and the 525 lines are even lines 240. It consists of 240 dogs and odd lines and 45 lines used to return the caption signal, tracking signal, and scan line to the beginning. One frame has 240 odd and even lines alternately. This is expressed using an interlace method of scanning a television's CRT.

The caption signal is assigned to any one of 45 lines of the scanning line of the television, and the signal is positioned in a vertical blanking section which is a non-active section on the screen represented by 240 interlaced scans. It is possible to select whether or not to watch the signal.

Conventionally, a process of extracting and processing a subtitle signal from a television signal is performed by receiving a television signal including a text signal transmitted from a broadcasting station, extracting only a text signal through a data extractor, and latching the signal as a buffer. ) Is stored in memory after processing by the central processing unit (CPU).

In the above-described method, the CPU needs to perform a text signal transmitted from a broadcasting station in the CPU, and the text signal is read from the latch and the data is read from the latch. It consists of the operation of recording in the memory and the operation of interpreting the data recorded in the memory, and when the generated data increases the operation that the CPU needs to perform more.

That is, in addition to processing character data during the operation of the central processing unit, an operation to be additionally performed, that is, the operation of controlling the data latch to read data into the memory and the time required to write to the memory, is performed. + Data write operation) × is expressed as the number of data generated.

This operation has a disadvantage in that a CPU takes much time to read and write data, which requires more time to process the text signal.

The problem of the conventional text broadcasting signal extractor will be described in detail with reference to FIG. 1.

1 shows a configuration of a conventional text broadcasting signal extractor. The conventional text signal extractor includes a data extractor 10 for extracting only a text signal by receiving a television signal, and data for temporarily storing a text signal obtained through the data extractor. A latch 20, a user interface 30 for providing field information and line information for displaying a text signal in the data extractor, a memory 40 for storing the text signal obtained in the data extractor, and data from the memory; It comprises a central processing unit 50 for receiving and processing.

The data extractor 10 receives 8-bit line information and 1-bit field information from the user interface 30 to find out exactly which line and field a text signal appears and extracts data from a television signal. The transferred data to the data latch 20.

The text signal stored in the data latch 20 is applied to the memory 40 via a bus under the control of the CPU, and the CPU analyzes the data applied to the memory. The text signal is processed.

Here, the CPU analyzes the data received from the memory 40 and determines the position and attribute at which the corresponding character signal should be displayed.

Therefore, the conventional text signal processing apparatus inserts a text signal into the memory from the data latch 20 under the control of the CPU, and then processes the text signal by receiving data from the memory. There was a heavy burden on the operation of the CPU.

The present invention is to provide a text signal processing apparatus that can reduce the burden on the central processing unit (CPU), and to speed up the processing of the text signal in order to solve the conventional problems as described above.

1 is a block diagram of a conventional text signal processing apparatus.

2 is a block diagram of a text signal processing apparatus according to the present invention;

3 is a memory configuration diagram of a character signal processing apparatus according to the present invention;

* Explanation of symbols for main parts of the drawings

100: data extractor 200: user interface

300: address generator 400: write signal generator

500: memory

In order to solve the above problems, the present invention provides a data extractor for extracting only a text signal by receiving a television signal and generating a first control signal when the text signal extraction is completed; A user interface to designate line information and field information in the data extractor, to designate a region in which the data extractor receives a text signal, and to output a signal specifying a line and a field; An address generator configured to generate an address in response to a signal specifying a line and a field output from the user interface and the first control signal; A write signal generator configured to generate a second control signal in response to the first control signal; And a memory configured to sequentially record the character signals extracted by the data extractor in order in response to the first control signal and the second control signal. The memory is divided into four areas, and the first area includes first line information and Data for the odd field area is stored, data for the first line information and the even field area is stored in the second area, data for the second line information and the odd field area is stored for the third area, and data for the second line information is stored for the fourth area. A character signal processing apparatus incorporating a memory address generator characterized in that it is configured to receive data in an even field region.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

2 shows a text signal extraction apparatus according to a preferred embodiment of the present invention.

Referring to FIG. 2, the text signal extracting apparatus of the present invention includes a data extractor 100 that receives a television signal and extracts only a text signal, and generates a data generation completion signal when the text signal extraction is completed, and the data extractor. A user interface 200 for specifying a region for receiving a text signal and outputting a signal for designating a line and a field by specifying line information and field information in a line, and a signal for designating a line and a field of the user interface. And an address generator 300 generating an address in response to the first control signal, a write signal generator 400 generating a second control signal in response to the first control signal, and a first control signal. And a memory 500 for recording in sequence the character signals extracted by the data extractor in response to the second control signal. 100 is connected to the user interface 200 with a bus width of 2 bits, and the first control signal is connected to the address generator 300 and the write signal generator 400 with a 1-bit control line, and the memory 500 ) And an 8-bit data bus.

The user interface 200 is connected to the address generator 300 by a 2-bit bus line, the data extractor 100 is connected by a 9-bit bus line, and the write signal generator 400 is connected to the data extractor 100. It is connected by a control line of 1 bit, and is connected to the memory 500 by a control line of 1 bit.

The address generator 300 is connected to the data extractor 100 with a 1-bit control line, the user interface 200 is connected with a 2-bit control line, and the memory 500 is connected with an 8-bit address line. .

The above configuration will be described in detail with reference to FIGS. 2 and 3 as follows.

2 is a diagram illustrating a text signal processing apparatus according to the present invention, and FIG. 3 is a diagram illustrating a method of using a memory area according to the present invention.

First, when the television signal is applied to the data extractor 100, the position where the text signal is included is determined according to the line and field designated by the user interface 200, and the found text signal is transferred to the memory through an 8-bit bus line. send.

The television signal is composed of 525 lines, and 240 lines are alternately output to the display device, thereby forming one screen.

The user interface 200 is set in accordance with a standard for receiving a text signal from a manufacturer who manufactures the text signal receiving apparatus, and the set line and field information is applied to the data extractor 100 so that the data extractor 100 displays the text in the television signal. Only signals are obtained selectively.

The 9-bit bus line connected to the data extractor 100 in the user interface 200 is composed of 8-bit line information and 1-bit field information.

Since the 8-bit line information can be represented up to 256, one of the lines consisting of 240 scan lines can be selected, and the 1-bit field information indicates whether the line means an even line or an odd line. Becomes

Next, the data extractor 100 generates a data generation completion signal when all the 8-bit text signals are transmitted from the television signal, and the data generation completion signal is applied to the address generator 300 and the write signal generator 400. In the address generator 300, the user interface 200 refers to line information and field information, and in accordance with a data generation completion signal applied from the data extractor 100, one address for writing character signal data into a memory is provided. Increase.

Finally, the text signal obtained by the data extractor 100 is stored in the memory in response to the address generated by the address generator 300 and the write control signal of the write signal generator.

The memory is divided into four areas. The first area stores data for the first line information and the odd field area, the second area stores data for the first line information and even field area, and the third area stores the second line information and the second line information. Data in the odd field area is stored, and in the fourth area, data of the second line information and the even field area are stored in order according to the address designation of the address generator 300.

At this time, the start address of each area is set to have a predetermined value between the text signal processing unit and the central processing unit.

That is, the memory configuration of the present invention divides the memory into four areas, sets the start address of each area of the memory in advance, and stores the line information and the field information in order under the control of the address generator 300. It is composed.

As described above, since the central processing unit (CPU) only needs to patch the line information and the data of the field area into the memory, the processing burden of the central processing unit (CPU) is significantly reduced unlike the conventional art.

As described above, the present invention is not limited to the above-described embodiment and the accompanying drawings, and various changes, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill.

As described above, the present invention reduces the operation burden of the central processing unit (CPU) by storing data in order from the data extractor to the memory without the control of the central processing unit (CPU) using the address generator, and further improves the character signal processing. It can be done quickly and accurately.

Claims (2)

delete A data extractor for receiving a television signal to extract a text signal and generating a first control signal when the text signal extraction is completed; A user interface to designate line information and field information in the data extractor, to designate a region in which the data extractor receives a text signal, and to output a signal specifying a line and a field; An address generator configured to generate an address in response to a signal specifying a line and a field output from the user interface and the first control signal; A write signal generator configured to generate a second control signal in response to the first control signal; And And a memory configured to sequentially record the text signals extracted by the data extractor in response to the first control signal and the second control signal. The memory is divided into four regions, The first area stores data for the first line information and odd field area, the second area stores data for the first line information and even field area, the third area stores data for the second line information and odd field area, And a fourth address area for storing the second line information and the data of the even field area.