KR100358572B1 - A forming method for a oxide film of semiconductor device - Google Patents

A forming method for a oxide film of semiconductor device Download PDF

Info

Publication number
KR100358572B1
KR100358572B1 KR1019990063515A KR19990063515A KR100358572B1 KR 100358572 B1 KR100358572 B1 KR 100358572B1 KR 1019990063515 A KR1019990063515 A KR 1019990063515A KR 19990063515 A KR19990063515 A KR 19990063515A KR 100358572 B1 KR100358572 B1 KR 100358572B1
Authority
KR
South Korea
Prior art keywords
oxide film
semiconductor device
tca
forming
oxygen gas
Prior art date
Application number
KR1019990063515A
Other languages
Korean (ko)
Other versions
KR20010061037A (en
Inventor
안희균
Original Assignee
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1019990063515A priority Critical patent/KR100358572B1/en
Publication of KR20010061037A publication Critical patent/KR20010061037A/en
Application granted granted Critical
Publication of KR100358572B1 publication Critical patent/KR100358572B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon

Abstract

본 발명은 반도체소자의 산화막 형성방법에 관한 것으로, 고온의 로(爐)에서 실시되는 산화막 형성공정중 TCA 공정 전 또는 후에 불화수소 증기를 이용한 세정공정을 실시하여 자연산화막을 제거하여 산화막을 예정된 두께로 형성할 수 있도록 하여 반도체소자의 고집적화를 가능하게 하는 효과를 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an oxide film of a semiconductor device, wherein the oxide film is formed by removing a natural oxide film by performing a cleaning step using hydrogen fluoride vapor before or after a TCA process during an oxide film formation process performed at a high temperature furnace. The present invention provides an effect of enabling high integration of the semiconductor device by forming a semiconductor device.

Description

반도체소자의 산화막 형성방법{A forming method for a oxide film of semiconductor device}A forming method for a oxide film of semiconductor device

본 발명은 반도체소자의 산화막 형성방법에 관한 것으로, 특히 반도체소자의 게이트절연막으로 사용되는 산화막을 얇게 형성하되, 재현성 및 균일성을 향상시켜 반도체소자의 특성 및 신뢰성을 향상시킬 수 있는 기술에 관한 것이다.The present invention relates to a method of forming an oxide film of a semiconductor device, and more particularly, to a technique of forming a thin oxide film used as a gate insulating film of a semiconductor device, thereby improving reproducibility and uniformity, thereby improving characteristics and reliability of the semiconductor device. .

반도체 제조 공정에서 생산효율의 극대화를 위하여 더 작은 소자, 즉 고집적화를 요구하면서 더 얇은 산화막이 필요하게 된다.In the semiconductor manufacturing process, in order to maximize the production efficiency, a smaller device, that is, a thinner oxide film is required while requiring high integration.

얇고 신뢰성 있는 산화막을 형성하기 위하여 웨이퍼 표면을 더 깨끗하게 유지하는 것이 필수 조건이 되었다.In order to form a thin and reliable oxide film, it is essential to keep the wafer surface cleaner.

반도체소자의 고집적화에 따라 각 층간의 절연특성을 향상시키기 위한 산화막이 차지하는 비율이 더욱 커지게 되어 예정된 공정에 의한 산화막 외에 공기중의 노출로 인한 자연산화막의 존재가 반도체소자의 고집적화를 어렵게 하는 결과를 초래하게 되었다.Due to the high integration of semiconductor devices, the proportion of oxide films to improve the insulating properties between layers becomes larger, and the presence of natural oxide films due to exposure to air in addition to the oxide films by a predetermined process makes it difficult to achieve high integration of semiconductor devices. Brought about.

자연 산화막이 차지하는 비율이 전체 두께에 대한 비율이 높아지기 때문이다.This is because the ratio of the natural oxide film to the total thickness increases.

결론적으로 조절되지 않은, 원치 않는 산화막의 성장을 최소화하여야 한다.In conclusion, uncontrolled growth of unwanted oxide films should be minimized.

도 1을 참조하여 종래기술을 설명하면 다음과 같다.Referring to the prior art with reference to Figure 1 as follows.

상기 도 1 과 같은 산화방식을 사용할 경우 습식산화 구간인 습식 TCA ( TriChloroethAne ) 구간에 무관하게 기본적으로 20 Å 이하의 두께를 갖는 자연산화막이 생성된다.When the oxidation method as shown in FIG. 1 is used, a natural oxide film having a thickness of 20 Å or less is generated regardless of the wet TCA (TriChloroethAne) section, which is a wet oxidation section.

이것은 고집적화된 반도체소자의 산화막 두께 조절을 어렵게 한다.This makes it difficult to control oxide film thickness of highly integrated semiconductor devices.

상기 자연산화막은 시작하는 온도, 즉 푸쉬 ( push ) 단계에서의 온도가 약 400 ℃ 이상이면 항시 비슷한 결과를 준다.The natural oxide film always gives a similar result when the starting temperature, that is, the temperature in the push step is about 400 ° C. or more.

상기한 바와 같이 종래기술에 따른 반도체소자의 산화막 형성방법은, 반도체소자의 고집적화를 어렵게 하는 자연산화막으로 인하여 반도체소자의 특성 및 신뢰성을 저하기시키는 문제점이 있다.As described above, the oxide film forming method of the semiconductor device according to the related art has a problem of lowering the characteristics and reliability of the semiconductor device due to the natural oxide film which makes it difficult to integrate the semiconductor device.

본 발명은 상기한 종래기술의 문제점을 해결하기 위하여, 세정공정을 추가하여 자연산화막을 제거하고 후속공정을 실시함으로써 자연산화막으로 인한 소자의 특성 열화를 방지하여 반도체소자의 특성 및 신뢰성을 향상시킬 수 있는 반도체소자의 산화막 형성방법을 제공하는데 그 목적이 있다.The present invention can improve the characteristics and reliability of the semiconductor device by preventing the deterioration of the characteristics of the device due to the natural oxide film by adding a cleaning process to remove the natural oxide film and subsequent steps to solve the problems of the prior art described above. It is an object of the present invention to provide a method for forming an oxide film of a semiconductor device.

도 1 는 종래기술에 따른 반도체소자의 산화막 형성방법을 도시한 개략도.1 is a schematic diagram showing a method of forming an oxide film of a semiconductor device according to the prior art.

이상의 목적을 달성하기 위해 본 발명에 따른 반도체소자의 산화막 형성방법은,In order to achieve the above object, the oxide film forming method of a semiconductor device according to the present invention,

실리콘 웨이퍼를 로딩(loading)하고, 공정 온도까지 램프 엎(lamp up)한 다음, 산소가스를 퍼지(purge)하고, 건식 TCA, 습식 TCA 및 산소가스 분위기 어닐링하여 게이트산화막을 형성한 다음, 질소가스 퍼지 및 램프 다운(lamp down) 및 웨이퍼 아웃(wafer out)하는 공정으로 실시되는 반도체소자의 산화막 형성방법에 있어서,상기 건식 TCA 공정 전 또는 후에 불화수소 증기를 이용한 세정공정으로 자연산화막을 제거한 후 실리콘 웨이퍼 상에 게이트산화막을 형성하는 것을 제1특징으로 한다.이상의 목적을 달성하기 위해 본 발명에 따른 반도체소자의 산화막 형성방법은,실리콘 웨이퍼를 로딩하고, 공정 온도까지 램프 엎한 다음, 산소가스를 퍼지하고, 불화수소증기를 이용하여 상기 실리콘 웨이퍼 상의 자연산화막을 제거한 후 산소가스 분위기 어닐링하여 게이트산화막을 형성한 다음, 질소가스 퍼지 및 램프 다운 및 웨이퍼 아웃하는 공정으로 이루어지는 것을 제2특징으로 한다.After loading the silicon wafer, ramping up to the process temperature, purging oxygen gas, annealing dry TCA, wet TCA and oxygen gas to form a gate oxide film, and then nitrogen gas. In the method of forming an oxide film of a semiconductor device, which is carried out by purging, ramping down, and wafering out, a silicon oxide is removed by a cleaning process using hydrogen fluoride vapor before or after the dry TCA process. A first feature is to form a gate oxide film on a wafer. In order to achieve the above object, in the method of forming an oxide film of a semiconductor device according to the present invention, a silicon wafer is loaded, ramped up to a process temperature, and then purged with oxygen gas. Remove the natural oxide film on the silicon wafer using hydrogen fluoride vapor, and then anneal the oxygen gas atmosphere to perform gate oxidation. After forming a film, it is set as the 2nd characteristic which consists of a process which purges nitrogen gas, and ramps down and wafers out.

한편, 이상의 목적을 달성하기 위한 본 발명의 원리는, 주(主) 게이트산화막 전에 생성된 자연산화막을 불화수소(HF)증기를 이용하여 제거하고 주 게이트 산화공정을 실시하는 것이다. 여기서, 불화수소증기를 로(爐)에 주입하는 방식은, 기존 질소배관을 이용하는 방식과 새로이 배관을 형성할 수도 있다.On the other hand, the principle of the present invention for achieving the above object is to remove the natural oxide film formed before the main gate oxide film using hydrogen fluoride (HF) vapor and to perform the main gate oxidation process. Here, the method of injecting hydrogen fluoride vapor into the furnace may form a new pipe and a method using an existing nitrogen pipe.

후속공정으로, 상기 불화수소 증기를 이용한 세정공정이 끝난 실리콘 웨이퍼를 로(爐)에 넣은 다음 지정한 온도로 상승시킨다.In a subsequent step, the silicon wafer after the cleaning step using the hydrogen fluoride vapor is placed in a furnace and then raised to a specified temperature.

이하, 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail.

상기 도 1 을 참조하면, 실리콘 웨이퍼를 로딩 ( loading ) 하고 상기 공정온도까지 램프 엎 ( lamp up ) 한다.Referring to FIG. 1, a silicon wafer is loaded and ramped up to the process temperature.

그리고, 산소가스 퍼지, 건식 TCA, 습식 TCA, 산소가스 분위기 어닐링, 질소가스 퍼지, 램프 다운 ( lamp down ) 한다. 이때, 상기 건식 TCA, 습식 TCA 및 산소가스 분위기 어닐링공정에 의해 게이트산화막이 형성된다.Then, oxygen gas purge, dry TCA, wet TCA, oxygen gas atmosphere annealing, nitrogen gas purge, lamp down. At this time, the gate oxide film is formed by the dry TCA, wet TCA and oxygen gas atmosphere annealing process.

그리고, 웨이퍼 아웃 ( wafer out ) 등의 공정으로 게이트 산화막을 형성한다.The gate oxide film is formed by a process such as wafer out.

여기서, 상기 산소가스를 이용한 퍼지 공정 후에 불화수소 증기를 이용한 세정공정을 실시하여 상기 반도체기판 표면에 형성된 자연산화막을 제거한다.Here, after the purge process using the oxygen gas, a cleaning process using hydrogen fluoride vapor is performed to remove the natural oxide film formed on the surface of the semiconductor substrate.

또한, 상기 건식 TCA 공정 후에 불화수소 증기를 이용한 세정공정을 실시하여 상기 반도체기판 표면에 형성된 자연산화막을 제거할 수도 있다.In addition, after the dry TCA process, a cleaning process using hydrogen fluoride vapor may be performed to remove the natural oxide film formed on the surface of the semiconductor substrate.

그리고, 상기 건식 TCA 및 습식 TCA 공정 대신 불순 증기를 이용한 세정공정으로 대신하여 모빌이온 게더링 ( mobil ion gathering ) 과 함께 표면의 자연산화막을 제거한다.In addition, instead of the dry TCA and wet TCA processes, the surface of the natural oxide film is removed along with mobil ion gathering instead of the cleaning process using impurity vapor.

본 발명의 다른 실시예는 게이트산화막 형성공정의 전 세정에서 희생산화막을 그대로 방치한 후 상기 불화수소 증기 공정에서 희생산화막을 제거하는 것이다.Another embodiment of the present invention is to remove the sacrificial oxide film in the hydrogen fluoride vapor process after leaving the sacrificial oxide film as it is in the pre-cleaning of the gate oxide film forming process.

이상에서 설명한 바와 같이 본 발명에 따른 반도체소자의 산화막 형성방법은, 불필요한 산화막을 모두 제거하고 처음부터, 다시 말해 0Å부터 산화막이 성장하게 되어 시간 조절이 용이하고, 얇은 산화막의 두께 조절이 용이하여 고집적 회로의 소장을 재현성, 신뢰성 있게 제조할 수 있고, 자연산화막 및 화학산화막(chemical oixde)를 제거함으로써 그 속에 존재하는 금속오염을 제거할 수 있어 산화막의 신뢰성 향상시키며, 게이트산화막의 전세정을 생략할 수 있어 공정단순화를 실현할 수 있고, 생산단가를 현저하게 줄일 수 있는 효과를 제공한다. 그리고, TCA 공정을 HF로 치환함으로써 TCA가 환경에 끼치는 폐해를 감소시켜 반도체 소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체 소자의 수율 및 생산성을 향상시킬 수 있는 효과를 제공한다.As described above, in the method of forming the oxide film of the semiconductor device according to the present invention, the oxide film is grown from the beginning, that is, from 0 하고 from the beginning, and thus, the time is easily controlled, and the thickness of the thin oxide film is easily controlled. It is possible to manufacture the circuit small and reproducibly and reliably. By removing the natural oxide and chemical oxide, the metal contamination present therein can be removed, which improves the reliability of the oxide and eliminates the pre-cleaning of the gate oxide. In this way, process simplification can be realized and production costs can be significantly reduced. In addition, by replacing the TCA process with HF, it is possible to reduce the harmful effects of the TCA on the environment, thereby improving the characteristics and reliability of the semiconductor device and thereby improving the yield and productivity of the semiconductor device.

Claims (2)

실리콘 웨이퍼를 로딩(loading)하고, 공정 온도까지 램프 엎(lamp up)한 다음, 산소가스를 퍼지(purge)하고, 건식 TCA, 습식 TCA 및 산소가스 분위기 어닐링하여 게이트산화막을 형성한 다음, 질소가스 퍼지 및 램프 다운(lamp down) 및 웨이퍼 아웃(wafer out)하는 공정으로 실시되는 반도체소자의 산화막 형성방법에 있어서,After loading the silicon wafer, ramping up to the process temperature, purging oxygen gas, annealing dry TCA, wet TCA and oxygen gas to form a gate oxide film, and then nitrogen gas. In the method of forming an oxide film of a semiconductor device which is carried out by the process of purging and ramping down and wafer out, 상기 건식 TCA 공정 전 또는 후에 불화수소 증기를 이용한 세정공정으로 자연산화막을 제거한 후 실리콘 웨이퍼 상에 게이트산화막을 형성하는 것을 특징으로 하는 반도체소자의 산화막 형성방법.And forming a gate oxide film on the silicon wafer after the natural oxide film is removed by a cleaning process using hydrogen fluoride vapor before or after the dry TCA process. 실리콘 웨이퍼를 로딩하고, 공정 온도까지 램프 엎한 다음, 산소가스를 퍼지하고, 불화수소증기를 이용하여 상기 실리콘 웨이퍼 상의 자연산화막을 제거한 후 산소가스 분위기 어닐링하여 게이트산화막을 형성한 다음, 질소가스 퍼지 및 램프 다운 및 웨이퍼 아웃하는 공정으로 이루어지는 것을 특징으로 하는 반도체소자의 산화막 형성방법.After loading the silicon wafer, ramping up to the process temperature, purging the oxygen gas, removing the natural oxide film on the silicon wafer using hydrogen fluoride vapor, and then annealing the oxygen gas atmosphere to form a gate oxide film, and then purging the nitrogen gas. An oxide film forming method for a semiconductor device, comprising a step of ramping down and wafering out.
KR1019990063515A 1999-12-28 1999-12-28 A forming method for a oxide film of semiconductor device KR100358572B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019990063515A KR100358572B1 (en) 1999-12-28 1999-12-28 A forming method for a oxide film of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990063515A KR100358572B1 (en) 1999-12-28 1999-12-28 A forming method for a oxide film of semiconductor device

Publications (2)

Publication Number Publication Date
KR20010061037A KR20010061037A (en) 2001-07-07
KR100358572B1 true KR100358572B1 (en) 2002-10-25

Family

ID=19630843

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990063515A KR100358572B1 (en) 1999-12-28 1999-12-28 A forming method for a oxide film of semiconductor device

Country Status (1)

Country Link
KR (1) KR100358572B1 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58218122A (en) * 1982-05-10 1983-12-19 Internatl Rectifier Corp Japan Ltd Manufacture of semiconductor device
JPH0316215A (en) * 1989-06-14 1991-01-24 Matsushita Electron Corp Formation of silicon thermal oxide film
JPH05217987A (en) * 1992-02-06 1993-08-27 Sharp Corp Washing method of wafer
JPH05226315A (en) * 1992-02-10 1993-09-03 Sharp Corp Manufacture of semiconductor device
JPH0786240A (en) * 1993-09-10 1995-03-31 Hitachi Ltd Surface treatment device
KR960005815A (en) * 1994-07-08 1996-02-23 김주용 ECR Dry Etching Equipment

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58218122A (en) * 1982-05-10 1983-12-19 Internatl Rectifier Corp Japan Ltd Manufacture of semiconductor device
JPH0316215A (en) * 1989-06-14 1991-01-24 Matsushita Electron Corp Formation of silicon thermal oxide film
JPH05217987A (en) * 1992-02-06 1993-08-27 Sharp Corp Washing method of wafer
JPH05226315A (en) * 1992-02-10 1993-09-03 Sharp Corp Manufacture of semiconductor device
JPH0786240A (en) * 1993-09-10 1995-03-31 Hitachi Ltd Surface treatment device
KR960005815A (en) * 1994-07-08 1996-02-23 김주용 ECR Dry Etching Equipment

Also Published As

Publication number Publication date
KR20010061037A (en) 2001-07-07

Similar Documents

Publication Publication Date Title
JP3815937B2 (en) Contact hole filling method of semiconductor device
US6589890B2 (en) Precleaning process for metal plug that minimizes damage to low-κ dielectric
US20040175961A1 (en) Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics
JP5595481B2 (en) Method of selective nitrogenation
US20060156970A1 (en) Methods for in-situ cleaning of semiconductor substrates and methods of semiconductor device fabrication employing the same
JP2004193575A (en) Semiconductor process and device related therewith
EP0454308B1 (en) Process for fabricating low defect polysilicon
KR100482372B1 (en) Method of forming gate oxide layer in semiconductor devices
US4902642A (en) Epitaxial process for silicon on insulator structure
TW201608605A (en) Modification treatment method and method of manufacturing semiconductor device
US20070071894A1 (en) Method for atomic layer deposition of materials using a pre-treatment for semiconductor devices
JP2006196910A (en) In-situ cleaning method for semiconductor substrate, and manufacturing method of semiconductor element adopting the same
US20030087494A1 (en) Semiconductor device and method for fabricating the same
KR100358572B1 (en) A forming method for a oxide film of semiconductor device
US6649537B1 (en) Intermittent pulsed oxidation process
US7235440B2 (en) Formation of ultra-thin oxide layers by self-limiting interfacial oxidation
KR19980073847A (en) Semiconductor Wafer Cleaning Method and Oxide Film Forming Method
US6624095B1 (en) Method for manufacturing a semiconductor device
KR101078723B1 (en) Method of manufacturing semiconductor device
KR100324822B1 (en) A method for fabricating a gate oxide of a semiconductor device
KR100588217B1 (en) Method for forming gate oxide in semiconductor device
US20090039413A1 (en) Method to form uniform tunnel oxide for flash devices and the resulting structures
KR100620172B1 (en) Method for improving membranous in gate oxide
TW202324579A (en) Integrated wet clean for gate stack development
JPH0955379A (en) Treatment method of semiconductor substrate and manufacture of semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20050923

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee