KR100358146B1 - Cmos image sensor - Google Patents

Abstract

The present invention obtains an average by reading the reference voltage of the dummy pixel array, and decreases the 'on' voltage of the reset transistor and the transfer transistor when the value is higher than the desired level of the voltage, and lowers the 'on' voltage of the reset transistor and the transfer transistor when the value is higher than the desired voltage level. The present invention provides a CMOS image sensor that improves image quality by preventing a distortion of a reference voltage level and a signal level from a pixel by increasing a voltage. To this end, the present invention provides a photodiode, a reset transistor, a transfer transistor, and a drive transistor. And a CMOS image sensor having a main pixel array and a dummy pixel array arranged in unit pixels consisting of select transistors, the CMOS image sensor comprising: a row decoder controlling each row of the pixel array; First to third driving means connected to the row decoder to drive a reset transistor, a transfer transistor, and a select transistor of the unit pixel in each row of the pixel array; A sample and hold circuit unit connected to an output terminal of the unit pixel to sample and hold a reference voltage and a signal voltage from the pixel; Switching means connected to the sample and hold circuit part and switched only when the reference voltage of the dummy pixel array is read to switch the reference voltage of the dummy pixel array output from the sample and hold circuit part; Comparison means for comparing a reference voltage of the dummy pixel array switched by the switching means with a target reference voltage arbitrarily set according to a power supply voltage and a process change; Counting means for receiving a comparison result of the comparing means and counting the number of '1' and the number of '0'; And control means for controlling the first to third driving means in response to a counting result of the counting means.

Description

CMOS Image Sensor {CMOS IMAGE SENSOR}

The present invention relates to a CMOS image sensor, and more particularly, to an apparatus for automatically controlling a reference voltage of a pixel according to a process change.

In general, an image sensor refers to a device that captures an image by using a property of a semiconductor that reacts to light. Each part of the subject in nature has different brightness and wavelength of light, and shows different electrical values at each pixel of the sensing device. This makes the electrical values at a level capable of signal processing. That's what sensors do.

To do this, the image sensor is a pixel array consisting of tens of thousands to hundreds of thousands of unit pixels, a device that converts the analog voltage detected by thousands of pixels into a digital voltage, and hundreds to thousands of storage devices. It is composed.

On the other hand, the CMOS image sensor further includes a process such as a color filter and a micro lens, compared to a general process, and since light is input, the transmittance of light has a greater effect on product characteristics. It is sensitive to phase variations.

1 is a block diagram of a unit pixel of a general CMOS image sensor.

As shown in the drawing, the unit pixel 100 includes one photodiode and four transistors. The four transistors discharge a transfer transistor Tx for transferring the photocharge generated in the photodiode 110 to the sensing node A, and charges stored in the sensing node A for the next signal detection. Sample and hold to interface between a reset transistor (Rx) for reading a reference voltage level and an analog-to-digital converter that does not distort the signal generated at the pixel and receives an output signal from the pixel (not shown). A drive transistor Dx connected to a source follower for driving a hold, and a select transistor Sx addressed to read the voltage of the pixel in units of rows. The other transistor LD which is not described is a load transistor driven by a bias voltage Pixel Bias.

Referring to FIG. 1, the driving operation of the unit pixel will be described below.

First, the reset transistor Rx and the transfer transistor Tx are 'on', and then the reset transistor Rx and the transfer transistor Tx are 'off' and the select transistor Sx is 'on'. Read the reference voltage. Subsequently, in order to read the photocharge generated in the photodiode 110 for a predetermined time and transfer it to the sensing node A, the transfer transistor Tx is turned on to read the signal level. The difference between the reference voltage level and the signal level thus read becomes the output signal of the pixel corresponding to the light input for a predetermined time.

Here, since the pixel array composed of the combination of unit pixels configured as above occupies the largest part of the area of the entire chip, it is important to minimize the size of the unit pixel as much as possible in order to reduce the size of the entire chip and change between pixels. It is a problem. Therefore, the reset transistor Rx, the transfer transistor Tx, the drive transistor Dx, and the select transistor Sx constituting the unit pixel should be implemented in almost the minimum size. Threshold voltage and current driving capability vary from pixel to pixel, making it difficult to minimize the size of a unit pixel. However, this difference is greater between chips, wafers, and lots than with differences between pixels, especially for drive transistors Dx and select transistors Sx. Although hardly affected, the reset transistor Rx and the transfer transistor Tx have a great influence on the image quality of the CMOS image sensor.

On the other hand, since the supply voltage is steadily decreasing recently, the CMOS image sensor cannot use a sufficiently high supply voltage, thereby reducing the dynamic range of the pixel. To overcome this limitation, the maximum dynamic range must be obtained for a given supply. As described above, since the size of the reset transistor Rx and the transfer transistor Tx is very small, the threshold voltage and the current driving capability are very large due to the change inevitably generated during the process. In particular, when the threshold voltage is increased and the current driving capability is decreased, the reference voltage is so low that the operation of the load transistor LD distorts the signal when reading the signal level. When the threshold voltage decreases and the current driving capability increases, the reference voltage becomes too high, and the sample and hold operation, which serves as an interface between the pixel and the analog-to-digital converter, reads out of the normal operating range and distorts the signal. The image quality deteriorates.

Considering the margin of change between chip, wafer, and lot compared to the change between pixels, the dynamic range of the pixel is so small that it needs to be amplified to analog-to-digital conversion. Since the noise generated during and reading is amplified at the same time, the image quality of the chip is reduced.

The present invention has been made to solve the above problems, and by reading the reference voltage of the dummy pixel array to obtain an average, if the value is higher than the desired level of the desired voltage, and reduces the 'on' voltage of the reset transistor and the transfer transistor The purpose of the present invention is to provide a CMOS image sensor that improves image quality by preventing the distortion of the reference voltage level and the signal level from the pixel by increasing the 'on' voltage of the reset transistor and the transfer transistor when the voltage is low.

1 is a block diagram of a unit pixel of a general CMOS image sensor.

2 is a block diagram of a schematic CMOS image sensor having a main pixel array and a dummy pixel array.

3 is a sample and hold circuit diagram in accordance with one embodiment of the present invention for storing a reference voltage level and a signal voltage level of a pixel;

4 is a block diagram of a CMOS image sensor according to an embodiment of the present invention.

* Description of the main parts of the drawing

300: low decoder 310: photodiode

320: sample and hold circuit portion 330: comparator

340: counter 350: control unit

400: unit pixels

The present invention for achieving the above object, in the CMOS image sensor having a main pixel array and a dummy pixel array arrayed into unit pixels consisting of a photodiode, a reset transistor, a transfer transistor, a drive transistor and a select transistor, A row decoder for controlling each row of the pixel array; First to third driving means connected to the row decoder to drive a reset transistor, a transfer transistor, and a select transistor of the unit pixel in each row of the pixel array; A sample and hold circuit unit connected to an output terminal of the unit pixel to sample and hold a reference voltage and a signal voltage from the pixel; Switching means connected to the sample and hold circuit part and switched only when the reference voltage of the dummy pixel array is read to switch the reference voltage of the dummy pixel array output from the sample and hold circuit part; Comparison means for comparing a reference voltage of the dummy pixel array switched by the switching means with a target reference voltage arbitrarily set according to a power supply voltage and a process change; Counting means for receiving a comparison result of the comparing means and counting the number of '1' and the number of '0'; And control means for controlling the first to third driving means in response to a counting result of the counting means.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

CMOS image sensor, as shown in Figure 2, the dummy pixel around the pixel array and the pixel array to reduce the process edge effects and reduce the noise generated in the digital block to the main pixel array It further comprises an array (dummy pixel array).

3 is a sample and hold circuit diagram for storing a reference voltage level and a signal voltage level of a pixel. The reference voltage level and the signal level of a unit pixel are stored in respective capacitors, and then read and applied to the analog-to-digital converter.

Referring to FIG. 3, the sample and hold circuits are transistors M2 and M3 connected to the unit pixel 200 to switch the reference voltage and the signal voltage, and the reference and signal voltages respectively connected to the transistors M2 and M3. Capacitors CR and CS, respectively, and transistors M4 and M5 respectively connected to the capacitors CR and CS to serve as buffers for transmitting signals stored in the capacitors to the analog-to-digital converters, respectively. A transistor connected between the transistors M1, M6 and M7 for supplying the bias current and the gate terminals of the transistors M5 and M4 to prevent distortion of a signal due to offset voltages present in the transistors M4 to M7. It consists of M9.

More specifically, connecting the bodies of the transistors M4 and M5 to the source terminals of the respective PMOS transistors is to prevent distortion of a signal due to a body effect.

The sample and hold circuit unit configured as described above stores the reference voltage and the signal voltage output from the pixel in the capacitors CR and CS, respectively, and then outputs the signals stored in the respective capacitors through the transistors M4 to M7. Output, Signal Output), and this signal is input to the analog-to-digital converter.

FIG. 4 is a block diagram of a CMOS image sensor according to an exemplary embodiment of the present invention. The switching of transistors constituting the unit pixel 400, the sample and hold circuit 320 of FIG. 3, and the unit pixel 400 is performed. It consists of control circuit parts for controlling.

More specifically, the CMOS image sensor of the present invention includes a unit pixel 400 including four transistors Rx, Tx, Dx, and Sx, a row decoder 300 for controlling each row of the pixel array, and Inverters INV1, INV2, INV3 for driving the reset transistor Rx, the transfer transistor Tx, and the select transistor Sx of the pixel in the row of the pixel connected to the output terminal of the unit pixel 400, and the reference from the pixel. A sample and hold circuit unit 320 for sample and hold voltage and signal voltage, and a reference voltage output from the sample and hold circuit unit 320 when the reference voltage of the dummy pixel array is read when connected to the sample and hold circuit unit 320. A transistor M8 for switching a reference output and a non-inverting input terminal (+) are connected to the drain terminal of the transistor M8, and a target reference voltage (Target Reference) arbitrarily set according to a power supply voltage and a process change to the inverting input terminal (-) Licensed) The comparator 330 to compare, the counter 340 counting the number of '1' and the number '0' of the comparison result output from the comparator 330, and the reset transistor Rx according to the result of the counter 340. ) And a control unit 350 for controlling the operations of the inverters INV1, INV2, and INV3 driving the transfer transistor Tx and the select transistor Sx.

Here, as a result of counting the comparison result of the comparator 330, the control unit 350 increases the power supply voltages of the inverters INV1 to INV3 when the number of '1' is more than a predetermined amount α by more than the number of '0'. If the number of '0' is greater than the number '1' by a predetermined amount α or more, the power supply voltages of the inverters INV1 to INV3 are reduced.

The operation of the CMOS image sensor configured as described above will be described below.

First, a reference output is read from the dummy pixel array located at the outer side of the pixel through the sample and hold circuit 320 and the transistor M8, and the reference voltage and the target reference voltage and the comparator of the read dummy pixel array are read. Compare at 330. In addition, the counter 340 counts the number '1' and the number '0' among the outputs of the comparator 330, and responds to the number of '1' and the number of '0' counted by the controller 350. If the number of '1' is larger than the number of '0', the reference voltage average of the pixel is higher than the target reference voltage, so the reference voltage of the pixel is lowered by lowering the 'on' potential of the reset transistor Rx and the transfer transistor Tx. The transistors M6 and M7 operate in a saturation mode, which is a normal operation mode, and when the number of '0's is greater than the number of' 1 ', the transistor M1 leaves the normal operation mode. Is distorted so that the reference voltage of the pixel is increased by increasing the 'on' potential of the reset transistor Rx and the transfer transistor Tx.

Here, the change of the power supply voltage according to the result of the counter 340 by the control unit 350 is to prevent the loop that controls the reference voltage of the pixel from oscillating and corresponds to the margin controlling the target reference voltage and the power supply voltage. Can change the size of α.

As described above, by setting the reference voltage of the pixel to an optimal value for the power supply voltage and the process change, a large signal can be obtained without distorting the signal from the pixel, thereby maximizing the characteristics of the CMOS image sensor.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention made as described above, even if using a wider range of power supply voltage than the prior art, the characteristics of the product is maintained, and less sensitive to process changes, resulting in the implementation of high-quality CMOS image sensor and increase in chip yield.

Claims (4)

In a CMOS image sensor having a main pixel array and a dummy pixel array, which are arranged into unit pixels consisting of a photodiode, a reset transistor, a transfer transistor, a drive transistor, and a select transistor, A row decoder for controlling each row of the pixel array; First to third driving means connected to the row decoder to drive a reset transistor, a transfer transistor, and a select transistor of the unit pixel in each row of the pixel array; A sample and hold circuit unit connected to an output terminal of the unit pixel to sample and hold a reference voltage and a signal voltage from the pixel; Switching means connected to the sample and hold circuit part and switched only when the reference voltage of the dummy pixel array is read to switch the reference voltage of the dummy pixel array output from the sample and hold circuit part; Comparison means for comparing a reference voltage of the dummy pixel array switched by the switching means with a target reference voltage arbitrarily set according to a power supply voltage and a process change; Counting means for receiving a comparison result of the comparing means and counting the number of '1' and the number of '0'; And Control means for controlling the first to third driving means in response to a counting result of the counting means CMOS image sensor comprising a. The method of claim 1, wherein the control means, When the number of '1' counted by the counting means is greater than the number of '0' by more than a predetermined first coefficient, increase the power supply voltage of the first to third driving means, and the number of '0' The CMOS image sensor, characterized in that to reduce the power supply voltage of the first to third driving means when the number greater than the number of '1' by the first coefficient. The method of claim 2, wherein the first coefficient value, CMOS image sensor, characterized in that the variable value. The method of claim 1, wherein the sample and hold circuit portion, First and second transistors connected to an output terminal of the unit pixel to switch the reference voltage and the signal voltage of the pixel, respectively; First and second capacitors respectively connected to the first and second transistors to store a reference voltage and a signal voltage of the pixel; Third and fourth transistors each coupled to the first and second capacitors to buffer a stored signal; Fifth and sixth transistors connected between a power supply voltage terminal and a drain terminal of the third and fourth transistors to supply bias currents, respectively; And A seventh transistor connected between gate ends of the third and fourth transistors to prevent distortion of a signal due to offset voltages present in the third to sixth transistors; CMOS image sensor, characterized in that comprises a.