KR100358129B1 - Method for manufacturing semiconductor device using oxide doped polysilicon layer - Google Patents

Method for manufacturing semiconductor device using oxide doped polysilicon layer Download PDF

Info

Publication number
KR100358129B1
KR100358129B1 KR1019950003927A KR19950003927A KR100358129B1 KR 100358129 B1 KR100358129 B1 KR 100358129B1 KR 1019950003927 A KR1019950003927 A KR 1019950003927A KR 19950003927 A KR19950003927 A KR 19950003927A KR 100358129 B1 KR100358129 B1 KR 100358129B1
Authority
KR
South Korea
Prior art keywords
doped polysilicon
semiconductor device
polysilicon layer
oxide doped
oxide
Prior art date
Application number
KR1019950003927A
Other languages
Korean (ko)
Other versions
KR960032639A (en
Inventor
엄금용
Original Assignee
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1019950003927A priority Critical patent/KR100358129B1/en
Publication of KR960032639A publication Critical patent/KR960032639A/en
Application granted granted Critical
Publication of KR100358129B1 publication Critical patent/KR100358129B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/2822Making the insulator with substrate doping, e.g. N, Ge, C implantation, before formation of the insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Abstract

PURPOSE: A method for manufacturing a semiconductor device is provided to improve properties and to reduce leakage current by using an oxide doped polysilicon layer having high resistivity and high dielectric constant. CONSTITUTION: In a method for manufacturing a semiconductor device, an oxide doped polysilicon layer is used as a passivation layer, an insulating layer or a coating film. The oxide doped polysilicon layer is formed by LPCVD(Low Pressure Chemical Vapor Deposition) using mixed gases of SiH4 and N2O. Preferably, the deposition temperature of the oxide doped polysilicon layer is 600-800°C.

Description

산화물이 도핑된 폴리실리콘막을 사용한 반도체 소자 제조방법Method of manufacturing semiconductor device using oxide-doped polysilicon film

본 발명은 반도체 소자 제조 공정중 절연성 및 유전강도가 우수한 새로운 물질을 적용한 반도체 소자 및 그 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, in which a new material having excellent insulation and dielectric strength is applied during a semiconductor device manufacturing process.

일반적으로 소자의 집적 공정이 완료된 후, 외부에 의한 스크레치(scratch)와 습기의 침투 등으로 부터 소자의 회로내 특성을 보호하기 위하여 보호막(passivation layer)을 형성하고 있다.In general, after the device integration process is completed, a passivation layer is formed to protect the device's in-circuit characteristics from scratches and moisture penetration.

종래에는 반도체 소자 보호막으로서 질화막(Nitride, Si3N4)막을 사용하고 있는데, 질화막(Si3N4)은 아래 반응식<1>에 나타난 바와 같이 증착시 수소(H2)를 발생시키므로, 이 수소가 소자 내부로 침투하여 반도체 소자 내부의 회로특성에 영향을 미침으로써 신뢰성 저하는 물론 특성 저하와 소자에서의 누설전류(Leakage Current) 발생 원인이 되고 있다.Conventionally, a nitride film (Nitride, Si 3 N 4 ) film is used as a semiconductor device protective film. Since the nitride film (Si 3 N 4 ) generates hydrogen (H 2 ) during deposition, as shown in Scheme <1>, the hydrogen By penetrating into the device and affecting the circuit characteristics inside the semiconductor device, the reliability is deteriorated, and the degradation of the properties and the leakage current in the device are caused.

따라서, 본 발명은 높은 신뢰도를 가지고 높은 저항율과 높은 유전 강도를 갖는 새로운 물질을 적용한 반도체 소자 제조 방법을 제공함을 목적으로 한다.Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor device using a new material having high reliability, high resistivity and high dielectric strength.

상기 목적을 달성하기 위한 본 발명의 반도체소자 제조 방법은, SiH4와 N2O 가스를 사용한 저압화학기상증착법(LPCVD)으로 형성되는 산화물이 도핑된 폴리실리콘막을 소자보호막 또는 절연막 또는 코팅층으로 사용하는 것을 특징으로 한다.The semiconductor device manufacturing method of the present invention for achieving the above object, using an oxide-doped polysilicon film formed by low pressure chemical vapor deposition (LPCVD) using SiH 4 and N 2 O gas as a device protective film or insulating film or coating layer It is characterized by.

바람직하게, 본 발명에서 상기 산화물이 도핑된 폴리실리콘 증착시 N2O/SiH4를 1∼5% 비율로 하는 것을 특징으로 한다.Preferably, in the present invention, when the oxide-doped polysilicon is deposited, N 2 O / SiH 4 is characterized in that 1 to 5% ratio.

바람직하게 본 발명에서 상기 산화물이 도핑된 폴리실리콘 증착시 공정 온도를 600~800℃로 하는 것을 특징으로 한다.Preferably in the present invention is characterized in that the process temperature is 600 ~ 800 ℃ when the oxide-doped polysilicon deposition.

이하, 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail.

본 발명은 폴리실리콘 내에 산화 석출물(Oxide SiO2또는 SiOx)이 도핑된 물질(이하, "산화물이 도핑된 폴리실리콘막", Oxide Doped Polysilicon이라 칭한다)을 반도체 소자의 보호막 또는 절연막 또는 그 밖의 질화막 대체 물질로 사용하는 것에 그 특징을 갖는다. 폴리실리콘 : 산화 석출물 사이의 비율은 70 : 30으로 하는 것이 바람직하다.In the present invention, a material doped with an oxide precipitate (Oxide SiO 2 or SiOx) in polysilicon (hereinafter referred to as an “oxide-doped polysilicon film” or an oxide doped polysilicon) is substituted for a protective film or insulating film or other nitride film of a semiconductor device. It is characterized by its use as a substance. It is preferable that the ratio between polysilicon and an oxide precipitate is 70:30.

상기 산화물이 도핑된 폴리실리콘막을 형성하는 방법은, SiH4와 N2O 가스를 사용한 저압화학기상증착법(LPCVD)이고, 증착시 공정 온도는 600~800℃로 하고, N2O/SiH4를 1~5% 비율로 하면 폴리실리콘 : 산화 석출물 사이의 비율은 70 : 30으로 형성할 수 있다.The method of forming the oxide-doped polysilicon film is low pressure chemical vapor deposition (LPCVD) using SiH 4 and N 2 O gas, the process temperature during deposition is 600 ~ 800 ℃, N 2 O / SiH 4 When the ratio is 1 to 5%, the ratio between polysilicon and oxidized precipitates may be 70:30.

본 발명에 의하여 생성된 산화물이 도핑된 폴리실리콘 보호막은 비저항(ρ )이 1012~1014Ω.cm로 우수하여 높은 저항율과 높은 유전강도를 가지게 된다. 참고적으로 폴리실리콘막의 비저항은 106Ω.cm이다.The oxide-doped polysilicon protective film produced by the present invention has a high resistivity (ρ) of 10 12 to 10 14 Ω.cm, which has high resistivity and high dielectric strength. For reference, the specific resistance of the polysilicon film is 10 6 Ω.cm.

한편, 상기 설명과 같은 산화물이 도핑된 폴리실리콘막은 습식식각(HF, BOE)으로 폴리실리콘 내의 산화물을 제거시켜 그 다공성의 폴리실리콘을 커패시터의 전하저장전극으로 사용할 경우 반도체 소자의 캐패시터 용량 확보에 크게 도움을 줄수 있으며, 그 이외의 층간절연막, 버퍼(Buffer) 절연막 등으로도 이용 가능하다.On the other hand, the polysilicon film doped with the oxide as described above is a wet etching (HF, BOE) to remove the oxide in the polysilicon, when the porous polysilicon is used as a charge storage electrode of the capacitor greatly secure the capacitor capacity of the semiconductor device In addition, it can be used as an interlayer insulating film, a buffer insulating film, and the like.

또한, 반도체 제조 공정 중 웨이퍼 뒷면의 백 식각(Back Etch)시 웨이퍼 전면의 코팅층으로 이용 가능하다.In addition, it can be used as a coating layer on the front of the wafer during the back etching of the back of the wafer during the semiconductor manufacturing process.

본 발명은 신뢰성 있고, 내마모성이 적으며, 저응력을 가지는 산화물이 도핑된 폴리실리콘막을 반도체 소자의 회로특성을 보호하는 보호막 또는 절연막으로 사용하여 소자의 특성저하 방지, 누설전류 감소 등의 효과를 가져온다.The present invention uses an oxide-doped polysilicon film that is reliable, has low wear resistance, and has a low stress, as a protective film or insulating film to protect circuit characteristics of a semiconductor device, thereby reducing the characteristics of the device and reducing leakage current. .

Claims (3)

반도체 소자 제조방법에 있어서,In the semiconductor device manufacturing method, SiH4와 N2O 가스를 사용한 저압화학기상증착법(LPCVD)으로 형성되는 산화물이 도핑된 폴리실리콘막을 소자보호막 또는 절연막 또는 코팅층으로 사용하는 것을 특징으로 하는 반도체 소자 제조방법.An oxide-doped polysilicon film formed by low pressure chemical vapor deposition (LPCVD) using SiH 4 and N 2 O gas is used as a device protection film, an insulating film or a coating layer. 제1항에 있어서,The method of claim 1, 상기 산화물이 도핑된 폴리실리콘 증착시 N2O/SiH4를 1∼5% 비율로 하는 것을 특징으로 하는 반도체 소자 제조방법.The method of manufacturing a semiconductor device, characterized in that when the oxide-doped polysilicon deposition N 2 O / SiH 4 in 1 to 5% ratio. 제1항에 있어서,The method of claim 1, 상기 산화물이 도핑된 폴리실리콘 증착시 공정 온도를 600~800℃로 하는 것을 특징으로 하는 반도체 소자 제조방법.Method for manufacturing a semiconductor device characterized in that the process temperature is 600 ~ 800 ℃ during the deposition of the oxide-doped polysilicon.
KR1019950003927A 1995-02-27 1995-02-27 Method for manufacturing semiconductor device using oxide doped polysilicon layer KR100358129B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950003927A KR100358129B1 (en) 1995-02-27 1995-02-27 Method for manufacturing semiconductor device using oxide doped polysilicon layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950003927A KR100358129B1 (en) 1995-02-27 1995-02-27 Method for manufacturing semiconductor device using oxide doped polysilicon layer

Publications (2)

Publication Number Publication Date
KR960032639A KR960032639A (en) 1996-09-17
KR100358129B1 true KR100358129B1 (en) 2003-01-24

Family

ID=37490385

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950003927A KR100358129B1 (en) 1995-02-27 1995-02-27 Method for manufacturing semiconductor device using oxide doped polysilicon layer

Country Status (1)

Country Link
KR (1) KR100358129B1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR850000777A (en) * 1983-06-08 1985-03-09 원본미기재 Porous Semiconductor Dopant Carrier and Manufacturing Method Thereof
KR880005667A (en) * 1986-10-31 1988-06-29 개리 알 · 플로테커 Semiconductor Dopant Source
US4800175A (en) * 1987-05-29 1989-01-24 Owens-Illinois Television Products Inc. Phosphorous planar dopant source for low temperature applications
KR940016491A (en) * 1992-12-23 1994-07-23 김주용 Method of depositing stacked protective film of semiconductor device
KR970707707A (en) * 1995-09-21 1997-12-01 요르크 키켈하인 Coating for forming the conductor on the surface of the electrically insulating substrate, its formation method and manufacturing method of the conductor using the coating

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR850000777A (en) * 1983-06-08 1985-03-09 원본미기재 Porous Semiconductor Dopant Carrier and Manufacturing Method Thereof
KR880005667A (en) * 1986-10-31 1988-06-29 개리 알 · 플로테커 Semiconductor Dopant Source
US4800175A (en) * 1987-05-29 1989-01-24 Owens-Illinois Television Products Inc. Phosphorous planar dopant source for low temperature applications
KR940016491A (en) * 1992-12-23 1994-07-23 김주용 Method of depositing stacked protective film of semiconductor device
KR970707707A (en) * 1995-09-21 1997-12-01 요르크 키켈하인 Coating for forming the conductor on the surface of the electrically insulating substrate, its formation method and manufacturing method of the conductor using the coating

Also Published As

Publication number Publication date
KR960032639A (en) 1996-09-17

Similar Documents

Publication Publication Date Title
JP3027941B2 (en) Storage device using dielectric capacitor and manufacturing method
US6136728A (en) Water vapor annealing process
US4810673A (en) Oxide deposition method
US6380056B1 (en) Lightly nitridation surface for preparing thin-gate oxides
US5985730A (en) Method of forming a capacitor of a semiconductor device
KR100282413B1 (en) Thin film formation method using nitrous oxide gas
JP2755348B2 (en) Passivated double dielectric system and method of making same
EP0137196A2 (en) Process for making high dielectric constant nitride based materials and devices using the same
US6407013B1 (en) Soft plasma oxidizing plasma method for forming carbon doped silicon containing dielectric layer with enhanced adhesive properties
US6090675A (en) Formation of dielectric layer employing high ozone:tetraethyl-ortho-silicate ratios during chemical vapor deposition
US20050275044A1 (en) System and device including a barrier alayer
KR20000052627A (en) Chemical vapor deposition of silicate high dielectric constant materials
US6709991B1 (en) Method of fabricating semiconductor device with capacitor
CN100380609C (en) Uv-enhanced oxy-nitridation of semiconductor substrates
KR20150095563A (en) A method for manufacturing gate insulation layer
KR100358129B1 (en) Method for manufacturing semiconductor device using oxide doped polysilicon layer
CN111509081A (en) Preparation method of ultrathin oxygen-containing nitrogen-silicon film and application of ultrathin oxygen-containing nitrogen-silicon film in passivation of contact battery
US7535047B2 (en) Semiconductor device containing an ultra thin dielectric film or dielectric layer
CN100487877C (en) Semiconductor device producing method
Yamada Continuous ultra‐dry process for enhancing the reliability of ultrathin silicon oxide films in metal–oxide semiconductors
Chen et al. Effects of O2-and N2O-plasma treatments on properties of plasma-enhanced-chemical-vapor-deposition tetraethylorthosilicate oxide
WO2015129279A1 (en) Semiconductor device comprising a hydrogen diffusion barrier and method of fabricating same
Chou et al. Application of liquid phase deposited silicon dioxide to metal-oxide-semiconductor capacitor and amorphous silicon thin-film transistor
KR100308501B1 (en) Method for forming capacitor of semiconductor device
Pai et al. Material properties of plasma‐enhanced chemical vapor deposition fluorinated silicon nitride

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20050923

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee