KR100353644B1 - Method for medium access controlling in ethernet switch - Google Patents

Abstract

In the half-duplex mode, the media access control method of the Ethernet switch determines whether a jam signal is transmitted when a fuzzy request command corresponding to the limit of the packet memory is reached and transmits the jam signal to the data terminal device. When the off time has elapsed, the packet stored in the packet memory is transmitted. In the case of full-duplex mode, the remote terminal transmits a remote fuzzy frame corresponding to the limit of the packet memory to block packet transmission of the data terminal devices. When the fuzzy frame is received while transmitting the packet stored in the packet memory, the process of checking the specific bit value of the media access control register and whether the remote fuzzy frame is active to determine whether to continue to transmit the packet is reduced. Throughput on the network The effect of increasing this can be obtained.

Description

Media access control method of Ethernet switch {METHOD FOR MEDIUM ACCESS CONTROLLING IN ETHERNET SWITCH}

The present invention relates to a media access control method performed in an Ethernet switch, and more particularly, to a method for resolving loss and congestion of packets transmitted and received.

In general, a communication method performed in Ethernet corresponding to a model of a local area network (LAN) transmits packets between Ethernet switches or between Ethernet switches and data terminal equipment (DTE). And Receive.

Here, the DTE refers to an apparatus having a communication control function that performs functions as a data transmitter and a data receiver as a functional unit of a data station, and is executed according to a link protocol.

In general, a communication system has an overall communication structure for a system, a representative structure of which is an OSI reference model published by the International Organization for Standardization (ISO).

Therefore, the Ethernet also uses an OSI reference model composed of a physical layer, a data connection layer, a communication network layer, a transport layer, a session layer, a presentation layer, and an application layer as a basic structure. In particular, among the layers of the OSI reference model constituting Ethernet, the data connection layer transmits reliable data in the communication network layer through a physical connection at the bottom, and includes a function of framing, data bytes, frame synchronization, and error detection. . At this time, the protocol used in the data connection layer performs a special medium access control (MAC) method related to a transmission medium of a LAN.

Meanwhile, Ethernet has methods for reducing packet loss rate and congestion resolution in packet transmission and reception. Representative examples thereof include a backpressure method and a PAUSE frame transmission method. The backpressure scheme is used when the MAC is in Half-Duplex mode, and the PAUSE frame transmission scheme is used when the MAC is in Full-Duplex mode.

First, a back pressure method used when the MAC is in a half-duplex mode will be described with reference to FIG. 1. First, the half-duplex mode is a case in which transmission and reception occur through one transmission path, and the receiving side communication station or Ethernet switch is a mode in which only a reception side can be received while a predetermined communication station or Ethernet switch is transmitting.

When the packet memory 112 reaches a threshold while the Ethernet switch 110 having a plurality of ports (Port1 to Port8) receives a packet through one port (Port8), an external central processing unit (CPU) or The Ethernet controller unit (hereinafter referred to as "ECU") inside the switch determines that no more packets can be stored.

Upon determining this, the CPU or ECU requests the output of a jam signal to assume that a collision has occurred in the corresponding port Port8, and the transmitting unit Tx receives the jam signal from all ports ( Port 1 through Port 8) are sent to the other side.

In this case, the jam signal generally uses a frame composed of all 32 bits (32 bits), and the collision is a case where a collision occurs between a transmission packet and a reception packet because reception occurs while transmitting a packet on the same path. it means.

On the other hand, when the packet memory 112 reaches the limit and considers that a collision has occurred, the corresponding Ethernet switch 110 performs the same operation as when a collision occurs.

For reference, a brief description of an operation that occurs when a collision occurs during packet transmission in half-duplex mode, the Ethernet switch 110 sends a jam signal to the DTE 120 corresponding to the port (Port8) where the collision occurred After the Inter Frame Gap Time (IFG), which is defined as a standard, waits for a back-off time and retry packet transmission.

The IFG time is a time defined to prevent channel monopoly of a specific switch or DTE in half-duplex mode. That is, the Ethernet switch or the DTE cannot transmit the next packet continuously after completing the transmission of the packet, and the next packet can be transmitted only after the IFG time has elapsed. For example, an Ethernet with a speed of 10 megabits per second (10 Mbps) would require an IFG time of 9.6 microseconds (9.6 μs); 0.96 microsec for an Ethernet with a speed of 100 megabits (100 Mbps). An IFG time of (0.96 μs) is required.

The back-off time is a collision occurs and the channel idles during the IFG time after the jam signal is transmitted. From the start of this idle period, the transmitter of the DTE 120 involved in the collision waits for a time obtained by multiplying a slot time by a random integer, which is randomly determined, and then detects a carrier detection multiple access (CSMA; Carrier). Attempt to retransmit using a Sense Multiple Access / collision detection (CD) scheme. For example, when the slot time is 512 bit time, the back-off time becomes "512 bit time x random integer". The bit time is referred to as one bit time when one bit is transmitted on a cable. One slot time is a time sufficient to stop the transmission by detecting a collision from the time when the first bit of the preamble is transmitted during CAMA / CD operation. Usually, 512 bit time is one slot time. For example, for Ethernet running at 100 Mbps, the clock uses 25 megahertz (MHz), with a 512-bit time of approximately 512 nanoseconds (512 ns).

On the other hand, the counterpart terminal receiving the jam signal determines that a collision has occurred while transmitting the packet, and remains idle during the IFG time and the back-off time, and starts transmitting the packet again after the time elapses. .

When the packet memory 112 reaches its limit, the Ethernet switch 110 transmits a packet stored in the packet memory 112 during the back-off time to empty the packet memory 112 to prepare for receiving the next packet. do.

Unfortunately, the worst case may occur when a transmission is made through a port that is now being received. At this time, the back-off between the transmission port of the Ethernet switch and the DET is continuously progressed, and a shape in which a collision occurs continuously may occur.

In other words, when the Ethernet switch performs the back pressure, it occurs for all ports instead of specific ports, and thus causes a fuzzy state of the network. Even if this is not always the case, a network may be paralyzed for a long time unless the transmission is performed quickly and the packet memory is emptied.

Next, a PAUSE frame transmission method used to solve packet loss rate and congestion when the MAC is in Full Duplex mode will be described with reference to FIG. 2. First, the full duplex mode (Full_Duplex mode) is a method that separates the transmission path so that the connection between the switch and the switch or the transmission and reception between the communication station and the communication station can be simultaneously enabled. The fuzzy frame used in the full duplex mode is defined in the standard "IEEE 802.3x" as one of the MAC control frames used in the CSMA / CD scheme.

The fuzzy frame transmission method used in the full duplex mode can be distinguished from two viewpoints. That is, the case where the packet memory of the Ethernet switch reaches the limit and the case where the packet memory of the DTE reaches the limit is the case. Therefore, the following description separately.

First, referring to the case of the remote purge, when receiving through a specific port, the packet memory (not shown but provided inside the switch 210) reaches a limit and cannot receive any more packets. If 230 or ECU 212 determines, it sends a transmission frame (Tx) 218 to send a pause frame (b or c, d). The transmitting unit (Tx) 218 receiving the command transmits a packet having a predetermined format (purge frame) to all the counterpart DTEs 220 until the Ethernet switch 210 can accept the packet. You will be asked to pause.

After that, the Ethernet switch 210 will continuously transmit the packets stored in the packet memory in order to empty the packet memory quickly, and the packets received from the other party 220 and the fuzzy frame are not received at all.

In this situation, if the packet memory of the counterpart 220 also reaches the limit, a fuzzy frame should be transmitted to the Ethernet switch 210 to cope with this problem, but the Ethernet switch 210 will ignore the packet and continue packet transmission. In this case, when the counterpart 220 intending to send a packet in the Ethernet switch 210 is a terminal that reaches a memory limit, the packet loss rate is increased as the transmitted packet is dropped during transmission.

In the case of the opposite purge, when the counterpart 220 transmits a purge frame, the receiver Rx 216 detects that the counterpart 220 has requested to suspend packet transmission to the transmitter Rx 218. (A). While the transmitter (Rx) 218 detects this and temporarily stops the packet transmission, the counterpart DTE 220 continues the transmission to free the memory reaching the limit.

However, even in such a situation, even if the packet memory of the Ethernet switch 210 reaches the limit and no longer receives the packet, the DTE 220 ignores this and keeps the remote fuzzy. Only transmission is performed. Therefore, there is no proper interworking relationship between the Ethernet switch 210 and the DTE 220, but only the loss rate of the packet has to be increased.

Accordingly, an object of the present invention for solving the above problems is to provide an interoperable flow control method rather than a one-way flow control method for media access control of an Ethernet switch.

Another object of the present invention is to provide a method of improving packet loss rate by reducing a back-off time delayed after transmitting a jam signal after reaching a memory limit in a half-duplex Ethernet switch.

It is still another object of the present invention to provide a method of processing a fuzzy frame received in a state in which a remote purge occurs in a full duplex Ethernet switch to minimize packet loss.

It is still another object of the present invention to provide a method for processing packet loss to a minimum when the memory reaches a limit in a state in which a purge is generated according to a fuzzy frame received in a full-duplex Ethernet switch.

The present invention according to the first aspect for achieving the above object is to receive a packet from a data terminal device connected to each port and to store the packet in the packet memory, when there is a fuzzy request command corresponding to reaching the limit of the packet memory It determines whether to send a jam signal and transmits the jam signal to the data terminal device connected to each port based on the determined result, delays the fast backoff time after the interframe holding time elapses, and sends the packet stored in the packet memory. The media access control method of the Ethernet switch is implemented by transmitting to the data terminal through the corresponding port.

According to a second aspect of the present invention for achieving the above object, a remote purge when the packet memory reaches a limit while receiving a packet from a data terminal device through a receiving transmission path connected to each port and storing the packet in the packet memory. Transmits a frame to a transmission transmission path connected to each of the ports to block packet transmission of the data terminal devices, and transmits a packet stored in the packet memory through the transmission transmission path connected to the corresponding port to empty the packet memory, and When a fuzzy frame transmitted from one of the data terminal devices is received during packet transmission, the data terminal device which transmits the fuzzy frame according to the check result by checking a specific bit value of a media access control register and whether the remote purge frame is active Whether to continue sending packets to As a process, we implement the media access control method of the Ethernet switch.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing a signal processing flow in a back pressure method used when medium access control is in half duplex mode.

2 is a diagram illustrating a signal processing flow in a fuzzy frame transmission method used when medium access control is in full duplex mode.

3 is a diagram illustrating a protocol configuration of an Ethernet switch and a data terminal device for applying the present invention.

4 is a diagram illustrating a configuration for media access control of an Ethernet switch in a half-duplex mode according to an embodiment of the present invention.

FIG. 5 is a diagram showing a signal processing flow transmitted between the components shown in FIG. 4; FIG.

6 is a diagram illustrating a control flow for performing media access control in an Ethernet switch in a half-duplex mode according to an embodiment of the present invention.

7 illustrates a configuration for media access control of an Ethernet switch in full duplex mode according to an embodiment of the present invention.

8 and 9 illustrate signal processing flows transmitted between the components shown in FIG. 7 to perform a remote purge.

FIG. 10 is a diagram illustrating a control flow according to the signal processing flow shown in FIGS. 8 and 9.

FIG. 11 is a diagram illustrating a signal processing flow transmitted between each component shown in FIG. 7 to perform a purge. FIG.

FIG. 12 is a diagram showing a control flow according to the signal processing flow shown in FIG. 11; FIG.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, the protocol configuration of the Ethernet switch and the data terminal device for applying the present invention is as shown in FIG. Referring to FIG. 3, the Ethernet switch and the data terminal device are composed of a higher layer, a data link layer (MAC), and a physical layer. In other words, the Ethernet switch and the data terminal device receive the data of the upper layer, combine them into frames, and then transfer the data to the physical layer where the actual data is transferred, that is, a medium access control (Medium Access Control) Hereinafter referred to as " MAC " Meanwhile, the MAC is largely composed of a transmit block and a receive block, and configurations to be described later may be made by the MAC.

The configuration for controlling the media access of the Ethernet switch in the half-duplex mode according to an embodiment of the present invention is as shown in FIG.

Referring to FIG. 4, the receiving unit (Rx unit) 310 receives a frame transmitted from the DTE 10 and stores a received frame in an internal memory although not shown in the drawing. Perform. The ECU 20 controls the overall operation according to the invention. In particular, for the media access control of the Ethernet switch according to an embodiment of the present invention, by checking the internal memory and detecting that the internal memory has reached the limit value back pressure to request the generation of a jam signal (jam signal) indicating Generate a backpressure enable signal. A medium access control REGister (MREG) 330 receives the backpressure enable signal to set an enable bit. The transmitter (Tx unit) 320 performs a series of operations for reading a frame to be transmitted from the internal memory and transmitting the frame to the DTE 10. On the other hand, the jam signal generator 322 provided in the Tx unit 320 is set whether the MREG 330 is enabled when a back pressure enable signal is supplied from the ECU 20. Examine it and generate a jam signal. The fast back-off performing unit 324 performs the back-off performed after the jam signal is generated at high speed.

FIG. 5 illustrates a signal processing flow transmitted between the ECU 20, the MREG 330, the Tx unit 320, and the DTE 10 shown in FIG. 4 for an embodiment of the present invention. 6 is a diagram illustrating a control flow processed by the Tx unit 320 to perform media access control in an Ethernet switch in a half-duplex mode according to an embodiment of the present invention.

A configuration for controlling media access of an Ethernet switch in full duplex mode according to an embodiment of the present invention is as shown in FIG. 7.

Referring to FIG. 7, the receiving unit (Rx unit) 310 receives a frame transmitted from the DTE 10 and stores a received frame in an internal memory although not shown in the drawing. Perform. The ECU 20 controls the overall operation according to the invention. In particular, in full-duplex mode according to an embodiment of the present invention to check the internal memory for media access control of the Ethernet switch, the fuzzy frame request command for requesting the generation of a fuzzy frame that notifies when the internal memory reaches the limit value Occurs. In addition, the ECU 20 generates a fuzzy frame cancel command when the limit value of the memory is removed. The MREG 330 enables or disables a fuzzy decision bit by the fuzzy frame request command. The transmitter (Tx unit) 320 performs a series of operations for reading a frame to be transmitted from the internal memory and transmitting the frame to the DTE 10. Meanwhile, the Tx unit 320 receives the purge frame transmission request command, checks whether the MREG 330 is set to be enabled, transmits a fuzzy frame, and receives a purge frame from the counterpart DTE 10 in a remote purge state. Then, it is determined whether the remote purge state is released by checking whether the value set in the MREG 330 and the remote purge signal are active.

FIG. 8 shows a signal processing flow in the case where a purge frame is received from the counterpart DTE 10 while the fuzzy decision bit according to the remote purge is enabled, and FIG. 9 shows the fuzzy decision bit according to the remote purge. The signal processing flow in the case where the purge frame is received from the counterpart DTE 10 in the state where the enable of the is disabled is shown. Meanwhile, the control processing flow performed by the transmitter 320 according to the signal processing flows of FIGS. 8 and 9 is the same as that described in FIG. 10.

FIG. 11 illustrates a signal processing flow when the memory reaches a threshold in a state in which the fuzzy decision bit according to the purge frame reception is enabled, and FIG. 12 illustrates a transmitter 320 in the situation of FIG. Is a diagram illustrating a control flow performed by.

Hereinafter, an operation according to an exemplary embodiment of the present invention will be described in detail with reference to the above configuration.

Meanwhile, in describing the operation according to an exemplary embodiment of the present invention, the operation according to the half-duplex method and the operation according to the full-duplex method will be described separately, and in describing the operation according to the full-duplex method, it can be distinguished from two viewpoints. have. That is, the case where the packet memory of the Ethernet switch reaches the limit and the case where the packet memory of the DTE reaches the limit is the case. Therefore, in describing the operation according to the full-duplex method will be described separately.

First, the operation according to the half-duplex method will be described in detail. As described above, the flow control when operating in the half-duplex method is performed by the backpressure method.

The Tx unit 320 monitors whether a backpressure enable signal is received from the ECU 20 in operation 610 of FIG. 6. Since the backpressure enable signal can no longer receive a packet, the back pressure enable signal is a signal requiring transmission of a jam signal to inform the DTE 10.

Referring to the case in which the back enable enable signal is generated from the ECU 20, a packet (“1” shown in FIG. 4) transmitted from the DTE 10 is not shown in FIG. 4 via the Rx unit 310. It is stored in the packet memory provided in the Ethernet switch 30. The packet memory monitors whether the memory reaches the limit value by storing the received packet and simultaneously notifies the ECU 20 when there is a case in which no more packets can be stored when the limit value is reached. do. When the ECU 20 detects that the packet memory reaches the limit value, the ECU 20 generates a back pressure enable signal to prevent the packet from receiving any more packets ("2" shown in FIG. 4).

The back pressure enable signal generated from the ECU 20 by the above operation is not only provided to set the enable bit of the MREG 330 as shown in step 510 of FIG. 5, but also 512 of FIG. 5. In the step is provided to the Tx unit 320. The signal recorded in the enable bit is used as information for determining whether the Tx unit 320 accepts the back pressure enable signal provided from the ECU 20.

When the back compression enable signal is received, the Tx unit 320 determines this in step 610 of FIG. 6 and proceeds to step 612 of FIG. 6. In step 612 of FIG. 6, the Tx unit 320 reads information of the enable bit of the MREG 330 (“③” shown in FIG. 4) and compares it with the back pressure enable signal provided from the ECU 20. Verifies that this is acceptable.

When the back pressure enable signal provided from the ECU 20 is verified in step 612, the Tx unit 320 generates a jam signal through the jam signal generator 322 provided therein. The generated jam signal is transmitted to the DTE 10 through the path “4” shown in FIG. 4 in step 614 (step 516 of FIG. 5) of FIG. 6. Upon receiving the jam signal, the DTE 10 detects that a collision has occurred between packets on a path, stops packet transmission, and then performs back-off.

In contrast, the Tx unit 320 drives the fast back-off through the fast back-off execution unit 324 provided therein in step 614. The fast back-off is performed by the DTE 10. This is a time difference from the normal back-off. That is, as described above, the back-off time performed in the DTE 10 is random corresponding to one of the number of transmission attempts in the 512-bit time required to transmit a normal 64 byte frame. It is determined by multiplying one integer. However, the fast back-off time is determined by multiplying a random integer corresponding to one of transmission attempts in 12-bit time instead of 512-bit time. The fast back-off time has a shorter period than the normal back off time.

Therefore, the Tx unit 320 operating in the fast back-off ends the back-off earlier than the DTE 10 performing the normal back-off. The termination of the fast-back-off performed by the fast back-off performing unit 324 of the Tx unit 320 is detected in step 616 of FIG. 6. After detecting the end of the fast back-off, the Tx unit 320 proceeds to step 618 of FIG. 6 and reads the packet stored in the packet memory reaching the limit value and transmits the packet to the corresponding DTE 10 (518 of FIG. 5). step)

That is, according to the present invention, by reducing the back-off time performed by the Tx unit 320, the packet stored in the packet memory can be quickly processed, and the packet transmission stop state can be solved more quickly. In addition, the packet loss rate and overall network throughput may be improved in a network composed of a switch and DTEs connected to respective ports of the switch.

Secondly, in the case of remote pause when the packet memory of the Ethernet switch reaches the limit in the full-duplex mode, the operation will be described in detail.

The TX unit 320 monitors whether a command for requesting transmission of the purge frame is received from the ECU 20 in step 1010 of FIG. 10. Since the fuzzy frame transmission request command can no longer receive a packet, the fuzzy frame transmission request command is a command for requesting transmission of a fuzzy frame for notifying the DTE 10.

Referring to the case where the fuzzy frame transmission request command is generated from the ECU 20, the packet transmitted from the DTE 10 is stored in the packet memory although not shown in the drawing via the Rx unit 310. The packet memory monitors whether the memory reaches the limit value by storing the received packet and simultaneously notifies the ECU 20 when there is a case in which no more packets can be stored when the limit value is reached. do. When the ECU 20 detects that the packet memory has reached the limit value, the ECU 20 generates a fuzzy frame transmission request in order to prevent the packet from being received anymore (step 810 of FIG. 8 and step 910 of FIG. 9).

The TX unit 320 receiving the fuzzy frame transmission request command generates a fuzzy frame and transmits the generated fuzzy frame to the DTE 10 in step 1012. This is illustrated in step 812 of FIG. 8 and step 912 of FIG. 9. Meanwhile, the ECU 20 requesting the transmission of the purge frame enables the ignore_pause bit to determine whether to receive the frame in step 814 of FIG. 8 and step 914 of FIG. 9 and further disables the DTE 10 from the DTE 10. Do not receive the transmitted frame.

In operation 1014 of FIG. 10, the Tx unit 320 unilaterally transmits the frame stored in the memory to the DTE 10. This is an operation for emptying the memory that has reached the threshold, and is described at step 816 of FIG. 8 and step 916 of FIG. 9. While transmitting the frame, the Tx unit 320 monitors whether there is a fuzzy frame received from the DTE 10 in step 1016 of FIG. 10.

At this time, when receiving the fuzzy frame while transmitting the frame, the Tx unit 320 checks the currently set ignore_pause bit. This is a process for checking whether the memory can be received out of the threshold value. If the memory is secured to receive a frame by performing the operation of FIG. 1014, the ignore_pause bit will be disabled. Otherwise, the ignore_pause bit is enabled if the memory device is in the limit state. There will be. Enabling or disabling the ignore_pause bit is performed by the ECU 20 as described above. The disabling of the ignore_pause bit is started in step 918 of FIG. 9.

The Tx unit 320 performs the operation of reading the ignore_pause bit in step 1018 of FIG. 10, and determines whether to enable or disable the read by the ignore_pause bit read in step 1018 in step 1020.

If it is determined in step 1020 that the ignore_pause bit is enabled, the Tx unit 320 proceeds to step 1022 and determines whether the current remote purge signal is continuously active. If the ignore_pause bit is enabled in step 1020 and step 1022 and the remote purge active state is maintained, the Tx unit 320 determines that the frame is not in a reception state and proceeds to step 1014 to transmit the frame. The operation continues (step 824 of FIG. 8). The Tx unit 320 requests the ignore_pause bit to the MREG 330, and the MREG 330 provides the ignore_pause bit set by the request. This is started in steps 820 and 822 of FIG. 8, and starts in steps 922 and 924 in FIG. 9. The operation performed in steps 820 and 822 is an example in which the ignore_pause bit is enabled, and the operation performed in steps 922 and 924 is an example in which the ignore_pause bit is disabled.

However, if it is determined in step 1020 that the ignore_pause bit is disabled or in step 1022 it is determined that the remote purge signal is not in an active state, the process proceeds to step 1024 and transmits a purging execution signal. The purging performance signal is a signal transmitted in response to the fuzzy frame detected in step 1016 and is a signal that allows the purge function to be performed to the DTE 10 that has transmitted the purge frame. Therefore, the fuzzing execution signal is provided to the corresponding DTE 10 so that the corresponding DTE 10 performs frame transmission by the fuzzy function.

That is, as described above, in the present invention, when a purge frame is received while performing an operation according to a remote purge, the fuzzy frame received is not ignored but the state of the memory is checked and the purge request is selected and accepted. You can improve the packet loss rate and throughput across the network.

Third, the operation of the DTE packet memory in the full-duplex operation in the case of the pause (Pause) will be described in detail.

The Tx unit 320 performs packet transmission in step 1210 of FIG. 12, and monitors reception of a fuzzy frame through step 1212 while the packet transmission is being performed (steps 1110 to 1112 of FIG. 11). Is received from the other party's DTE 10, which is a frame requiring the transmission stop of the frame since it can no longer receive the frame.

Therefore, when the Tx unit 320 receives the fuzzy frame, the Tx unit 320 stops the packet transmission operation performed in step 1214 and enters the fuzzy state to perform only the reception of the frame. Upon entering the purge state, the Tx unit 320 monitors whether a fuzzy frame transmission request is generated from the ECU 20 when its memory reaches a threshold in step 1216. When the fuzzy frame transmission request is generated, the Tx unit 320 proceeds to step 1218 and requests and reads the fuzzy decision bit ignore_pause bit to the MREG 330. This is illustrated in steps 1118 and 1120 of FIG. 11. The tX unit 320 provided with the ignore_pause bit in step 1218 proceeds to step 1220 and determines whether the ignore_pause bit is enabled. When the ignore_pause bit is enabled, it means that the switch to the purge state as described above. If it is determined in step 1220 that the ignore_pause bit is enabled, the Tx unit 320 proceeds to step 1224 and transmits a fuzzy frame to the DTE 10 and then performs a one-way packet frame transmission operation in step 1224. do. However, if it is determined in step 1220 that the ignore_pause bit is disabled, the Tx unit 320 proceeds to step 1226 to maintain the purge state generated by the relative DTE 10.

As described above, the present invention reduces the back-off time performed by the transmitting side in the half duplex mode, thereby making it possible to quickly process the packet stored in the packet memory, so that the packet transmission stop state can be solved more quickly. In a network of DTEs connected to each port, packet loss rates and overall network throughput can be improved.

In addition, in the full-duplex mode, when the fuzzy frame is received while performing a remote purge operation, the present invention does not ignore the fuzzy frame received unilaterally, but checks the state of the memory and selects and accepts the fuzzy request of the other party. Packet loss rate and network-wide throughput can be improved.

Claims (6)

A method for performing media access control in an Ethernet switch in half duplex mode, the method comprising: Receiving the packet from the data terminal device connected to each port by the internal receiving unit and storing the packet in the internal packet memory; If a fuzzy request command corresponding to reaching the limit of the packet memory according to the received packet storage is received from the Ethernet control unit outside the Ethernet switch, the jam signal by the internal transmitting unit is compared with the value set when the packet memory limit is reached by the Ethernet control unit. The process of determining whether or not to send, Transmitting a jam signal to data terminal devices connected to the respective ports when the jam signal is transmitted; Counting a fast backoff time having a period shorter than the normal backoff time after the interframe holding time elapses; And transmitting the packet stored in the packet memory to the data terminal through the corresponding port when the count of the fast backoff time is completed. The media access control of an Ethernet switch according to claim 1, wherein the jam signal is transmitted when a fuzzy request command provided from an Ethernet control unit and an enable bit value set in a media access control register by the Ethernet control unit are the same. Way. The method of claim 2, wherein the fast backoff time is a time obtained by multiplying a random integer corresponding to one of a 12-bit time and a number of transmission attempts. A method for performing media access control in an Ethernet switch in full duplex mode, the method comprising: A first process of receiving a packet from a data terminal device through a reception transmission path connected to each port and storing the packet in an internal packet memory; A second process of transmitting a remote purge frame to a transmission transmission line connected to each port to block packet transmission of the data terminal apparatuses when the packet memory reaches a limit; A third process of emptying the packet memory by transmitting the packet stored in the packet memory through a transmission transmission line connected to a corresponding port after transmitting the remote purge frame; When a fuzzy frame transmitted from one of the data terminal devices is received during the packet transmission, a specific bit value for indicating a packet memory status and whether to continue packet transmission in the internal media access control register and whether the remote purge frame is active The fourth process of inspection, And a fifth process of determining whether to continue packet transmission to the data terminal apparatus which has transmitted the fuzzy frame according to the check result of the fourth process. 5. The method of claim 4, wherein the third process disables a specific bit value of an internal media access control register to permit packet transmission of the data terminal apparatuses when an area to which the packet memory can receive a frame is secured. Media access control method of the Ethernet switch characterized in that it has a further step of making. The method of claim 5, wherein the fifth process, And if the specific bit value is enabled and the remote purge frame is activated, the received fuzzy frame is ignored and packet transmission to the data terminal apparatus is continued.