KR100353082B1 - Random Hyperchaos signal generating circuit using HVSM model - Google Patents

Abstract

A random hyperchaotic signal generation circuit using an H.V.S.M model is published. The random hyperchaos signal generation circuit comprises: an X-sub-nonlinear mapping circuit for receiving an x chaotic signal of a previous frame and a z chaotic signal of a previous frame and generating an x chaotic signal of a current frame; A Y-part nonlinear mapping circuit for receiving the y chaos signal of the previous frame and the z chaos signal of the previous frame and generating the y chaos signal of the current frame; And a Z portion nonlinear mapping circuit for receiving the x chaos signal of the previous frame and the y chaos signal of the previous frame and generating the z chaos signal of the current frame. Each of the X part, Y part, and Z part nonlinear mapping circuits divides signals of a previous frame to be input, symmetrically laterally and performs parallel movement.

Description

Random hyperchaos signal generating circuit using HVSM model

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chaos signal generation circuit for generating a chaos signal, and more particularly, to a chaos signal generation circuit using a HVSM (Hyperchaotic Volume-Preserving Smooth-function Maps) model.

The circuit for generating the chaos signal may be implemented by applying various models of chaos equations. Such a chaotic signal generating circuit can be implemented in various forms using a nonlinear transfer function device, a passive device, and an active device. In addition, the output signal is variously proposed in the form of discrete time and continuous time, in the form of voltage and current, and the like. According to recently published techniques, chaotic neurons are generated as discrete time chaotic signals in chaotic neural networks. In another technique, a two-dimensional chaotic equation is proposed, and a circuit for generating a discrete time chaotic signal using a nonlinear circuit, a delay circuit, and a sample / hold circuit of an operational amplifier is implemented as a chip. The University of Berkeley, Chua, proposed a three-dimensional continuous-time Chua oscillator using passive devices such as resistors, inductors, capacitors, and nonlinear resistors, demonstrating the generation principle of chaos signals and the generation of various chaotic attractors. In addition, a simple chaos generating circuit is disclosed in Korean Patent Nos. 10-185754, 10-0202423 and the like.

However, since the chaotic signal generated by such a conventional chaotic signal generating circuit is simple, it is difficult to be used as an encryption signal or the like. That is, the conventional chaos signal generation circuit has a problem of low randomness and low uniformity in phase space. The chaotic signal of the conventional chaotic circuit system can be easily interpreted using an unmasking prediction technique. Therefore, the conventional chaos signal has a problem that the safety is weak.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and an object of the present invention is to provide a chaos signal generating circuit for generating a chaos signal having high randomness and uniformity.

In order to more fully understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1 is a block diagram conceptually illustrating a random hyperchaotic signal generation circuit according to an embodiment of the present invention.

2 is a timing diagram of first and second clock signals generated in the clock generation circuit of FIG. 1.

FIG. 3 is a block diagram schematically illustrating an X part nonlinear mapping circuit of the present invention of FIG. 1.

4 is a diagram illustrating an example of implementing the arithmetic circuit of FIG. 3.

FIG. 5 is a diagram illustrating an example of implementing the coordinate axis shifting circuit of FIG. 3.

FIG. 6 is a diagram illustrating an example of implementing the nonlinear discrete circuit of FIG. 3.

FIG. 7 is a block diagram schematically illustrating a Y-part nonlinear mapping circuit of the present invention of FIG. 1.

8 is a diagram illustrating an example of implementing the arithmetic circuit of FIG. 7.

FIG. 9 is a block diagram schematically illustrating a Z portion nonlinear mapping circuit of the present invention of FIG. 1.

10 is a photograph measuring the transfer characteristics of the nonlinear mapping circuit.

11 is a photograph of a time waveform of a chaotic signal of the present invention.

12 is a diagram illustrating a random chaotic attractor filling the entire space in a two-dimensional phase space.

One aspect of the present invention for achieving the above technical problem relates to a random hyperchaos signal generation circuit. The random hyperchaos signal generation circuit of the present invention comprises: an X-part nonlinear mapping circuit for receiving an x chaotic signal of a previous frame and a z chaotic signal of a previous frame and generating an x chaotic signal of a current frame; A Y-part nonlinear mapping circuit for receiving the y-chaos signal of the previous frame and the z-chaos signal of the previous frame and generating the y-chaos signal of the current frame; And a Z portion nonlinear mapping circuit configured to receive the x chaotic signal of the previous frame and the y chaotic signal of the previous frame and generate a z chaotic signal of the current frame. Each of the X, Y and Z nonlinear mapping circuits divides the signals of the previous frame to be input, symmetrically laterally and performs parallel movement.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings illustrating preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. For each figure, like reference numerals denote like elements.

1 is a block diagram conceptually illustrating a random hyperchaotic signal generation circuit according to an embodiment of the present invention. The random hyperchaos signal generation circuit of the present invention includes an X part nonlinear mapping circuit 110, a Y part nonlinear mapping circuit 120, and a Z part nonlinear mapping circuit 130.

The X part nonlinear mapping circuit 110 receives the x chaotic signal x (n) of the previous frame and the z chaotic signal z (n) of the previous frame, undergoes a process of operation and transformation, Generates x chaotic signal x (n + 1). The Y unit nonlinear mapping circuit 120 receives, calculates, and modifies the y chaotic signal y (n) of the previous frame and the z chaotic signal z (n) of the previous frame, and y of the current frame. Generates a chaotic signal y (n + 1). The Z part nonlinear mapping circuit 130 receives, computes, and transforms the x chaotic signal x (n) of the previous frame and the y chaotic signal y (n) of the previous frame, and z Generates a chaotic signal z (n + 1).

The following differential simultaneous equations (1), (2), and (3) are defined as HVSM models that generate hyper-chaotic signals of three-dimensional discrete time.

x (n + 1) = f [αx (n) + βz (n)] ------ (1)

y (n + 1) = f [γy (n) + δz (n)] ------ (2)

z (n + 1) = f [ρx (n) + σz (n)] ------ (3)

Here, f is a modular function, and parameters α, β, γ, δ, ρ and σ are variables that can change the chaotic state. These parameters can be changed to obtain various dynamic responses.

Then, after the simultaneous equation is performed at each input n time, that is, discrete time, a hyperchaos signal of (n + 1) time is generated through the modular function to the output of the circulating loop. The three simultaneous differential equations in Equation (1) may be simplified by a linear combination of x (n), y (n), and z (n) values, in consideration of chaotic synchronization.

Preferably, the random hyperchaos signal generation circuit of the present invention, as shown in FIG. 2, the clock signal generator for generating the first and second clock signals (CLK1, CLK2) that do not overlap the activation period ( 140). The first and second clock signals CLK1 and CLK2 may be used to generate input and output signals of the input signals of the X part nonlinear mapping circuit 110, the Y part nonlinear mapping circuit 120, and the Z part nonlinear mapping circuit 130. To control.

FIG. 3 is a block diagram schematically illustrating the X part nonlinear mapping circuit 110 of FIG. 1. Referring to FIG. 3, the X part nonlinear mapping circuit 110 includes an operation circuit 303, a coordinate axis shift circuit 305, a nonlinear discrete circuit 307, and sample / hold circuits 301 and 309. The arithmetic circuit 303 compares and amplifies the chaotic signals x (n) and z (n) of the previous frame input by a predetermined rule.

The coordinate axis shift circuit 305 shifts and outputs the output signal XOPE of the calculation circuit 303 to a predetermined value. The nonlinear discrete circuit 307 divides the output signal XSHF of the coordinate axis shift circuit 305 to have a continuous N-type distribution.

The first sample / hold circuit 309 receives the output signal XDES of the nonlinear discrete circuit 307 in response to the first clock signal CLK1, and thus the x chaotic signal x (n + 1) of the current frame. Select to keep. In a subsequent frame, the second sample / hold circuit 301 receives the output signal x (n + 1) of the first sample / hold circuit 309 in response to a second clock signal CLK2, thereby Is selected by the x chaotic signal x (n) and held.

4 is a diagram illustrating an example of implementing the arithmetic circuit 303 of FIG. 3. The operational circuit 303 includes an operational amplifier 401 and variable resistors RV43 and RV44. The operational amplifier 401 resistors a voltage obtained by dividing the voltage of the x chaotic signal x (n) of the previous frame into the resistor R41 and the variable resistor RV43 and the voltage of the y chaotic signal y (n). The voltage branched between R42 and the variable resistor RV44 is calculated. In the embodiment of FIG. 4, the resistance values of the variable resistors RV43 and RV44 are changed so that the voltages of the chaotic signals x (n) and y (n) of the previous frame are changed by the operational amplifier 401. The rule that is computed can be determined.

FIG. 5 is a diagram illustrating an example of implementing the coordinate axis movement circuit 305 of FIG. 3. The coordinate axis moving circuit 305 includes a direction determining unit 505, signal moving units 501 and 503, and a coupling unit 507. The direction determiner 505 determines the moving direction of the output signal XOPE of the calculation circuit 303. That is, the magnitude relationship between the input signal XOPE of the calculation circuit 303 to a predetermined reference voltage (0V in this embodiment) is compared, and the parallel movement direction of the coordinate axis is determined according to the comparison result. do. The signal moving units 501 and 503 control the parallel movement value of the coordinate axis. In this embodiment, the parallel shift value is controlled by the control voltage VTT and the variable resistors RV51 and RV53. The combiner 507 combines the values moved by the signal movers 501 and 503 in response to the output signal of the direction determiner 505.

The transformation generated by the coordinate axis movement circuit 305 can be summarized by the following equations (4) and (5).

x → x + p (for x <0) ----- (4)

x → x-p (for x≥0) ----- (5)

6 is a diagram illustrating an example of implementing the nonlinear discrete circuit 307 of FIG. 3. The nonlinear discrete circuit 307 includes a nonlinear converter 601, a linear converter 603, and an adder 605. do. The nonlinear converter 601 non-linearly converts the output signal XSHIF of the coordinate axis shifting circuit 305. The linear converter 603 linearly converts the output signal XSHIF of the coordinate axis movement circuit 305. The adder 605 adds an output signal of the nonlinear converter 601 and an output signal of the linear converter 603.

By the nonlinear discrete circuit 307, the conversion performed can be represented by equation (6).

a (t + 1) = h {a (t)}

= k ₁ a (t)-k ₂ {[2 / (1 + exp (-a (t) / ε))]-1} ----- (6)

Here, k _1, k _{2, and} ε may be independently determined by adjusting the variable resistors RV61, RV63, and RV65.

FIG. 7 is a block diagram schematically illustrating the Y-part nonlinear mapping circuit 120 of the present invention. As shown in FIG. 7, the Y part nonlinear mapping circuit 120 is almost the same as the X part nonlinear mapping circuit 110 shown in FIG. 3. However, the arithmetic circuit 703 differs only in that it uses the y chaotic signal y (n) and the z chaotic signal z (n) as input signals.

In the actual experiment of the present invention, the values of the parameters applied to the above formulas (1) to (6) are as follows: α = -4 / 3, β = 1.0, γ = 1/3, δ = 1.0, ρ = 1.0, sigma = 1.0, p = 2.0, k ₁ = 1.0 _, k ₂ = 2.0 _, ε = 0.1.

In order to perform the actual experiment as described above, the calculation circuit 703 of FIG. 7 and the example shown in FIG. 8 may be implemented. This is to set the values of the parameters γ and δ to positive values.

FIG. 9 is a block diagram schematically illustrating the Z portion nonlinear mapping circuit 130 of the present invention of FIG. 1. As shown in FIG. 9, the Z part nonlinear mapping circuit 130 is substantially the same as the Y part nonlinear mapping circuit 120 shown in FIG. 7. However, the arithmetic circuit 903 differs only in that it uses the x chaotic signal x (n) and the y chaotic signal y (n) as input signals. Thus, the output signal of the sample / hold circuit 901 does not act as an input signal of the arithmetic circuit 903.

Subsequently, the configuration and operation of the random hyperchaos signal generation circuit using the HVSM model proposed by the present invention will be described as a whole. In the present invention, since the proposed HVSM model is represented by a three-dimensional discrete time system of differential equations, the chaos signal generation circuit is designed and implemented in discrete output and voltage output states. In order to implement the HVSM model as a circuit, the configuration of Equations (1), (2), and (3) is a three-dimensional system, and thus may be implemented as shown in FIG. 1. Here, x (n), y (n), and z (n) are input chaotic signals, and the system operation operates in synchronization with the first and second clock signals CLK1 and CLK2. The combination of three nonlinear mapping circuits of one-dimensional X part nonlinear mapping circuit, Y part nonlinear mapping circuit, and Z part nonlinear mapping circuit continues to perform nonlinear operations, and outputs x (n + 1), y (n + 1), z (n + 1) is a chaotic signal in discrete time analog form.

The overall configuration of the one-dimensional X part, Y part, and Z part nonlinear mapping circuit is as follows. Overall, it consists of a sample / hold circuit and a nonlinear mapping circuit. The nonlinear mapping circuit is implemented as a calculation circuit and a modulus circuit. In this specification, the modular circuit is implemented with a coordinate axis shift circuit and a nonlinear discrete circuit. The operation of the chaotic signal generating circuit of the present invention is described as follows. First, the chaos signal sampled in the first sample / hold circuit by the first clock signal CLK1 is fed back to the input signal of the calculation circuit in response to the second clock signal CLK2. The operation circuit performs a linear operation on a combination of x (n), y (n), and z (n) which are output signals of the second sample / hold circuit, and the calculated result is transmitted to the input of the modular circuit. The modular circuit outputs the chaotic signals x (n + 1), y (n + 1), and z (n + 1) in the following states discretely.

For the clock signal generation in the chaos signal generation circuit of the HVPM model, the 4017 chip of the decimal counter is used to synchronize the 4049 chip of the hexa inverter buffer and the sample / hold circuits of the CLK1 and CLK2. In addition, the operation speed of the circuit can be changed by adjusting the variable resistor. In the HVSM model, the calculation circuit of the nonlinear mapping circuit part can be implemented as an adder / subtractor and an operational amplifier to calculate the differential simultaneous equations. The op amp uses a wideband LF353 chip. In the present invention, various parameters α, β, γ, δ, ρ, and σ that can change the operating state of the chaos system can be independently changed by adjusting respective variable resistors coupled to the operational amplifier. In addition, each circuit portion may be divided and configured as a whole, and may be designed and implemented as an analog circuit in order to easily implement the IC chip. In particular, in order to form a random hyperchaotic pattern, deformation is first performed by a circuit having continuous N-type transfer characteristics of left and right symmetry based on zero values on the x-axis. And a unique modular circuit is designed to move the result to the coordinate axis. For the circuit implementation of the continuous N-type function, the nonlinear discrete circuit is implemented by combining the nonlinear transform unit and the linear transform unit of the sigmoid function. The nonlinear converter is implemented with two stage CMOS inverters to implement the sigmoid function, and the linear converter is implemented with an operational amplifier. In the implementation, CMOS is implemented by combining separate transistor devices of PMOS and NMOS, and the op amp uses a wideband LF353 chip. The dynamic characteristics of the HVSM model are sensitive to the slope ε of the h (x) function. Therefore, the slope of the sigmoid function can be varied by adjusting the feedback resistance. In the modular circuit, the coordinate axis is first moved, and then the N-type circuit is converted.

After the chaos signal generation circuit of the HVSM model proposed in the present invention is implemented on a board, the experimental results are shown in FIGS. 10 to 12.

In FIG. 10, a sinusoidal signal is applied to an input and an output signal is plotted on the x-axis and an output signal is plotted on the y-axis. The oscilloscope output shows the implementation of two consecutive N-type modular functions.

In FIG. 11, a time waveform of a chaos signal z (n) output from a chaos circuit implementing the HVSM model is measured. As shown in FIG. 11, it can be seen that the chaotic signal output at the discrete time is continuously generated in a random and aperiodic chaotic waveform in a limited region. Such a chaotic signal is not calculated by a software program and thus can be a truly random signal. Therefore, if the output chaotic signal is a database, it can be used as information of a random and safe sequence. Unlike conventional chaos systems, the HVSM model generates complex chaotic signals and shows random chaotic attractors. Therefore, the chaos signal generation circuit of the present invention, as shown in Figure 12, it can be seen that the random chaos attractor filling the entire space in the two-dimensional xy phase space.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the chaotic signal generating circuit of the present invention as described above, a chaotic signal having a high degree of randomness and high uniformity in phase space can be generated. Therefore, since the chaotic signal generated by the present invention has high safety, it can be widely used for secret communication and cryptographic communication.

Claims (6)

An X-part nonlinear mapping circuit for receiving the x-chaos signal of the previous frame and the z-chaos signal of the previous frame and generating the x-chaos signal of the current frame; A Y-part nonlinear mapping circuit for receiving the y-chaos signal of the previous frame and the z-chaos signal of the previous frame and generating the y-chaos signal of the current frame; And A Z-part nonlinear mapping circuit configured to receive the x chaotic signal of the previous frame and the y chaotic signal of the previous frame and generate a z chaotic signal of the current frame, Each of the X, Y, and Z nonlinear mapping circuits And a signal of the previous frame to be input, discrete, left-right symmetrical, and parallel movement. The nonlinear mapping circuit of claim 1, wherein the X, Y, and Z portions are each nonlinear mapping circuits. A calculation circuit for comparing and amplifying the input chaotic signals; A coordinate axis moving circuit for moving the output signal of the calculation circuit; And And a nonlinear discrete circuit having discrete output signals having a continuous N-type distribution. The method of claim 2, wherein the calculation circuit An operational amplifier capable of calculating a voltage of the chaotic signals of the input previous frame according to a predetermined rule; And And a variable resistor capable of converting the input chaotic signals of the previous frame to determine the predetermined rule. The method of claim 2, wherein the coordinate axis movement circuit A direction determining unit which determines a moving direction of the output signal of the calculation circuit; A signal moving unit which moves to a moving value of an output signal of the calculation circuit; And And a combiner configured to combine values moved by the signal mover in response to an output signal of the direction determiner. 3. The nonlinear discrete circuit of claim 2, wherein the nonlinear discrete circuit A non-linear converter for non-linearly converting the output signal of the coordinate axis moving circuit; A linear converter for linearly converting an output signal of the coordinate axis shifting circuit; And And an adder for adding an output signal of the nonlinear converter and an output signal of the linear converter. The method according to any one of claims 2 to 5, The random hyperchaos signal generation circuit Further comprising a clock signal generator for generating a first clock signal and a second clock signal that does not overlap the activation period of each other, Each of the X, Y, and Z nonlinear mapping circuits A first sample / hold circuit configured to select and maintain an output signal of the nonlinear discrete circuit as a chaos signal of the current frame in response to the first clock signal; And And a second sample / hold circuit configured to select and maintain an output signal of the first sample / hold circuit as a chaos signal of a previous frame in a next frame in response to the second clock signal. Signal generating circuit.