KR100346784B1 - Apparatus and Method for 155Mbps ATM cell Tranceiver using Satellite - Google Patents

Abstract

The present invention relates to a 155 Mbps satellite ATM transmission and reception signal processing apparatus and a method thereof, the ground network signal processing means for transmitting the ATM signal input from the ATM switch to the satellite after performing the ground network signal processing, received from the satellite Satellite signal receiving processing means for processing ATM signal and outputting it to ATM switch as ground network signal, connected to each means of the above ground network signal processing means and satellite signal receiving processing means to control the transmission and reception of ATM cell and its control state By providing a transmission and reception control means for displaying the, 155Mbps burst mode (burst mode) signal transmission and reception using the satellite is possible to enable the high-speed ATM satellite communication that was previously possible only on the ground network, which has a technical and industrial ripple effect It is expected to be very large.

Description

155Mb satellite AT / M signal processing device and its method {Apparatus and Method for 155Mbps ATM cell Tranceiver using Satellite}

The present invention is an asynchronous transmission mode (hereinafter referred to as ATM) received from the terrestrial network in order to take advantage of the advantages such as ease of network configuration, wide area, disaster resistance and back-up of the terrestrial network, which are characteristics of the satellite network. The present invention relates to a 155Mbps satellite ATM transceiver signal processing apparatus and method for transmitting a cell to a satellite network.

The 155 Mbps ATM cell transmission technology using the satellite is still in the technology development stage, and the burst transmission / reception technology for time division multiple access (TDMA) access is still in an early stage.

Conventionally, ATM satellite transmission technology up to DS3 level in continuous mode, and technology for transmitting ATM cells to satellites in burst mode (burst mode) at low speed have been developed.

Meanwhile, as a preceding paper, “A BISDN compatible 140 / 155Mbit / s modem / codec, 1995 [Vol., VOL.] Published in COMSAT TECHNICAL REVIEW. 24 NO. 1-2] ”is the main purpose of the burst mode operation of the present invention, while the purpose of the continuous mode (continuous mode) operation, and also compared to the present invention for the purpose of satellite transmission of ATM cells The main focus is on the continuous data transmission. Accordingly, the TDMA operation is impossible due to the same operation speed but different transmission methods and operation modes.

In order to solve the above shortcomings, the present invention defines a 155Mbps class transmission / reception format for burst transmission / reception and future TDMA access required for ultra-high speed satellite ATM transmission technology, and a 155Mbps satellite ATM transmission / reception signal processing for its implementation. It is an object to provide an apparatus and a method thereof.

In order to achieve the above object, the present invention, the ground network signal processing means for transmitting the ATM signal input from the ATM switch to the satellite after processing the ground network signal, the ground network signal by processing the ATM signal received from the satellite Satellite signal reception processing means for outputting to the ATM switch, the ground network signal processing means and the satellite signal reception processing means are connected to each means by bus and the transmission and reception control means for controlling the transmission and reception of the ATM cell and display the control state In order to reliably detect a plurality of duplicately received ATM cell counter values, a predetermined number of '0' and '1's are repeatedly determined for each bit of an ATM cell counter of a predetermined byte to determine the value of the majority or more. A first step of determining a value representing the received bit value, and determining remaining bits after setting the received bit value A second step of extracting an ATM cell counter value, a third step of transmitting the IB only to an error correction decoder based on the detected information after the ATM cell counter is detected by the QPSK radio, and the detected ATM cell A fourth step of sending the ATM cell decoded by the error correction decoder to the terrestrial network output ATM buffer based on the counter value, and a Viterbi decoding and deinterleaving function for each IB block received by the error correction decoder. A fifth step of performing RS decoding and descrambling function in units of RSB blocks, sending the descrambled ATM cell to a terrestrial network output ATM buffer, and then filling the ATM cell with the ATM cell Step 6 of transmitting to the network output signal processing unit and the ATM cell received according to the pre-configured transmission / reception speed by the terrestrial network output signal processing unit using STM-1 or DS 3 And a seventh step of transmitting the ATM cell to the terrestrial network to an optical fiber, a coaxial cable, and an ATM switch.

1 is a 155Mbps ATM cell satellite transmission and reception signal processing structure to which the invention is applied,

2 is a transmission data structure diagram for burst transmission and reception according to the present invention;

3 is a schematic diagram of an ATM cell counter encoding / decoding process according to the present invention;

<Description of the code | symbol about the principal part of drawing>

100: ground network signal processing unit 101: ground network input signal processing unit

102: terrestrial network input ATM buffer 103: error correction encoder

104: multiplexer 105: QPSK modulator

106: D / A converter 200: satellite signal receiving processing unit

201: A / D converter 202: QPSK radio

203: Deflator 204: Error correction decoder

205: terrestrial network output ATM buffer 206: terrestrial network output signal processing unit

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a structural diagram of a 155Mbps ATM cell satellite transmit / receive signal processing according to the present invention. As shown, the transmission and reception signal processing apparatus, the ground network signal processing unit 100 for transmitting the ATM signal input from the ATM switch to the satellite through the ground network signal processing, and the ground network by processing the ATM signal received from the satellite The satellite signal reception processing unit 200 which outputs the signal to the ATM switch and the ground network signal processing unit 100 and the respective parts of the satellite signal reception processing unit 200 are connected to a bus to control transmission and reception of ATM cells and It is composed of a transmission and reception control unit 300 for displaying the status on the display panel.

The terrestrial network signal processing unit 100 is a terrestrial network input signal processing unit 101 which receives a DS class 3 (44.736 Mbps) or STM-1 (155.52 Mbps) ATM signal from an ATM switch and extracts only an ATM cell; The terrestrial network input ATM buffer 102 for temporarily storing the ATM cell extracted by the terrestrial network input signal processing unit 101 and the scrambling and RS encoding by synchronizing the ATM cell outputted from the ATM buffer 102 with the TDMA synchronization signal. An error correcting encoder 103 which processes and encodes both a continuous mode and a burst mode by performing interleaving and convolutional encoding, and stacks the output of the error correcting encoder 103 in an internal buffer to recover a clock carrier of a header. Clock Carrier Recovery (CCR), Unique Word (UW) and Cell Counter headers, and a Multiplexer (MUX) 104 which transmits data on the I and Q channels, and the multiplexer 104 QPSK modulator 105 for QPSK modulation of I, Q data, and output of the modulator 105 The D / A converter 106 converts an output signal into an analog signal and transmits it to a satellite via a radio / intermediate frequency (RF / IF) processing unit (not shown).

In addition, the satellite signal reception processing unit 200, the A / D converter 201 for sampling the ATM signal received from the satellite and delivered to the QPSK radio (Demodulator), and the carrier and clock recovery of the received ATM signal And a QPSK radio 202 for detecting the number of ATM cells in the received frame by restoring an ATM cell counter value after detecting a UW having a specific pattern for synchronization detection of the received signal, based on the detected information. Deframer 203 that transmits only IB to the error correction coder, and performs RS decoding and descrambling after performing Viterbi decoding and deinterleaving for each received IB block. An error correction decoder 204 for performing functions in units of RSB blocks, a terrestrial network output ATM buffer 205 for receiving and storing the descrambled ATM cell, and an ATM cell filled in the buffer in advance ( The land network output signal processor 206 transmits the received ATM cell according to the configured transmission / reception speed to the ATM switcher via the optical fiber or coaxial cable to the ATM cell via the STM-1 or DS3 protocol.

The transmission / reception control unit 300 plays a central role of driving the apparatus, and performs front panel operations such as initialization of ATM cell transmission / reception parts, shape information change, statistical information extraction, operation information processing, and the like. EPROM 302 that carries a microprocessor 301 for performing operations such as display and key information processing, and software (S / W) for driving the apparatus of the present invention. ), An SRAM & NVRAM 303 including an NVRAM storing state information generated when transmitting / receiving the ATM cell, an SRAM storing state or operation information for storing power supply disconnection attempts, and a notebook other than the front panel. Remote controller 305 is responsible for the communication and signal processing with an external controller for remote control such as).

FIG. 2 shows a transmission format for transmitting / receiving a terrestrial ATM cell, which is the object of the present invention, to a satellite network. First, a header including a CCR 11, a UW 12, and a cell counter 13 is provided. 10) and N IBs 20. The IB block is again composed of Reed-Solomon Block (RSB) 21, 22, and 23 and stuffing bytes 24. The RSBs 21, 22, 23 are composed of four ATM cells 21a, 21b, 21c, 21d and 2t bytes 21e.

First, the terrestrial network input signal processor 101 receives an ATM signal of DS3 (44.736 Mbps) or STM-1 (155.52 Mbps), extracts only an ATM cell, and sends it to the terrestrial network input ATM buffer 102.

As shown in FIG. 2, the terrestrial network input ATM buffer 102 sends an ATM cell received from the terrestrial network to the error correction encoder 103 in IB units, which is synchronized with a TDMA sync signal input from the outside of the apparatus.

In fact, one IB 20 includes 4xM ATM cells and N has a maximum value of 8 considering the code rate of the RS encoder.

The external TDMA sync signal determines the synchronization of the 155Mbps ATM cell satellite transceiver, and when the TDMA sync signal is input, the error correction encoder 103, the MUX 104, the QPSK modulator 105, and the D / A converter ( 106 and the like will process the frame shown in FIG. If another TDMA sync signal is input during this period, it is ignored and the frame being processed is transmitted.

In addition, the terrestrial network signal processor 101 counts the number of ATM cells received from the terrestrial network and sends it to the transmitter MUX 104. This value is later encoded and transmitted to the cell counter shown in FIG. 2 by the MUX 104.

The number of ATM cells to be included in one ATM satellite transmission frame is calculated as 4xMxN. When N = 3 and M = 8, a total of 92 ATM cells are transmitted in one frame.

The error correction encoder 103 is internally composed of a scrambler, an RS encoder, an interleaver and a convolutional encoder.

As shown in FIG. 2, the scrambler and the interleaver are performed in units of one IB block, and RS encoding is performed in units of four ATM cells 21a, 21b, 21c, and 21d.

In order for the apparatus to operate in burst mode, the rising encoder performs rising encoding in units of IB blocks and finally stuffs the register contents corresponding to the length of the constraint field inside the rising encoder. 24)

When the output signal of the error correcting encoder 103 is input to the multiplexer 104, the output signal of the error correction encoder 103 is accumulated in the buffer in the multiplexer 104, wherein the size of the internal buffer of the multiplexer 104 is the clock and the CCR of the header shown in FIG. (11), the length of the UW 12 and the cell counter 13 is the same.

The CCR 11 is used to restore the clock and carrier during the CCR period when the receiver is operating in burst mode, and the UW 12 detects a specific pattern after the clock and carrier are restored and is used for synchronization at the receiving side. do.

The cell counter represents the number of ATM cells contained in the transport packet, which is used for the synchronization of variable length IB blocks 20, wherein the cell counter used reliably measures the cell counter value under noise generated on the satellite channel. In order to read the data, 19 duplicated cell counter values of one byte unit are transmitted, which causes the receiver to decode 19 duplicated cell counter values for each bit of the same position.

In the form shown in FIG. 2, the header is transmitted to the I and Q channels by the QPSK modulator 105 and received from the error correction encoder 103 to store the IB blocks 20 stored in the multiplexer 104. To the QPSK modulator 105.

The output of the QPSK modulator 105 is sent to the RF / IF device via a digital-to-analog converter (D / A converter) 106 for transmission to the satellite network.

On the other hand, the ATM signal received from the satellite is sampled in the analog / digital converter (A / D converter) 201 and then transferred to the QPSK demodulator (202), and the QPSK radio (202) received the ATM signal Carrier clock recovery is performed, UW having a specific pattern is detected for synchronization detection of the received signal, and then the ATM cell counter value is recovered to determine the number of ATM cells in the received frame.

The decision method of the ATM cell counter transmitted after a single word is one byte of ATM to reliably detect 19 duplicately received ATM cell counter values 30 as shown in FIG. The number of nineteen '0' and '1' received in duplicate for each bit of the cell counter is determined to determine the value representing the majority or more as the received bit value. Detect the ATM cell counter value.

Accordingly, the CCR 11, UW 12, and ATM cell counter 13 are detected by the QPSK radio 202, and based on this information, the deframer 203 uses only the IB error correction decoder 204. To send.

In addition, based on the detected ATM cell counter value, the error correction decoder 204 sends only the ATM cell counter value to the ground network output ATM buffer 205 as much as the ATM cell counter value.

The error correction decoder 204 performs Viterbi decoding and deinterleaving functions for each received IB block, and then performs RS decoding and descramble functions in units of RSB blocks.

The descrambled ATM cell is sent to the terrestrial network output ATM buffer 205. After the ATM cell is filled in the buffer, the ATM cell is sent to the terrestrial network signal output unit 206.

The ground network output signal processor 206 transmits the received ATM cell according to a preconfigured transmission / reception rate to the ATM switcher via the fiber or coaxial cable to the ATM cell via the STM-1 or DS3 protocol. .

The microprocessor 301 plays a central role in driving the apparatus. The microprocessor 301 serves as a front panel for initializing the ATM cell transmission / reception portion shown in FIG. 1, changing shape information, extracting statistical information, processing motion information, and the like. front panel 304 performs operations such as display and key information processing.

The S / W for driving the device is mounted in the EPROM 302, and the status information generated when transmitting / receiving ATM cells is stored in the NVRAM 303. This is to keep the power supply disconnection attempt and the status or operation information is It is stored in the SRAM 303. In addition, the remote controller 305 is responsible for communication and signal processing with an external controller for remote control of a notebook or the like besides the front panel.

As described above, through the development of the device of the present invention, the transmission and reception of 155Mbps burst mode signals using satellites is enabled, thereby enabling high-speed ATM satellite communication, which was previously possible only in the land network. Is expected to be very large.

Claims (5)

In the transceiver for transmitting a constant speed asynchronous transmission mode (ATM) cell to the satellite network, Terrestrial network signal processing means for transmitting an ATM signal inputted from the ATM switch to a satellite after performing terrestrial network signal processing; Satellite signal receiving processing means for processing the ATM signal received from the satellite and outputting the same to the ATM switch as a terrestrial network signal; 155 Mbps satellite AT / M transmit and receive signal, characterized in that it comprises a transmission and reception control means for controlling the transmission and reception of ATM cells and displaying the control state connected to each means of the terrestrial network signal processing means and the satellite signal receiving processing means. Processing unit. According to claim 1, wherein the ground network signal processing means A terrestrial network input signal processor for receiving an ATM signal of a DS or STM-1 from an ATM switch and extracting only an ATM cell; A terrestrial network ATM buffer for temporarily storing the ATM cell extracted by the terrestrial network input signal processor; Error in processing both continuous mode and bus mode by performing scrambling, Reed-Solomon (RS) encoding, interleaving, and convolutional encoding by synchronizing the ATM cells output from the buffer with time division multiple access (TDMA) synchronization signals. A correction encoder; A multiplexer that accumulates the output of the error correction encoder in an internal buffer, the header transmits data in clock carrier recovery, single word and cell counter headers, and I and Q channels; A QPSK modulator for QPSK modulating I, Q data of the multiplexer; 155Mbps satellite AT / M signal processing comprising a digital / analog (D / A) converter which converts the output signal of the modulator into an analog signal and transmits it to a satellite via a radio / intermediate frequency (RF / IF) processing unit Device. The method of claim 1, wherein the satellite signal receiving processing means An analog-to-digital converter for sampling the ATM signal received from the satellite and delivering it to a QPSK demodulator; Performs carrier and clock recovery of the received ATM signal, detects a single word (UW) with a specific pattern for synchronous detection of the received signal, and recovers the ATM cell counter value to determine the number of ATM cells in the received frame A QPSK radio; A deframer for transmitting only IB to an error correction encoder based on the detected information; An error correction decoder configured to perform a Viterbi decoding and a deinterleaver function for each received IB block, and then perform RS decoding and descrambling in units of Reed-Solomon blocks; A terrestrial network output ATM buffer for receiving and storing the descrambled ATM cell; Receives the ATM cell filled in the buffer and transmits the received ATM cell according to the preconfigured transmission / reception rate to STM-1 or DS 3 level protocol and transmits ATM cell to ground network to ATM switch with fiber optic or coaxial cable. 155Mbps satellite AT transmission and reception signal processing device, characterized in that consisting of a network output signal processing unit. According to claim 1, wherein the transmission and reception control means Tasks such as initialization of ATM cell transmission and reception, modification of shape information, extraction of statistical information, and processing of motion information and operations related to them, which allow the front panel to perform operations such as display and key information processing. A microprocessor for performing; An erasable pyrom (EPROM) containing software (S / W) for driving the satellite AT processor; An SRAM & NVRAM including an NVRAM storing state information generated by the ATM cell transceiver and an SRAM storing state or operation information for storing contents when a power supply is cut off; 155Mbps satellite AT transmission and reception signal processing device, characterized in that consisting of a remote controller for communication and signal processing with an external controller for remote control such as a notebook in addition to the front panel. In the ATM cell counter encoding and decoding method, In order to reliably detect a plurality of duplicately received ATM cell counter values, a predetermined number of '0' and '1' numbers that are repeatedly received for each bit of an ATM cell counter of a predetermined byte are determined to represent more than half of the values. Determining a value as a received bit value; A second step of extracting a predetermined bit ATM cell counter value by determining the remaining bits after setting the received bit value; A third step of detecting the ATM cell counter in a QPSK radio and transmitting only an IB to an error correction decoder based on the detected information; A fourth step of sending the ATM cell decoded by the error correction decoder based on the detected ATM cell counter value to the terrestrial network output ATM buffer as much as the ATM cell counter value; Performing a Viterbi decoding and deinterleaving function for each IB block received by the error correction decoder, and then performing RS decoding and descrambling functions in units of RSB blocks; Sending the descrambled ATM cell to a terrestrial network output ATM buffer, and transmitting the ATM cell to the terrestrial network output signal processor after the buffer cell is filled; The seventh step of transmitting the ATM cell received according to the pre-configured transmission and reception speed by the terrestrial network output signal processor to STM-1 or DS level 3 protocols and to the ATM switch over the terrestrial network with optical fiber or coaxial cable. 155Mbps satellite AT transmission and reception signal processing method.