KR100329848B1 - Multi FA signal generator - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for generating a plurality of frequency allocation signals in order to test the performance of a wireless communication system terminal device such as a code division multiple access system and related components. Such an apparatus of the present invention comprises: key input means; Display means; Memory; A signal generator for generating a predetermined channel (FA) signal; Providing a screen for the interface with the user, and when a command from the user is received through the key input means, and transmits to the channel processor, and interprets the report data received from each channel processor to display on the display means if an error occurs A main processor unit; And N channel processors that receive instructions from the main processor unit to control the frequency, attenuation, and on / off of each channel, and monitor the operation state of the channel and report the operation state to the main processor unit. According to the present invention, it is possible to quickly generate a CDMA signal necessary for testing a wireless terminal device and a component, thereby reducing test time. In addition, all FA outputs such as CDMA system can be made and the test inspection program is built-in to improve the efficiency and reliability of the test with one-touch function.

Description

Code Division Multiple Access Channel Signal Generator {Multi FA signal generator}

The present invention relates to FA (Frequency Allocation) signals of a plurality of predetermined frequency bands in order to test the performance of a terminal device and related parts of a wireless communication system such as a code division multiple access (CDMA) system. Hereinafter referred to as a CDMA channel signal).

Recently, with the widespread use of mobile communication, most wireless communication systems use CDMA. In the CDMA method, multiple individual call paths are multiplexed into the same frequency band (FA: frequency band of 1.23 MHz), and each call path is divided into codes unique to each mobile terminal. Since there is a call path and one mobile operator can use multiple FAs, CDMA repeaters must be able to relay multiple FAs. That is, in the CDMA method, for example, the FA of the 1.23 MHz band in the 25 MHz band can accommodate about 20 channels, and the CDMA repeater must be able to accommodate the FA assigned to the service provider, so that the CDMA channel signal generator for testing the CDMA repeater ( MFSG: Multi FA Signal Generator (MFSG) must generate CDMA signals to test all channels.

However, the conventional CDMA channel signal generator for testing the CDMA channel requires a monitoring PC for matching the test frequency for each channel, which is inconvenient to move, and is complicated and expensive to manufacture and test. In particular, in order to test the frequencies of several channels, a large amount of time is required to generate a signal, which causes a long test time.

The present invention is to provide a CDMA channel signal generator that can be integrated with the LCD and keys for controlling the operation in order to solve the above problems, and can reduce the test time by generating a FA signal of a plurality of channels at the same time. have.

1 is a block diagram showing a controller configuration of a CDMA channel signal generator according to the present invention;

2 is a block diagram showing the configuration of a signal generator of a CDMA channel signal generator according to the present invention;

3 is a detailed configuration diagram illustrating a channel signal generator shown in FIG. 2;

4 is a flowchart illustrating a control procedure performed by a main processor of a CDMA channel signal generator according to the present invention;

5 is a detailed flowchart of the automatic setup routine shown in FIG. 4;

6 is a detailed flowchart of the fine tuning routine shown in FIG. 4;

7 is a flowchart illustrating a procedure performed by a channel processor of a CDMA channel signal generator according to the present invention.

* Explanation of symbols for main parts of the drawings

102: keypad 104: Y pyrom

106: main processor unit 108: LCD display unit

110: channel controller 111: input and output interface

113-1 to 113-N: Channel Processor

120: communication input / output unit 121: GPIB I / O

122: serial I / O 201: source signal generator

210: source signal up-converter 220: source signal amplification and attenuation unit

230: distributor 240-1 to 240-N: channel signal generator

250: combiner 260: output upconverter

In order to achieve the above object, the apparatus of the present invention comprises: a signal generating apparatus for testing a CDMA apparatus by receiving N channels (FA), comprising: key input means; Display means; Memory; A signal generator for generating a predetermined channel (FA) signal; Providing a screen for the interface with the user, and when a command from the user is received through the key input means, and transmits to the channel processor, and interprets the report data received from each channel processor to display on the display means if an error occurs A main processor unit; And N channel processors that receive a command from the main processor unit to control the frequency, attenuation, and on / off of each channel, and monitor the operation state of the channel to report to the main processor unit.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The CDMA channel signal generator according to the present invention is largely divided into a controller and a signal generator. The controller includes a keypad 102, an EEPROM 104, a main processor 106, and an LCD display 108 as shown in FIG. ), The communication input / output unit 120 and the channel control unit 110, and the signal generator as shown in FIG. 2, the source signal generator 201, the source signal up-converter 210, and the source signal amplification and attenuation. The unit 220 includes a divider 230, a channel signal generator 240-1 to 240 -N, a combiner 250, and an output upconverter 260.

Referring to FIG. 1, the keypad 102 is an input device for setting and confirming a system to a desired state by a user, and the EPIROM 104 stores a user's setting state and uses it for later use. The state can be reused as the default, and the system's characteristic adjustments are maintained even during a power outage. The LCD display unit 108 is a display device for checking a user's setting state, error messages, and the current state of the system.

The main processor unit 106 is connected to a main processor (MPU: 106a) with a ROM (ROM: 106b) and a RAM (RAM: 106c), and executes software stored in the ROM (ROM: 106b) to manage the system. An operation performed by the main processor 106a is as shown in Figs. 4 to 6. The communication input / output unit 120 includes a GPIB I / O 121 and a SERIAL I / O ( 122) is connected to the host system via a GPIB or RS-232C interface to provide remote control software and interfaces.

The channel controller 110 includes an input / output interface 111 and N channel processors (MPUs 113-1 to 113-N). The input / output interface 111 includes a main processor 106a and channel processors 113. -1 to 113-N, and each channel processor 113-1 to 113-N optimally controls frequency, attenuation degree, channel on / off and abnormal state detection of each channel.

2 is a block diagram showing the configuration of a signal generator of a CDMA channel signal generator according to the present invention. Referring to FIG. 2, the signal generator includes a source signal generator 201 that generates a source signal according to a source frequency control signal of the main processor unit 106, and a switch K1 for selecting an internal source or an external source. ), A source signal up-converter 210 for converting the source signal to an uplink frequency, a source signal amplification and attenuation unit 220 for adjusting the level of the source signal according to the source attenuation control signal, and distributing the source signal to each channel. To combine the output signal of the splitter 230, the N channel signal generators 240-1 to 240-N for generating each channel signal, and all the channel signal generators 240-1 to 240-N. A combiner 250, an output upconverter 260 for converting the combined CDMA channel signal to an uplink frequency, a switch K2 for selecting one of the output of the combiner 250 or the output of the output upconverter 260. It consists of.

In FIG. 2, the source signal generator 201 generates a source signal having a predetermined frequency according to the source frequency control signal of the main processor unit 106, and the first switch K1 selects an internal source or an external source according to a user's selection. The source signal up-converter 210 includes a voltage controlled oscillator (VCO) 211, a PLL 212, a divider 213, and a mixer 214 to convert the source signal to an uplink frequency. . That is, since the source signal of the source signal generator 201 is usually a low frequency, the source signal generator 201 is raised to an appropriate size IF frequency (for example, 70 MHz).

The source signal amplification and attenuation unit 220 includes a variable attenuator 221, an amplifier 222, and a band pass filter 223. The source signal amplification and attenuation unit 220 has a source signal having an appropriate size according to the source attenuation control signal input from the main processor unit 106. To vary. The divider 230 distributes the source signals to the N channel signal generators 240-1 to 240-N, and the combiner 250 outputs the channels output from the respective channel signal generators 240-1 to 240-N. Combine the signals. The output up-converter 260 is composed of a voltage controlled oscillator (VCO) 261, a PLL 262, a mixer 263, an amplifier 264, and a band pass filter 265 to control the output signal of the combiner 250. The signal is converted to an uplink frequency according to the signal, and the second switch K2 selects one of the output of the combiner 250 and the output converted to the uplink frequency according to a user's selection.

The N channel signal generators 240-1 to 240 -N have the same configuration, and generate channel signals of different frequency bands according to control signals of the channel processors 113-1 to 113 -N. As shown in FIG. 3, the channel signal generators 240-1 to 240 -N include an IF filter 241, a channel signal up-converter 242, a local filter 243, a channel signal amplification and attenuation unit ( 244), and is implemented as a separate module so that it can be attached to or detached from the system body. That is, the N channel signal generators 240-1 to 240-N are channel modules that can be independently mounted and detached, and can be provided only as needed in actual testing, thereby reducing the cost of the test. .

Referring to FIG. 3, the IF filter 241 blocks leakage of the reverse direction of the IF signal, and the channel signal up-converter 242 includes a voltage controlled oscillator (VCO) 242a, a PLL 242b, and a mixer 242c. The CDMA pseudo signal of the IF filter 241 is mixed with the user setting signal to raise the IF signal to the user frequency (that is, the channel frequency) set according to the channel frequency control signal. The local filter 243 blocks reverse leakage of the up-converted channel signal, and the channel signal amplifying and attenuating unit 244 includes an amplifier 244a, a variable attenuator 244b, an amplifier 244c, and a bandpass filter 244d. It is configured to control the magnitude and on / off of the channel signal according to the channel attenuation control signal and the channel on / off signal. That is, the channel signal frequency of the corresponding channel is adjusted according to the channel frequency control signal of each channel processor 113-1 to 113-N, and the channel signal amplitude of the corresponding channel is adjusted according to the channel attenuation control signal. When the channel off signal is received, the channel signal amplification and attenuation unit 244 of the channel is greatly attenuated to block the channel output.

4 is a flowchart illustrating a control procedure performed by the main processor of the CDMA channel signal generator according to the present invention. The main processor 106 monitors the state of the channel by receiving a report from the channel processors 113-1 to 113-N while waiting for a command after performing initialization, and when a command is input from a user. Performs the function that processes the command.

Referring to FIG. 4, the main processor initializes itself first (401), and then initializes all channels by transmitting an initialization command to each channel processor (402). Then, read and set the last state and parameters recorded in YPIROM 104 (403), and determine whether initialization for all channels is completed, and repeat the above process if not completed, and if the initialization is completed, the keypad of the user Wait for input or command from the host computer through GPIB. At this time, if the initialization process is repeated, if the initialization fails even if the set number of times is exceeded by setting the retry counter, an error message is output to the LCD display unit 108 (404 to 406).

While no command is input, it is checked whether a report is received from the channel processors 113-1 to 113-N. If there is no report, the command waiting process is repeated (407 and 408). When a report is received from the channel processor, the received report is analyzed to determine if all channels are in good condition (408, 409). If all channels are in good condition, return to step 407 to continue looping to check if a command is received and the channel condition.

If an error of a channel is reported, after setting the retry counter, a retry command is made and sent to the channel processor for a predetermined number of times. If an error is detected for a predetermined number of times, the corresponding channel off command is sent to turn off the channel. The channel error message is displayed on the LCD display unit 108 and reported to the host through the GBIP I / O 121 (410 to 413).

If a user keypad input and a GPIB command are received in step 407, steps 411 through 418 are performed according to the command. Types of commands and their contents are shown in Table 1 below.

Command division Action contents PLL Freq. UP / DOWN Source frequency and channel frequency up / down according to user operation Att. UP / DOWN Up / down the size of source and channel signal according to user's operation CH ON / OFF Output of designated channel is on / off Auto set-up Change settings step by step according to program Auto Cal./ Man Cal Perform calibration automatically and manually

As shown in Table 1 above, upon receiving the "PLL Freq. UP / DOWN" command for up-down the signal frequency, in step 414, a command for up-down the PLL according to user control is generated, and the "Att. UP / DOWN "command generates a command for up and down attenuation according to user control in step 415, and command for turning on / off the output of the channel in step 416 when receiving a CH ON / OFF command. Create In addition, upon receiving the "Auto set-up" command, the automatic setup routine is processed according to the program in step 417, and fine adjustment is automatically and manually performed in step 418 when the "Auto Cal./Man Cal command is received.

Here, in the detailed procedure of the automatic setting routine, as shown in FIG. 5, it is determined whether the automatic setting routine is step by step, and then step by step (501, 502). That is, in the step-by-step automatic setting routine, the optimum measurement program of the measurement object is executed in order for a specified time, and the contents of the program can be arbitrarily programmed by the user. For example, when setp0 to stepN are programmed, they are sequentially operated according to the program. That is, step0 is "low 4 channel (Ch) ON for 10 seconds, attenuation (Att) -60dBm", step1 is "Low 4Ch, Hi2 CH ON, Att.-65dbm for 6 seconds", step2 If step 8 is programmed as "All CH ON total Att. -60dBm for 20 seconds", set step by step according to the program.

In addition, as shown in FIG. 6, the automatic and manual calibration routine determines whether the automatic and manual adjustment is performed, and if the frequency adjustment command is performed, the frequency fine tuning is performed automatically or manually in the frequency adjustment mode (601,602). If the decay degree adjustment command, the decay degree is finely adjusted automatically or manually in the decay degree adjustment mode (603). In operation 604, the user can program a predetermined frequency, attenuation, holding time, and the like in the user program input processing mode. The programmed content is executed automatically in the automatic setting mode.

Subsequently, in step 419, the generated command is transmitted to the channel processors 113-1 to 113-N. In step 420, the system state is changed and then backed up to EPIROM 104. In step 421, the report data is generated to generate the GPIB host. Report to.

7 is a flowchart illustrating a procedure performed by a channel processor according to the present invention. After receiving the command from the main processor 106a, the channel processors 113-1 to 113-N generate a control signal for performing the command and provide the control signal to the corresponding channel signal generators 240-1 to 240-N. The state of each channel is monitored and reported to the main processor 106a.

Referring to FIG. 7, the channel processors 113-1 to 113 -N perform initialization and wait for instructions (701, 702). If there is no command, the channel and PLL state are checked and if there is an error, report data is generated and reported to the main processor (707, 708).

If a command is received in step 702, the command is analyzed and if the frequency up / down command is provided, the channel frequency control signal is provided to the corresponding channel signal generator according to user control to set the PLL of the corresponding channel (703). The attenuation degree ATT is set by providing the attenuation control signal to the corresponding channel signal generator 704, and when the channel on / off command is provided, the channel output is controlled by providing the channel on / off signal to the corresponding channel signal generator 705. . Next, the execution status is checked, the report data is generated, reported to the main processor, and the next instruction is waited (706, 709, 710).

As described above, according to the present invention, the main processor and each channel processor control each other's frequency, signal size, and on / off while communicating with each other.

As described above, according to the present invention, it is possible to quickly generate a CDMA signal necessary for testing a wireless terminal device and related parts, thereby reducing test time, and to integrate the control unit and the signal generator to reduce the size to facilitate movement. In addition, it is possible to reduce the test time and cost by modularizing the channel signal generator and testing only the necessary channel modules. In addition, it is possible to improve the test reliability of the equipment and components by outputting only the band signal by the required channel module.

Claims (5)

In the signal generator for accommodating N channels (FA) to test a wireless communication terminal device, Key input means; Display means; Memory; A signal generator for generating a predetermined channel (FA) signal; Providing a screen for the interface with the user, and when a command from the user is received through the key input means, and transmits to the channel processor, and interprets the report data received from each channel processor to display on the display means if an error occurs A main processor unit; And Code division multiplexing comprising receiving the command from the main processor unit to control the frequency, attenuation, on / off of each channel, and monitoring the operating state of the channel and reporting to the main processor unit Connection channel signal generator. The method of claim 1, wherein the signal generator A source signal generator for generating a source signal according to the source frequency control signal of the main processor unit; A source signal upconverter for converting the source signal to an uplink frequency; A source signal amplifier and attenuator for adjusting the level of the source signal according to the source attenuation control signal; A divider for distributing a source signal to each channel; N channel signal generators for generating each channel signal; And a combiner for combining the output signals of all the channel signal generators. 3. The code division multiple access channel signal generator of claim 2, wherein the signal generator adds an output upconverter for converting the combined channel signal to an uplink frequency. The method of claim 2, wherein the channel signal generation unit An IF filter for blocking reverse leakage of the IF signal; A channel signal up-converter for raising the output signal of the IF filter according to a channel frequency control signal; A local filter to block reverse leakage of the upconverted channel signal; And a channel signal amplifying and attenuating unit for adjusting the magnitude and on / off of the channel signal according to the channel attenuation control signal and the channel on / off signal. The code division multiple access channel signal generator of claim 1, further comprising an input / output unit for communication between the main processor and the host computer.