KR100327202B1 - Image device and method using memory efficiently - Google Patents

Abstract

PURPOSE: A video system and method for efficiently using a memory are provided to reduce the capacity of a memory required for video decoding using decimation and interpolation while minimizing deterioration in picture quality. CONSTITUTION: A video system having a video decoder(210) includes a memory(230) and a resolution controller(220). The memory writes and reads video data required for the video decoder to perform video decoding. The resolution controller controls the resolution of the video data according to the capacity of the memory to store the video data in the memory, and restores the resolution of the video data read from the memory. The resolution controller includes a decimator for decimating the video data processed by the video decoder to write the decimated video data in the memory, and an interpolator for interpolating the decimated video data read from the memory to apply the interpolated video data to the video decoder.

Description

Image device and method using memory efficiently

TECHNICAL FIELD The present invention relates to the field of video devices, and more particularly, to a video device and a method for efficiently using a memory for a video decoder supporting MPEG-2 MP @ HL.

Recently, receivers have been actively developed in the US ahead of high definition (HD) level digital broadcasting services using terrestrial waves. The digital broadcast uses the Moving Picture Experts Group (MPEG) -2 standard as a compression and decompression method of video. There are three types of picture types of MPEG-2 video: intra (I) pictures, predicted (P) pictures, and bidirectionally predicted (B) pictures. That is, the MPEG-2 picture structure is an I picture that has information of the current picture only and reduces spatial redundancy information of image information, and from an earlier I or P picture that is temporally advanced to reduce correlation between pictures through forward prediction. Compression of the detected motion vector and the difference component is compressed to reduce the correlation between the pictures through the P picture and the bi-prediction to compress the motion vector and the difference component detected from the I or P pictures. It is a B picture to be encoded.

The structure of a conventional digital receiver using an 128 Mbit external memory to reconstruct an HD image is shown in FIG. 1, and the video decoder 110 decodes the received video elementary stream to apply decoded video data. The memory 120 has a size of 128 Mbits, and writes and reads video data necessary for video decoding.

Here, in MPEG-2 video decoding, which decodes video data using motion compensation according to a picture type, three frames of memory are usually required. That is, 1920 (H) which supplies the highest picture quality of HD class The size of the memory 120 required for decoding the 1080 (V) image is given by Equation 1.

1920 (H) × 1080 (V) × 8 bit / pixel × 3 frame × 1.5 = 74.65 Mbit

Here, the image is composed of a luminance signal and a color signal, and each pixel of the image is composed of YUV (Y: luminance, U, V: chrominance) as an example. Since each occupy 2 bits, it should be multiplied by 1.5 as shown in Equation (1).

Conventional digital receivers require 74.65 Mbits of memory to store and process all three frames of the largest HD 1920 (H) x 1080 (V) video. However, since the size of the memory is only 2, such as 16 Mbit, 64 Mbit, 128 Mbit, the size of the power is increased because the memory for decoding cannot use 64 Mbit size memory but 128 Mbit memory. As a result, a large amount of wasted memory wasted, resulting in inefficient use of memory.

In order to solve the above problems, it is an object of the present invention to provide an image device that uses the memory efficiently while minimizing image degradation.

Another object of the present invention is to provide a digital receiver which efficiently uses a memory for video decoding while minimizing image quality deterioration.

Another object of the present invention is to provide a signal processing method for efficiently using a memory for video decoding while minimizing image quality deterioration.

In order to achieve the above object, the memory of the video device according to the present invention writes and reads the video data necessary for performing video decoding in the video decoder, and the resolution controller adjusts the resolution of the video data corresponding to the image format And writing to the memory and restoring the resolution of the video data read out from the memory to the original resolution.

In order to achieve the above object, the video decoder of the digital receiver according to the present invention decodes the received video stream and applies the decoded video data, and the memory writes and reads the video data necessary for decoding in the video decoder. The decimator decimates the video data processed by the video decoder corresponding to the image format, writes the decimated video data into the memory, and the interpolator interpolates the decimated video data read from the memory and applies the interpolated video data to the video decoder. It is characterized by.

In order to achieve the above another object, the method according to the present invention is a signal processing method used in an image device that uses a memory for writing and reading data necessary for video decoding, by decoding the received video stream Generating the decoded video data and adjusting the resolution of the video data in correspondence with the image format to write to the memory, and restoring the resolution of the video data read from the memory to the original resolution.

1 is a block diagram of a conventional video decoder and a digital receiver equipped with a memory therefor.

2 is a block diagram according to an embodiment of a digital receiver to which the present invention is applied.

3 is an example for explaining the operation of the decimeter and interpolator shown in FIG.

FIG. 4 is another example for explaining the operation of the decimeter and interpolator shown in FIG. 2.

Hereinafter, with reference to the accompanying drawings, a description will be given of a preferred embodiment of the video device and method for efficiently using the memory according to the present invention.

Digital TV (hereinafter, referred to as DTV) receiver as the most representative device of video equipment is not fixed size of displayed image. In particular, in the case of high-definition television (HDTV), the variation of the displayed image size is much larger.

In other words, DTV broadcasting is based on MPEG-2 MP @ HL, and various video formats are possible, but the following video formats will be mainstream.

-1920 (H) × 1080 (V) × 60i

-1920 (H) × 1080 (V) × 30p

-1280 (H) × 720 (V) × 60p

720 (H) × 480 (V) × 60p

720 (H) × 480 (V) × 60i

-640 (H) × 480 (V) × 60p

640 (H) × 480 (V) × 60i

Here, H and V denote the number of horizontal and vertical pixels of an image, respectively, and 60i, 60p, and 30p denote 60 frames / sec interlace, 60 frames / sec progressive, and 30 frames / sec, respectively. Means progressive.

In FIG. 2, which is a block diagram of a digital receiver to which the present invention is applied, the digital receiver includes a video decoder 210, a decimator and an interpolator 220, and a memory 230.

In other words, if the input image is a 1920 (H) x 1080 (V) image that requires the largest memory size, the video decoder 210 is configured for all pixels of the input 1920 (H) x 1080 (V) image. When the processed video data is stored in the memory 230, the decimator and the video data processed by the interpolator 220 are decimated in half in the horizontal direction and stored in the memory 230. In this case, the size of the required memory 230 is 74.65 Mbit / 2 = 37.28 Mbit, so 64 Mbit can be sufficiently configured, and the memory 230 is configured as a dynamic random access memory (DRAM) as an example.

Of course, when reading the video data stored in the memory 230 for video decoding, the video data read by the decimeter and the interpolator 220 is interpolated twice in the horizontal direction and then applied to the video decoder 210. This decimator and interpolator 220 may be referred to as a resolution controller.

Therefore, in the write mode, the 1920 (H) x 1080 (V) input image is decimated by 1/2, and the decimated data with the size of the 960 (H) x 1080 (V) image is written into the memory 230. In the read mode, the process of restoring the decimated data written in the memory 230 to 1920 (H) x 1080 (V) is shown in FIG. 3.

However, when the input image is a 1280 (H) × 720 (V) image smaller than 1920 (H) × 1080 (V), the required memory size is 33.18Mbit. In this case, the decimeter and the interpolator 220 are used. The video data processed by the video decoder 210 is written to the memory 230 without decimation without being passed through, and the video data read from the memory 230 is applied to the video decoder 210 without interpolation for video decoding. .

On the other hand, a display device is typically configured to display an image having a predetermined resolution. In the future, display devices will have a resolution that can support HD-processed images as they are, but due to the high price of display devices, it is expected to take considerable time to be commercialized.

Therefore, if the size of the input image is 1920 (H) x 1080 (V), data decimated horizontally by 1/2 of the input image may be applied to the current display device.

In the future, when the effective resolution of a display device is gradually increased to display up to 1440 samples as an example, 1920 pixels in the horizontal direction are decimated to 3/4 by the decimeter and the interpolator 220 to a size of 1440 × 1080. It stores in the memory 230. At this time, since the required size of the memory 230 is 1440 × 1080 × 8 × 3 × 1,5 = 55.98Mbit, 64Mbit memory is sufficient.

Of course, when the data stored in the memory 230 is read again, the data is interpolated 4/3 times by the decimeter and the interpolator 220 and then applied to the video decoder 210. Data applied to the display device becomes data decimated in three quarters.

Accordingly, in the write mode, the decimated 1920 (H) x 1080 (V) input image is decimated by 3/4 to write decimated data having a size of 1440 (H) x 1080 (V) image to the memory 230. In the read mode, the process of restoring the decimated data stored in the memory 230 to a 1920 (H) x 1080 (V) image by interpolating 4/3 times is illustrated in FIG. 4.

In the embodiment of the present invention, a memory having a size of 64 Mbit is used to minimize image quality, but a smaller memory may be used, and all of the devices may use an external memory for signal processing such as video decoding.

As described above, inefficient memory usage and cost increase by using 128 Mbits of memory to restore an image having a resolution that cannot be represented on an actual display device, by using decimation and interpolation. While reducing the size of the memory for video decoding to 64 Mbit, it has the effect of minimizing image degradation, lowering cost, and using memory efficiently.

Claims (10)

In a video device comprising a video decoder: A memory for writing and reading video data necessary for performing video decoding in the video decoder; And And a resolution controller that adjusts the resolution of the video data according to the size of the memory, writes the data into the memory, and restores the resolution of the video data read from the memory to the original resolution. The method of claim 1, wherein the resolution controller A decimator for decimating the video data processed by the video decoder to correspond to an image format and writing the decimated video data to the memory; And And an interpolator for interpolating the decimated video data read out from the memory and applying the interpolated video data to the video decoder. The video apparatus of claim 1, wherein the video format is a video having a resolution of Main Profile at High Level (MP @ HL). The image device of claim 1, wherein the resolution controller controls the resolution of the video data by further considering a resolution of a display device. A video decoder for decoding a received video stream and applying decoded video data; A memory for writing and reading out video data necessary for decoding in the video decoder; And Decimating the video data processed by the video decoder according to the size of the memory to write decimated video data to the memory, interpolating the decimated video data read from the memory and applying the interpolated video data to the video decoder. Digital receiver with meter and interpolator. 6. The digital receiver of claim 5, wherein the video format is a video having a resolution of MP @ HL and the memory has a size of 64 Mbit. The display apparatus of claim 5, wherein the decimator and the interpolator further decimate the video data at a predetermined ratio in consideration of the resolution of a display device, and adjust the resolution by interpolating the decimated video data at an inverse of the predetermined ratio. Digital receiver characterized in that. A signal processing method used in an imaging apparatus using a memory for writing and reading data necessary for video decoding, the method comprising: (a) decoding the received video stream to generate decoded video data; And (b) adjusting the resolution of the video data according to the size of the memory to write to the memory, and restoring the resolution of the video data read from the memory to the original resolution. 9. The method of claim 8, wherein in step (b), the video data is decimated in the write mode to write the decimated video data to the memory, and in the read mode, the data is decimated from the memory. And interpolating the video data. The method of claim 8, wherein the video format is a video having a resolution of MP @ HL.