KR100306276B1 - Device and method for processing intermodulation signal in communicating system - Google Patents

Abstract

PURPOSE: An apparatus and a method for processing IMD(Inter-Modulation Distortion) signals of a communication system are provided to detect and remove the IMD signals by using a PLL(Phase Locked Loop). CONSTITUTION: A duplexer filter(213) is used for separating a band of transmitting signal and a band of receiving signal. A low noise amplifier(215) is used for amplifying a receiving band signal of the duplex filter(213). The first local oscillator(217) is used for generating the first local frequency generating an intermediate frequency. A mixer(219) is used for generating an intermediate frequency signal by mixing an output of the low noise amplifier(215) with an output the first local oscillator(217). A reception AGC(Automatic Gain Controller)(221) is used for controlling a gain of the intermediate frequency signal of the mixer(219). A reception baseband conversion portion(223) is used for converting the intermediate frequency signal of the reception AGC(221) to a baseband. A modem(225) is used for receiving converted I and Q signals and generating a demodulation signal. A transmission baseband conversion portion(231) is used for converting a transmitting signal of the modem(231) to the baseband signal. An RF transmission portion(233) is used for performing a frequency up conversion process for the baseband signal.

Description

Intermodulation signal processing device and method of communication system {DEVICE AND METHOD FOR PROCESSING INTERMODULATION SIGNAL IN COMMUNICATING SYSTEM}

The present invention relates to a receiving apparatus and method of a communication system, and more particularly, to an apparatus and method for detecting and removing intermodulation signals.

Currently, countries such as Korea and the United States are adopting Code Division Multiple Access (CDMA) IS-95 as a standard for digital mobile phones. In the IS-95 scheme, channels of the same 1.23 MHz band are shared by multiple users. The CDMA scheme multiplies the transmitted data by a pseudo random noise sequence much higher than the data rate, thereby spreading the transmission spectrum in the 1.23 MHz band. Therefore, in the CDMA system, each individual transmission signal is changed to a characteristic such as AWGN (Addictive White Gaussian Noise). The spread signal as described above is despread and demodulated by multiplying the same PN sequence used for spreading at the receiving side. Therefore, even if multiple subscribers share the channel using the same frequency, each subscriber is distinguished by a unique sequence.

However, since AMPS (Advanced Mobile Phone Service) system, which is an analog cell system of North America, is operated within a frequency band of the CDMA system, this may result in an inter-modulation disitortion signal (IMD). Signal). The IMD signal may be defined as nonlinear distortion having an output frequency having a sum and a difference of frequencies that are integer multiples of an input signal frequency. This phenomenon is often caused when two frequency components pass through a nonlinear amplifier.

Since the CDMA scheme and the AMPS scheme are mixed in the IS-95 band as described above, the digital mobile communication subscriber may be affected by the intermodulated signal by the transmission signal of the AMPS system. In other words, when a subscriber using a digital mobile phone moves closer to an AMPS base station, the frequency of two FM channels of the AMPS system is intermodulated by a nonlinear low noise amplifier (LNA) at the receiving end of the terminal. IMD signals can be generated in the channel band, and these IMD signals have a much greater signal strength than the CDMA spread signals.

1 is a view for explaining the generation of the IMD signal in the CDMA channel band as described above. In FIG. 1, 101 is a frequency axis, 102 is an axis indicating the magnitude of a signal, 103 is an FM modulated AMPS signal having a frequency f1, 104 is an FM modulated AMPS signal having a frequency f2, and 105 is 2f1-. An IMD signal component having a frequency of f2, 106 denotes a spectrum of a CDMA channel.

As shown in FIG. 1, when the CDMA signal 106 and the IMD signal 105 are received together, the rake receiver of the receiver multiplies the unique sequence of the demodulator itself, so that the IMD signal 105 is in the entire 1.32 MHz CDMA band. Spreads from However, even in the spread signal, when the signal has a large power, it acts as a noise component, thereby increasing the bit error rate during data demodulation, thereby degrading call quality.

In order to solve the above problems, the conventional IMD signal control method uses the relationship between the received field strength RSSI (Received Signal Strength Indicator) and Ec / Io. Where Ec / Io is the pilot energy integrated over one PN chip period for the total power density in the receive band. Often, when an IMD signal is generated, it is determined that the IMD is generated when the power of the IMD signal is higher and the Ec / Io is lower than that of the CDMA power. In order to reduce the IMD component, the LNA input is controlled to give an appropriate attenuation to the signal passed through the bandpass filter. In FIG. 1, when the AMPS signals 103 and 106 and the CDMA signal 106 are attenuated by 1 dB, the IMD signal 105 is reduced by 3 dB. That is, the conventional IMD signal control method uses a method for attenuating an input signal. In this control method, since the IMD signal 105 is a third order signal of the AMPS signals 103 and 104, the IMD signal 106 is the AMPS signals 103 and 104. It is to use a characteristic that is attenuated three times more. Therefore, the CDMA signal is also attenuated, but the power difference relative to the IMD signal is much reduced, thereby significantly reducing the influence of the IMD signal.

However, since the same frequency is used in a real CDMA channel environment, subscribers sharing one CDMA channel in the same cell vary over time. Therefore, the signal of other subscribers also acts as an interference signal in the CDMA environment, so the increase or decrease of the subscriber brings about the increase or decrease of RSSI. In addition, since the number of subscribers continues to increase, the channel environment gradually changes. In addition, since fading and shadowing of radio waves occur during movement, it is difficult to determine whether an IMD signal is generated by comparing the RSSI and the Ec / Io values. If the aberration that the IMD signal is generated due to the channel environment change as described above causes attenuation to the signal through the antenna and the duplexer, it can have a fatal effect on the call connection rate. There was a problem that the call could be interrupted by an increase. In addition, the general communication apparatus determines the transmission power based on the reception sensitivity, but there is also a problem in that the transmission power can be controlled small by the power of the IMD signal.

Accordingly, an object of the present invention is to provide an apparatus and method capable of detecting and removing intermodulated signals in a CDMA communication system.

Another object of the present invention is to detect an AMPS intermodulation signal in a channel band using a phase locked loop in a CDMA communication system, and delay the intermodulation signal by applying a phase delay to the input signal in reverse phase to remove the intermodulation signal. It is to provide an apparatus and method that can be.

Another object of the present invention is to detect intermodulation components of AMPS using a digital phase locked loop at baseband in a CDMA communication system, phase delay a frequency of the intermodulation signal, and apply an antiphase to the input signal. An apparatus and method for canceling a signal are provided.

In order to achieve the above object, a method of removing a cross modulation signal of a CD communication system for receiving and processing a CD signal including a mixed modulation signal of the present invention includes inputting the CD signal to have a high intensity intermodulation signal. Generating an oscillation frequency that is phase-locked to the signal, comparing the frequency of the input signal with the oscillation frequency, generating a synchronous detection signal at the same value, and delaying the oscillation frequency to generate an antiphase replica signal; Calculating a power difference between the power of the input signal and the copy signal when the synchronization detection signal is generated, and then adjusting the gain with the same power as the input signal, and converting the gain-adjusted copy signal to the input signal. And demodulating after removing the intermodulated signal by synthesizing.

1 is a diagram for explaining generation of intermodulation signals in a communication system;

2 is a diagram showing a configuration of an intermodulation signal processing apparatus of a communication system according to an embodiment of the present invention.

FIG. 3 is a flowchart illustrating an operation flow of a controller for controlling the processing of the intermodulation signal in FIG.

4 is a diagram illustrating a configuration of a communication terminal device;

5 is a diagram illustrating a configuration of processing a mixed modulation signal according to a second embodiment of the present invention in a communication terminal having the configuration as shown in FIG.

FIG. 6 is a flowchart illustrating an operation flow of a controller for controlling a mixed modulation signal in FIG. 5. FIG.

In an embodiment of the present invention, a phase-locked loop (hereinafter referred to as a PLL) is used to detect an IMD signal. The PLL includes a phase detector, a loop filer, a voltage controlled oscillator, and the like. In this case, the phase detector generates a phase difference signal by comparing an input reference signal with a phase output from the voltage controlled oscillator, a loop filter generates an oscillation control voltage according to the phase difference, and the voltage controlled oscillator generates the phase difference signal according to the oscillation control voltage. Generate an oscillation frequency that matches the frequency and phase of the reference signal.

At this time, if the reference signal of the PLL is an intermediate frequency of the CDMA system including the IMD signal, the CDMA signal component of the mixed signal is a signal such as AWGN noise and is spread over the entire band. In addition, in the mixed signal, the IMD signal is agglomerated in a narrow bandwidth, and thus is significantly larger than the CDMA signal and has a specific frequency. Therefore, if the loop bandwidth of the phase locked loop is designed to be less than or equal to the bandwidth occupied by the IMD signal, the aggregated IMD signals in the narrow band are significantly larger than the CDMA signals widely distributed beyond the occupied bandwidth of the IMD signal. Thus, the PLL attempts to synchronize the oscillation frequency of the voltage controlled oscillator to the frequency of the IMD signal component. If the loop bandwidth of the PLL is greater than the modulation frequency of the FM modulated signal, the IMD signal is an FM modulated signal, so the PLL performs a function of demodulating the FM signal. That is, the PLL is synchronized with the center frequency of the IMD signal and the output voltage of the loop filter is a demodulated audio signal. In addition, the output frequency of the voltage controlled oscillator is the same as the received signal, but the signal is significantly removed noise.

In an embodiment of the present invention, in order to remove the IMD signal, a phase delayed signal output from the voltage controlled oscillator of the PLL generates a signal having a phase difference of 180 degrees with the IMD signal, and the generated IMD is received. By amplifying the signal in the same manner, a duplicate signal having the same magnitude as the IMD signal included in the input signal and having an inverse phase is generated. Subsequently, when the duplicated signal is added to the input signal, the IMD signal included in the input signal is canceled to generate a pure CDMA signal, thereby obtaining excellent demodulation performance at the receiving side.

The first embodiment of the present invention provides an apparatus and method for canceling an IMD signal included in an input signal by generating a duplicate signal after detecting an IMD signal from a CDMA intermediate frequency including an IMD signal in a receiving apparatus of a communication system. The second embodiment relates to an apparatus and a method for canceling an IMD signal included in an input signal by generating a duplicate signal after detecting the IMD from a baseband CDMA signal including an IMD signal. First, a first embodiment of the present invention will be described, and then a second embodiment will be described.

2 illustrates a configuration for detecting and removing an IMD signal according to the first embodiment of the present invention. The duplexer filter 213 separates a band of a transmission signal and a reception signal. Here, the band of the received signal of the CDMA communication system is 824.64MHz-848.37MHz, and the band of the transmit signal is 869.64MHz_893.37MHz. The low noise amplifier 215 amplifies and outputs a weak reception band signal output from the duplexer 213 with low noise. The first local oscillator 217 generates a first local frequency generating an intermediate frequency. The mixer 219 mixes the output of the low noise amplifier 215 and the output of the first local oscillator 217 to generate an intermediate frequency signal. In this case, the intermediate frequency is 85.38 MHz. A receiving AGC (Rx Automatic Gain Controller) 221 adjusts and outputs the gain of the intermediate frequency signal output from the mixer 219.

The receiver low band conversion unit 223 converts the intermediate frequency signal output from the reception AGC221 into a base band. The receiver low band conversion unit 223 mixes the output of the receiving AGC221 and the second local frequency to generate the baseband signal of the I channel, and mixes the output of the receiving AGC221 with the second local frequency shifted by 90 degrees to the Q channel. Generate a baseband signal of. The receiver low band conversion unit 223 performs a function of converting the intermediate frequency signal into a base band signal.

The modem 225 receives the I and Q channel signals converted to the baseband, generates a demodulated signal, and modulates and outputs a transmission signal. The transmitter low band conversion unit 231 converts the transmission signal output from the modem 231 into a base band signal, and the RF transmitter 233 frequency up converts the transmission base band signal into a transmission band to the duplexer 213. Output

Such a configuration is a transceiver configuration of a general communication system. The configuration of detecting and canceling the IMD signal included in the CDMA signal received in the above configuration will be described.

First, the amplifier 255 amplifies and outputs the intermediate frequency signal output from the mixer 219. A phase detector 257 compares the intermediate frequency signal output from the amplifier 255 with the voltage controlled oscillation frequency, and generates a phase difference signal according to the comparison result of the two signals. The loop filter 259 converts the phase difference signal output from the phase detector 257 into a DC voltage and outputs the DC voltage. A voltage controlled oscillator 261 generates a frequency corresponding to the control voltage output from the loop filter 259 and outputs the frequency to the phase detector 257. A sync detector 263 inputs an intermediate frequency output from the amplifier 255 and an output of the voltage controlled oscillator 261. When the two frequencies are the same, a sync detect signal LOCK is generated. Such a configuration is a configuration for detecting the IMD signal.

A phase delay part 265 delays and outputs a phase of an oscillation frequency output from the voltage controlled oscillator 261. At this time, the phase delay unit 265 delays the phase of the oscillation frequency such that a phase difference of 180 degrees with the input intermediate frequency is corrected while correcting the error of the PLL. The phase delay unit 265 performs a function of generating a duplicate signal having a phase difference of 180 degrees with the input signal.

The variable amplifier 267 inputs the output of the phase delay unit 265 and adjusts the output gain of the phase delay unit 265 according to an amplification control signal. The control unit 251 generates a switch on control signal when the synchronous detection signal LOCK is generated by the synchronous detector 263, and generates a switch off control signal when the synchronous detection signal LOCK is not generated. The switch 269 is turned on / off by the switch control signal of the controller 251. The output of the variable amplifier 267 is applied to the power detector 271 and the adder 275 when the switch 269 is on, and blocks the output of the variable amplifier 267 when the switch 269 is turned off. A power detector 272 [269] detects the power of the intermediate frequency signal output from the mixer 219. At this time, the power detector 272 [269] 269 also detects the power intensity of the IMD signal included in the CDMA intermediate frequency signal. The power detector 271 detects the output power of the variable amplifier 267 applied when the switch 269 is turned on. The adder 273 generates a difference signal between the output of the power detector 269 and the power detector 275. An integrator 277 integrates the output of the adder 273 and outputs the amplified control signal of the variable amplifier 267. Accordingly, the variable amplifier 267 inputs a phase delayed IMD signal and adjusts the gain to the same magnitude as the IMD signal included in the input signal by the amplification control signal output from the integrator 277. The adder 275 cancels the IMD signal by canceling the output of the variable amplifier 267 at the output of the mixer 219.

In the above configuration, the variable amplifiers 267, the power detectors 269 and 271, the adders 273 and the integrator 277 adjust the replica signal to the same size as the input signal, and the adder 275 adjusts the IMD signal included in the input signal. Function to cancel.

Referring to FIG. 2, the received signal through the antenna 211 is filtered by the duplexer 213 as a signal of the CDMA reception band and output. Then, the low noise amplifier 215 amplifies and outputs the signal of the weak reception band output from the duplexer 213 with low noise. In this case, if the FM signal of the AMPS system has a strong size when amplifying the low noise amplifier 215, the IMD of the FM in the CDMA channel is increased. Will generate a signal.

The mixer 219 mixes the output of the low noise amplifier 215 and the output of the first local oscillator 217 to generate an intermediate frequency signal. That is, the mixer 219 mixes the reception band signal and the first local frequency to generate an intermediate frequency, and filters the intermediate frequency band down-converted by an intermediate frequency filter (not shown). At this time, the intermediate frequency signal is 85.38MHz. The intermediate frequency signal is applied to the adder 275 and to the power detector 269 at the same time. The power detector 269 then detects the power strength of the intermediate frequency signal and applies it to the adder 273. The adder 275 adds and outputs the intermediate frequency signal and the outputs of the variable amplifiers 267. If the IMD signal is not detected, the adder 275 applies the intermediate frequency signal to the receiving AGC221 as it is, and the receiving AGC221 receives the input intermediate frequency signal. Adjust the gain of the output.

Then, the receiver low band conversion unit 223 converts the intermediate frequency signal output from the reception AGC221 into a baseband signal and outputs the signal. The receiver low band conversion unit 223 mixes the intermediate frequency signal with the second local frequency to generate the baseband signal of the I channel, and mixes the intermediate frequency signal with the second local frequency that is 90 degrees out of phase. Generate a baseband signal. Accordingly, the receiver low band conversion unit 223 mixes the intermediate frequency signal with a second local frequency to perform a down conversion into a base band signal, and the demodulator of the modem 231 inputs the base band signals of the I and Q channels. To demodulate.

The amplifier 255 amplifies and outputs the intermediate frequency signal output from the mixer 219 to an appropriate level of the PLL. The phase detector 257 compares the intermediate frequency signal output from the amplifier 255 with the oscillation frequency signal output from the voltage controlled oscillator 261 and generates a signal according to the frequency and phase difference. The loop filter 259 filters the output of the phase detector 257 to generate a DC voltage, and the voltage controlled oscillator 261 generates an oscillation frequency according to the output voltage of the loop filter 259. In this case, the CDMA intermediate frequency signal is a signal in which an IMD signal is mixed as described above, and the CDMA signal is a signal spread in all bands in the form of AWGN noise. Therefore, the PLL is significantly larger than the CDMA signal and tries to synchronize the oscillation frequency of the voltage controlled oscillator 261 with the frequency of the IMD signal having a specific frequency. Therefore, when the two input frequencies are the same, the synchronous detector 263 generates the synchronous detection signal LOCK and outputs the synchronous detection signal LOCK to the controller 251.

If an IMD signal is generated, it is included in an arbitrary position within 1.23 MHz, which is one CDMA channel bandwidth. If the time constant of the loop filter 259 is set to have a wide loop bandwidth in the initial acquisition mode, the PLL performs the acquisition process. At this time, if synchronization occurs in the acquisition process, the synchronization detector 263 activates the synchronization detection signal LOCK indicating high synchronization. At this time, if synchronization is achieved, the loop bandwidth of the loop filter 259 may be narrowed to the FM bandwidth to increase the tracking performance of the PLL.

In this case, the voltage-controlled oscillator 261 of the PLL may have a predetermined phase difference from the input signal according to the hardware characteristics of the PLL. By using an appropriate phase delay unit 265, a duplicated signal having a phase difference of 180 degrees with the input signal may be generated. Therefore, the oscillation frequency output from the voltage controlled oscillator 261 is applied to the phase delay unit 265. The phase delay unit 265 inputs the oscillation frequency, corrects a time error of the PLL, and delays the phase of the oscillation frequency to have a phase difference of 180 degrees with the intermediate frequency signal.

At this time, the control unit 251 generates a control signal for turning off the switch 269 when the synchronous detection signal LOCK is inactive (LOCK = low) in the synchronous detector 263, and when the synchronous detection signal LOCK is activated (LOCK = high), A control signal is generated to turn on the switch 269. When the switch 269 is turned on, the output of the variable amplifier 267 is applied to the power detector 271 and the adder 275 through the switch 269. The power detector 271 then detects the power intensity of the IMD signal output from the variable amplifier 267. The adder 273 then generates a difference between the power value of the intermediate frequency signal output from the power detector 269 and the IMD signal output from the power detector 271. The integrator 277 integrates the difference signal between the power values of the two signals output from the adder 273 and applies it as an amplification control signal of the variable amplifier 267. At this time, if the power value of the intermediate frequency signal is greater than the power value of the detected IMD signal, the amplification control signal generates an amplification control signal for increasing the power of the IMD signal, the power value of the IMD signal is the intermediate frequency signal If greater than the power value of the amplification control signal generates an amplification control signal for lowering the power of the IMD signal.

Accordingly, the variable amplifier 267 generates an IMD signal having the same size as that of the IMD signal included in the intermediate frequency signal. Accordingly, the IMD signal applied to the adder 275 is an IMD signal included in the intermediate frequency signal and becomes a duplicate signal having the same frequency band and magnitude and having an inverse phase. Therefore, in the adder 275, the IMD signal component of the intermediate frequency signal is canceled to become a pure CDMA channel signal. Thereafter, the CDMA signal is amplified to a predetermined level by the receiving AGC221, and converted into a complex signal of the I and Q channels by the baseband converter 223 and then demodulated and processed.

3 is a flowchart illustrating a control process in which the control unit 251 detects and cancels an IMD signal in the first embodiment of the present invention.

Referring to FIG. 3, the controller 251 checks whether an IMD signal is checked in operation 312. If the controller 251 checks the output of the sync detector 263, in step 314. When the sync detection signal LOCK is activated in the sync detector 263 (LOCK = high), the sync detector 263 detects it in step 314 and generates a switch control signal for turning on the switch 269 in step 316. The switch 269 is then turned on to apply the output of the variable amplifier 267 to the power detector 271 and the adder 275.

When the synchronous detection signal LOCK is activated, the oscillation frequency output from the voltage controlled oscillator 261 becomes the frequency of the IMD signal included in the input signal. The phase delay unit 265 then delays the phase of the output frequency of the voltage controlled oscillator 261 so as to compensate for the phase difference with the input signal according to the hardware characteristics of the PLL and have a phase difference of 180 degrees with the input signal. The generated duplicated signal is amplified to the same size as the IMD signal included in the input signal by an AGC loop including the power detectors 269 and 271, the adder 273, the integrator 277 and the variable amplifier 267. That is, the AGC loop detects the magnitude of the IMD signal included in the input signal and the magnitude of the duplicated signal, obtains a magnitude difference signal between the two signals, and applies it as an amplification control signal of the duplicated signal so that the duplicated signal is the IMD. Control to be equal to the size of the signal. At this time, the replica signal output from the variable amplifier 267 has an inverse phase with the IMD signal and becomes a signal having the same frequency and magnitude. Therefore, the adder 275 synthesizes the input signal and the duplicated signal, and outputs a pure CDMA signal by removing the IMD signal included in the input signal.

However, if the synchronous detection signal LOCK is not detected in step 314, the controller 251 generates a control signal for turning off the switch 269 in step 318. This prevents the output of the variable amplifier 267 from being applied to the power detector 271 and the adder 275. Therefore, since the path of the replica signal applied to the adder 275 is blocked, the intermediate frequency signal output from the mixer 219 is transmitted to the receiving AGC221 as it is. That is, the PLL does not detect the synchronization signal in the section in which the IMD signal is not included in the CDMA signal, and the pure CDMA signal band is transmitted as it is and demodulated.

The inspection and removal of the IMD signal as described above is repeated at regular time intervals.

FIG. 4 is a diagram showing the configuration of a communication device for explaining the detection and removal of an IMD signal according to the second embodiment of the present invention.

Referring to FIG. 4, the duplexer 413 performs a function of separating transmission and reception bands of the communication device. The RF receiver 415 inputs a signal of a reception band to generate an intermediate frequency signal by amplifying and converting the frequency down. The reception baseband converter 417 converts the intermediate frequency signal output from the RF receiver 415 into a baseband. The modem 419 inputs the baseband signal, detects and removes an IMD signal included in the baseband signal, and demodulates and outputs the baseband signal as an original signal. The transmission baseband converter 421 converts and outputs a transmission modulated signal output from the modem 519 to a baseband. The RF transmitter 423 frequency-converts the transmission baseband signal to convert the transmission baseband signal into a transmission band signal, and amplifies and transmits the power to the duplexer 413. The controller 425 controls the overall operation of the communication device, and performs the function of detecting and removing the IMD signal according to an embodiment of the present invention. The display unit 427 displays a state generated during the operation of the communication device under the control of the control unit 425. The display unit 427 may use a liquid crystal display (LCD).

FIG. 5 is a diagram showing the configuration of an IMD signal detection and removal apparatus according to the second embodiment of the present invention, and shows the configuration to be processed in the baseband. The baseband signal is a baseband signal of I and Q channels.

The phase detector 512 receiving the baseband signal compares this signal with the output of the voltage controlled oscillator 516 and generates a phase difference signal according to the comparison result of the two signals. The loop filter 514 converts the phase difference signal output from the phase detector 512 into a DC voltage and outputs the DC voltage. The voltage controlled oscillator 516 generates a frequency corresponding to the control voltage output from the loop filter 514 and outputs the frequency to the phase detector 512. The synchronous detector 518 inputs the baseband signal and the output of the voltage controlled oscillator 516, and generates a synchronous detection signal LOCK when the two frequencies are the same. Such a configuration is a configuration for detecting the IMD signal.

The phase delay unit 520 delays and outputs the phase of the oscillation frequency output from the voltage controlled oscillator 516. At this time, the phase delay unit 520 delays the phase of the oscillation frequency such that a phase difference of 180 degrees from the input intermediate frequency is compensated while correcting the error of the PLL. The phase delay unit 520 generates a duplicate signal having a phase difference of 180 degrees with the baseband signal.

The control unit 425 generates an on control signal when the synchronization detection signal 518 is generated by the synchronization detector 518, and generates an off control signal when the synchronization detection signal LOCK is not generated (if the synchronization detection signal is not generated). The variable amplifier 522 inputs the output of the phase delay unit 520 and variably amplifies the output of the phase delay unit 520 according to a control signal. That is, the variable amplifier 522 is driven by the on control signal of the control unit 425 to apply an output signal to the power detector 526 and the adder 532, and stops the operation when it is off. Power detector 524 detects the power of the baseband signal. In this case, the power detector 524 also detects the power intensity of the IMD signal included in the baseband signal. The power detector 526 detects the output power of the variable amplifier 522. The adder 528 generates a difference signal between the output of the power detector 524 and the power detector 526. The integrator 530 integrates the output of the adder 528 and outputs the amplified control signal of the variable amplifier 522. Accordingly, the variable amplifier 522 inputs a phase delayed IMD signal and adjusts the gain to the same magnitude as the IMD signal included in the input signal by the amplification control signal output from the integrator 530. An adder 532 cancels the output of the variable amplifier 522 from the baseband signal to remove the IMD signal.

In the above configuration, the variable amplifier 522, the power detectors 524 and 526, the adder 528 and the integrator 530 adjust the replica signal to the same size as the input signal, and the adder 532 adjusts the IMD signal included in the input signal. Function to cancel.

의 연산에 의해 기저대역신호의 크기를 연산한다. 또한 상기 위상검출기512는 상기 기저대역신호와 전압제어발진기516의 출력 위상차를 검출하여 루프필터514에 출력하며, 상기 루프필터514는 상기 위상오차에 따라 상기 전압제어발진기516의 발진을 제어한다. 따라서 상기 PLL부는 IMD신호가 존재하면 주파수 및 위상을 동기시키게 된다. 이때 상기 PLL부가 동기를 이루게 되면, 상기 동기검출기518은 동기검출신호LOCK를 하이로 천이시켜 제어부425에 이를 알린다.4 and 5, the baseband digital signal output from the baseband converter 417 is applied to the phase detector 512 and the synchronous detector 518 of the PLL unit and simultaneously input to the power detector 524. In this case, since the baseband signal is a complex signal of the I and Q channels, the power detector 524 is

The magnitude of the baseband signal is calculated by the operation of. The phase detector 512 detects an output phase difference between the baseband signal and the voltage controlled oscillator 516 and outputs the result to the loop filter 514. The loop filter 514 controls the oscillation of the voltage controlled oscillator 516 according to the phase error. Accordingly, the PLL unit synchronizes frequency and phase when an IMD signal is present. At this time, when the PLL unit is synchronized, the synchronization detector 518 transitions the synchronization detection signal LOCK high to notify the controller 425 of this.

In addition, the output of the voltage controlled oscillator 516 is applied to the phase delay unit 520, and the phase delay unit 520 delays the output of the voltage controlled oscillator 516 to have a 180 degree phase difference from the IMD signal included in the input baseband signal. .

의 연산에 의해 크기가 검출되며, 가산기528은 전력검출된 상기 두신호의 차를 계산하여 적분기530에 출력한다.그러면 상기 적분기530은 두 신호의 전력 차에 따른 증폭제어신호를 발생하며, 이로인해 상기 가변증폭기522는 상기 CDMA의 기저대역신호에 포함된 IMD신호와 동일한 크기를 갖는 복제신호를 발생한다. 그리고 가산기532는 상기 입력되는 기저대역의 디지탈신호와 상기 가변증폭기522에서 출력되는 복제신호를 가산하여 IMD신호를 상쇄시킨다. 즉, 상기 가변증폭기522에서 출력되는 복제신호는 상기 기저대역신호에 포함된 IMD신호와 신호와 동일한 주파수 및 크기를 가지며 위상을 180도 차가 나므로, 결국 가산기532는 두 신호를 상쇄시켜 순수한 CDMA의 기저대역 신호를 복조부에 전달하게 되는 것이다.The replica signal of the IMD signal output from the phase delay unit 520 is adjusted by the power detectors 524, 526, adder 528, integrator 530, and variable amplifier 522 constituting the AGC loop. In other words, the duplicated signal output from the variable amplifier 522 is detected by the power detector 526 during the synchronous detection.

The magnitude is detected by the operation of, and the adder 528 calculates a difference between the two detected signals and outputs the difference to the integrator 530. Then, the integrator 530 generates an amplification control signal according to the power difference between the two signals. The variable amplifier 522 generates a duplicate signal having the same size as the IMD signal included in the baseband signal of the CDMA. The adder 532 cancels the IMD signal by adding the input baseband digital signal and the replica signal output from the variable amplifier 522. That is, the duplicated signal output from the variable amplifier 522 has the same frequency and magnitude as that of the IMD signal included in the baseband signal, and is 180 degrees out of phase. Therefore, the adder 532 cancels the two signals to form the basis of pure CDMA. The band signal is transmitted to the demodulator.

FIG. 6 illustrates a process of controlling the AGC operation of the duplicate signal according to the state of the synchronous detection signal LOCK output from the synchronous detector 518 by the control unit 425.

Referring to FIG. 6, the controller 425 checks whether an IMD signal is checked in operation 612, and in step 614, checks the output of the sync detector 518. When the sync detection signal LOCK is activated in the sync detector 518 (LOCK = high), the sync detector 518 detects it in step 614 and generates a control signal for turning on the AGC function of the variable amplifier 522 in step 616. The variable amplifier 522 is then driven to apply a copy signal to the power detector 526 and the adder 532.

When the synchronous detection signal LOCK is activated, the oscillation frequency output from the voltage controlled oscillator 516 becomes the same frequency as the IMD signal included in the input signal. That is, it generates a replication signal of the IMD. Then, the phase delay unit 520 delays the phase of the duplicated signal to have a phase difference of 180 degrees with the input signal while compensating for the phase difference with the input signal according to the hardware characteristic of the PLL. The generated duplicated signal is amplified to the same magnitude as the IMD signal included in the input signal by an AGC loop including the power detectors 524 and 526, the adder 528, the integrator 530, and the variable amplifier 522. Therefore, the duplicated signal output from the variable amplifier 522 has a reverse phase with the IMD signal and becomes a signal having the same frequency and magnitude. The adder 532 synthesizes the input signal and the duplicated signal, and outputs a pure CDMA signal by removing the IMD signal included in the input signal.

However, if the synchronous detection signal LOCK is not detected in step 614, the controller 425 turns off the driving of the variable amplifier 522 in step 618. Then, the operation of the AGC loop is stopped so that the duplicate signal is not applied to the power detector 526 and the adder 532. Accordingly, the baseband CMDA signal is transmitted to the demodulator as it is. Therefore, it can be seen that the PLL does not detect the synchronization signal in the section in which the IMD signal is not included in the CDMA baseband signal, and the pure CDMA signal band is transmitted and demodulated as it is.

The inspection and removal of the IMD signal as described above is repeated at regular time intervals.

As described above, the method for detecting and removing the IMD signal according to the embodiment of the present invention can first accurately determine the IMD signal, thereby preventing malfunction of the IMD control process, and accurately detect the IMD signal, thereby allowing the corresponding IMD signal to be detected. Can be removed accurately. Since this method is performed without attenuating the CDMA signal, there is an advantage that an excellent BER performance can be obtained at the receiving side.

Claims (4)

In the intermodulation signal removal apparatus of the CD communication system for receiving and processing the CD signal containing the intermodulation signal, A phase synchronous loop inputting the CD signal and generating a copy intermodulation signal that is phase-locked to the intermodulation signal included in the received CD signal; A phase delay unit for delaying the replica intermodulation signal outputted from the phase locked loop and outputting it out of phase; An canceller for removing the intermodulation signal component included in the CD signal by adding the demodulation intermodulation signal to the inverse phase to the received CD signal; And a demodulation unit configured to despread and demodulate the output of the canceller. An RF receiver for converting a wireless CD signal into a signal of an intermediate frequency band, a baseband converter for converting a CD signal of an intermediate frequency band to a baseband signal, and a digital CD signal of the baseband An apparatus for removing intermodulation signals of a CD communication system having a demodulation unit for despreading and demodulating, A phase synchronous loop for inputting the signal of the intermediate frequency band and generating a replica intermodulation signal with a frequency synchronized with the intermodulation signal included in the signal of the intermediate frequency band; A synchronous detector for inputting an output signal of the phase synchronous loop and the received intermediate frequency signal, and generating a synchronous detection signal when the phases of the two input signals are the same; A phase delay unit for delaying the copy intermodulation signal output from the phase locked loop and outputting the phase out of phase; Operating when the synchronous detection signal is generated, detecting power of the received intermediate frequency signal and the replica intermodulation signal in the antiphase, and obtaining a gain of the replica intermodulation signal in the antiphase according to the detected power difference between the two signals A gain controller configured to control and adjust the replica intermodulation signal to the magnitude of the received intermediate frequency signal; And a canceller output to the baseband converter by removing the intermodulation signal included in the intermediate frequency signal by adding the gain-adjusted inverse phase replica intermodulation signal to the received intermediate frequency signal. Intermodulation signal removal device of the CD communication system. An RF receiver for converting the received wireless CD signal into a signal of an intermediate frequency, a receiver low band converter for converting the signal of the intermediate frequency into a baseband digital baseband signal, and a digital signal of the baseband. An apparatus for removing intermodulation signals of a CD communication system having a demodulator for despreading and demodulating, A phase locked loop for inputting a baseband digital signal and generating a replica intermodulation signal synchronized with the intermodulation signal included in the baseband digital signal; A synchronous detection unit for inputting the received baseband signal and the output of the phase locked loop, and generating a synchronous detection signal when the two signals have the same phase; A phase delay unit for delaying the output of the phase-locked loop and outputting it out of phase; The synchronous detection signal is operated when the synchronous detection signal is generated, and detects the power of the received baseband signal and the replica intermodulation signal output from the phase delay unit, respectively, and the reverse phase according to the detected power difference between the two signals. A gain controller for controlling the gain of the replica intermodulation signal of the control unit to adjust the replica intermodulation signal to the received baseband signal magnitude; And a canceller output to the demodulator unit after removing the intermodulation signal included in the intermediate frequency signal by adding the gain-adjusted inverse phase replica intermodulation signal to the received intermediate frequency signal. Intermodulation signal removal device of A communication system. In the method of removing a cross modulation signal of the CD communication system for receiving and processing the CD signal containing the intermodulation signal, Generating a replica intermodulation signal in phase synchronization with the intermodulation signal by inputting the CD signal; Generating the replica intermodulation signal having an inverse phase by delaying the frequency; Comparing the frequency of the input signal and the copy intermodulation signal and generating the synchronous detection signal at the same time, the power difference between the power of the input signal and the copy intermodulation signal in the reverse phase is calculated when the synchronous detection signal is generated. Then adjusting the gain of the replica intermodulation signal in the antiphase to have the same magnitude as the input signal according to the power difference; Removing the intermodulation signal included in the input signal by adding the gain-adjusted reversed-phase replica intermodulation signal to the input signal, and demodulating the demodulation signal. .

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