KR100302126B1 - Video Camera Auto Focus System - Google Patents

Abstract

The present invention relates to an autofocus system of a video camera that automatically adjusts the focus of a video camera by causing a high frequency component of a luminance signal of image information obtained by photographing a subject to be large.

The present invention applies the principle that the high frequency component of image information becomes larger as the focus of the video camera becomes better, and instead of removing the conventional optical system, the luminance signal of each pixel among the image information obtained by photographing the subject by the video camera is applied. The high frequency component is extracted by hardware, and the extracted high frequency component is used to automatically adjust the focus of the video camera. In addition, the present invention converts the luminance signal of each pixel into a digital signal, and extracts the high frequency component of the corresponding luminance signal using only one bit of information to implement a filter circuit for extracting the high frequency component with a small memory and logic. To help.

Accordingly, the present invention can be simplified and reduced in weight due to the simplified structure of the conventional auto focus system having a separate optical system, and the cost of the product is reduced. In addition, the present invention has the effect of simplifying the hardware configuration because the spatial high frequency filter is implemented in a small memory (bit-by-bit FIFO memory) and logic.

Description

An automatic focus system of a video camera

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an autofocus system of a video camera, and more particularly, to an autofocus system of a video camera that automatically adjusts the focus of a video camera by increasing a high frequency component of a luminance signal among image information obtained by photographing a subject. It is about.

In general, the automatic focus adjustment function of a video camera is one of video camera control techniques for accurately forming an image of a subject on an image pickup surface of a camera system.

Conventionally, in order to automatically focus the video camera, an external optical system such as an infrared emitter, an infrared sensor, a beam splitter, or the like is used. That is, the infrared emitter shoots infrared rays toward the subject, the infrared sensor detects the reflection information returned from the subject, obtains the distance information between the camera and the subject, and automatically adjusts the focus of the video camera using the distance information. .

However, since the auto focus method uses a separate optical system such as an infrared emitter, an infrared sensor, a beam splitter, etc., its structure is complicated, which is a big obstacle to the compactness and lightness of a video camera, There was a functioning problem.

In addition, the above method has a problem that it is difficult to automatically focus when the subject is located over the glass that reflects infrared rays or when the subject itself is black that absorbs infrared rays.

Therefore, in the present invention, instead of removing a separate optical system, a high frequency component of a luminance signal of each pixel is hardware-extracted from image information obtained by a video camera photographing a subject, and the extracted high frequency component is used to The purpose is to provide an autofocus system for a video camera that automatically adjusts the focus.

In addition, the present invention converts the luminance signal of each pixel into a digital signal, and extracts the high frequency component of the corresponding luminance signal using only one bit of information to implement a filter circuit for extracting the high frequency component with a small memory and logic. Another purpose is to provide an auto focus system of a video camera.

In order to achieve the above object, an autofocus system of a video camera according to the present invention includes an analog / digital converter for converting and outputting a luminance signal of each pixel output from an image signal processor of a video camera into a digital signal; A multiplexer unit which selects and outputs only one set bit value among a plurality of bit values of the luminance signal output from the analog / digital converter; A spatial high frequency filter unit for performing spatial high frequency filtering on the output value of the multiplexer unit using a filter coefficient having a 3 × 3 structure to output high frequency component values of luminance signals of the corresponding pixels; A multiplier for multiplying an output value of the spatial high frequency filter by a luminance signal value of a predetermined pixel; A comparison accumulator for comparing the output value of the multiplier with a set first reference value and repeating an operation of accumulating output values only when the output value is larger than the first reference value for all the pixels on the first field screen to output accumulated data; A focus adjuster for comparing the cumulative data with a set second reference value and moving the focus lens of the video camera by a predetermined amount when the cumulative data is small, and determining the optimal focus state when the cumulative data is large and fixing the focus lens at the current position. Characterized in that consisting of.

The present invention provides a selection bit control unit for providing a bit positioning signal for changing a bit value selected by the multiplexer unit, and a first reference value setting signal for changing a first reference value of the comparison accumulation unit. Preferably, the first reference value control unit provided to the comparison accumulating unit and the second reference value control unit providing a second reference value setting signal for changing the second reference value of the focus adjusting unit to the focus adjusting unit are further provided.

In addition, the multiplexer preferably selects an MSB-1 (MSB-1) value among a plurality of bit values of the luminance signal.

In addition, the focus adjustment unit and a focus motor for moving the focus lens; A focus motor driver for controlling driving of the focus motor; If the cumulative data is smaller than the set second reference value and the cumulative data is small, the driving direction of the focus motor is determined and provided to the focus motor driver. If the cumulative data is large, the driving stop command of the focus motor is sent to the focus motor driver. It is preferable that a microcomputer is provided.

1 is a functional block diagram of a video camera to which an autofocus system according to the present invention is applied;

2 is a functional block diagram of an auto focus system according to an embodiment of the present invention;

3 is an internal circuit diagram of some components shown in FIG.

4A is a diagram showing an example of a filter coefficient of a 3x3 structure used for spatial high frequency filtering;

4B is a diagram illustrating pixel values of a 3x3 structure;

4c is a diagram showing filter coefficients of a 3x3 structure used to facilitate the calculation in one embodiment of the present invention;

5 is a functional block diagram of an auto focus system according to another embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

10: auto focus system 110: analog / digital converter

120: multiplexer 121: selection bit control unit

130: spatial high frequency filter 140: multiplier

150: comparison accumulator 151: first reference value control unit

160: focus adjustment unit 161: focus motor

162: focus motor drive unit 163: microcomputer

164: second reference value control unit

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a functional block diagram of a video camera to which an autofocus system according to the present invention is applied and includes a lens assembly including a focus lens 1, a zoom lens 2, and an iris lens 3. Is connected to an image of a subject to form a 2D image sensor (CCD: Charge Coupled Device, 4).

When the image of the subject is formed, the two-dimensional image sensor 4 outputs the R (Red), G (Green), and B (Blue) signals to the image signal processing unit 5 by photoelectric conversion, and the image signal processing unit 5 Converts the received R, G, and B primary color signals into a luminance signal and a chrominance signal, and outputs them to the encoder 6. The encoder 6 encodes the received luminance signal and the chrominance signal and outputs a composite video signal.

The composite video signal output from the encoder 6 is input to a video cassette recorder (VCR, not shown in the figure) and recorded or input to a monitor (not shown) and displayed.

On the other hand, in order to accurately match the focus of the lens assembly, the focus lens 1 should be moved back and forth so that the focus lens 1 is placed at the optimum position.

The autofocus system 10 of the present invention digitizes the luminance signal of each pixel output from the image signal processor 5, and then extracts high frequency components of each pixel by spatial high frequency filtering, and extracts high frequency components of each pixel for one field screen. The focus lens 1 is controlled to be in an optimal position by determining the moving direction and the moving distance of the focus lens 1 based on the accumulated data obtained by accumulating the components.

2 is a functional block diagram of an autofocus system according to an embodiment of the present invention, wherein the autofocus system 10 includes an analog-to-digital converter (ADC) 110, a multiplexer (MUX, 120), and a spatial high frequency filter. 130, a multiplier 140, a comparison accumulator 150, and a focus adjuster 160.

The analog-to-digital converter 110 converts the luminance signal of each pixel output from the image signal processor 5 of the video camera into an 8-bit digital signal and outputs it to the multiplexer 120.

The multiplexer 120 selects only the seventh bit value MSB-1 of the eight bit values of the luminance signal output from the analog / digital converter 110 and outputs the seventh bit value MSB-1 to the spatial high frequency filter 130.

The spatial high frequency filter 130 performs spatial high frequency filtering on the output value of the multiplexer 120 using a filter coefficient having a 3 × 3 structure, and outputs a high frequency component value of the luminance signal of the corresponding pixel to the multiplier 140.

The multiplier 140 multiplies an output value of the spatial high frequency filter 130 by an 8-bit luminance signal of a predetermined pixel and outputs the result to the comparison accumulator 150.

The comparison accumulator 150 compares an absolute value of the output value of the multiplier 140 with a set first reference value (for example, 32) and accumulates an output value only when the absolute value is larger than the first reference value. Repeatedly performing all the pixels of the screen to output the resulting cumulative data to the focus adjusting unit (160).

The focus adjusting unit 160 compares the cumulative data received from the comparison accumulator 150 with the set second reference value and moves the focus lens 1 of the video camera by a predetermined amount when the cumulative data is small. The focus lens 1 is fixed at the current position by determining the focus state.

In addition, the focus adjusting unit 160 includes a focus motor 161 for moving the focus lens 1; A focus motor driver 162 controlling driving of the focus motor 161; When the accumulated data received from the comparison accumulator 150 is compared with the set second reference value and the accumulated data is small, the driving direction of the focus motor 161 is determined and provided to the focus motor driver 162. When the accumulated data is large, The microcomputer 163 may be configured to provide a driving stop command of the focus motor 161 to the focus motor driver 162.

FIG. 3 is an internal circuit diagram of some components illustrated in FIG. 2, and illustrates an internal circuit diagram of the spatial high frequency filter 130 and the multiplier 140.

The spatial high frequency filter 130 performs three horizontal lines of pixel values (one bit) in one field screen in order to perform spatial high frequency filtering on the output value of the multiplexer 120 by the filter coefficient having a 3 × 3 structure shown in FIG. 4A. ) Is required. Therefore, the spatial high frequency filter 130 includes two 1H (H: horizontal period) delay elements 131 and 132. Here, when the resolution of one field screen is 640 × 480, each of the 1H delay elements 131 and 132 is a FIFO (First-In First-Out) memory capable of storing 640-bit data.

That is, when the pixel value of the 3x3 structure processed by the spatial high frequency filter 130 is P1 to P9 as shown in FIG. 4B, the pixel value P1 corresponding to the first line of three consecutive horizontal lines is shown. -P3 are stored in the first FIFO memory 131, and the pixel values P4-P6 corresponding to the second line are stored in the second FIFO memory 132, and the pixel values P7 corresponding to the third line. P9 to P9 are sequentially output from the D flip-flop D1, which is one clock delay element. Here, the pixel from which the high frequency component is extracted is a pixel located at "P5".

In addition, in order to obtain the high frequency component value of the luminance signal of the pixel located at P5 among the pixel values P1 to P9 of the 3x3 structure, a predetermined operation is performed using the filter coefficient shown in FIG. Should be performed. However, since the filter coefficients shown in FIG. 4A are all primes, which complicates the calculation, first, by using the filter coefficients a to i shown in FIG. 4C, " P1 × a + P2 × b + P3 × c + P4 × d + P5 × e + P6 × f + P7 × g + P8 × h + P9 × i "operation, then divide the result by 16 later.

Therefore, the spatial high frequency filter 130 includes nine multipliers M1 to M9 and eight adders A1 to A8 for multiplying the pixel values P1 to P9 and the corresponding filter coefficients a to i. ) And 21 D flip-flop portions D2 to D22.

Meanwhile, the multiplier 140 includes seven D flip-flop units D23 to D29 to multiply the output value of the spatial high frequency filter 130 by the 8-bit luminance signal of the pixel located at " P7 " One multiplier M10 is provided. In addition, the multiplier 140 includes a divider 141 dividing the result value of the multiplier M10 by 16 as described above.

As a result, the multiplier 140 serves to simplify the calculation for spatial high frequency filtering, which should be performed on the 8-bit luminance signal, and therefore, the hardware configuration of the spatial high frequency filter 130 is small. It can be implemented in memory (bitwise FIFO memory) and logic.

Referring to the operation of the auto focus system according to an embodiment of the present invention configured as described above in more detail.

First, the luminance signal of each pixel output from the image signal processor 5 of the video camera is converted into an 8-bit digital signal by the analog-to-digital converter 110 and then input to the multiplexer 120. Here, the luminance signal of each pixel is serially input to the analog-to-digital converter 110 in the scanning order of the one-field screen captured by the video camera.

The multiplexer 120 selects only the seventh bit value among the input 8-bit luminance signals and outputs it to the spatial high frequency filter 130.

The spatial high frequency filter 130 performs spatial high frequency filtering on the output value of the multiplexer 120 with the filter coefficient of the 3 × 3 structure shown in FIG. 4A to extract the high frequency component value of the luminance signal of the corresponding pixel.

For example, the pixel values P1 to P3 shown in FIG. 4B are stored in the first FIFO memory 131 of the spatial high frequency filter 130, and the pixel values P4 to P6 are stored in the second FIFO memory 132. When one clock is input while the pixel value P7 is stored in the D flip-flop D1, the pixel values P1, P4, and P7 are respectively input to the multipliers M1, M4, and M7 and multiplied by the corresponding filter coefficients a, d, and g, respectively. And then stored in the D flip-flop units D2, D9, and D15, respectively.

Thereafter, when one clock is input again, the values stored in the D flip-flop units D2, D9, and D15 are stored in the D flip-flop units D3, D10, and D16, respectively, and at the same time, the pixel values P2, P5, and P8. Are respectively input to multipliers M2, M5 and M8, multiplied by the corresponding filter coefficients b, e and h and stored in D flip-flop units D4, D11 and D17, respectively.

After that, if one clock is input again, the values stored in the D flip-flop units D3 and D4 are added by the adder A1 and stored in the D flip-flop unit D5, and the values stored in the D flip-flop units D10 and D11. The value added by this adder A3 is stored in the D flip-flop section D12, and the value stored in the D flip-flop sections D16 and D17 is added by the adder A5 and stored in the D flip-flop section D18, and at the same time the pixel value P3 , P6 and P9 are respectively input to multipliers M3, M6 and M9 and multiplied by the corresponding filter coefficients c, f and i, respectively, and stored in the D flip-flop units D6, D13 and D19, respectively.

After that, when one clock is input again, the values stored in the D flip-flop units D5 and D6 are added by the adder A2, stored in the D flip-flop unit D7, and stored in the D flip-flop units D12 and D13. This value is added by the adder A4 and stored in the D flip-flop unit D14, and the value stored in the D flip-flop units D18 and D19 is added by the adder A6 and stored in the D flip-flop unit D20.

After that, if one clock is input again, the value stored in the D flip-flop unit D7 is stored in the D flip-flop unit D8, and the values stored in the D flip-flop units D14 and D20 are added by the adder A7. The flip-flop part D21 is stored.

After that, if one clock is input again, the values stored in the D flip-flop units D8 and D21 are added by the adder A8, and are stored in the D flip-flop unit D22, and eventually P1 x a + P2 x b + P3 x at D22. The values of c + P4 x d + P5 x e + P6 x f + P7 x g + P8 x h + P9 x i are stored.

On the other hand, when the 8-bit luminance signal of the pixel located at P7 shown in FIG. 4B passes through the multiplexer 120 and the seventh bit value thereof is stored in the D flip-flop D1, the 8-bit luminance signal of the pixel located at P7 is multiplied. P1 × a + P2 × b + P3 × c + P4 × d + P5 × e + P6 × f + P7 × g + P8 in the spatial high frequency filter 130 after being stored in the first D flip-flop portion D23 of 140 While the xh + P9xi operations are performed, they are stored in the D flip-flop unit D29 after passing through the D flip-flop units D24 to D28 in synchronization with each clock.

Therefore, when one clock is input again, P1 × a + P2 × b + P3 × c + P4 × d + P5 × e + P6 × f + P7 stored in the D flip-flop portion D22 of the spatial high frequency filter 130. The multiplier M10 multiplies the value of xg + P8xh + P9xi by the multiplier M10 of the pixel located at P7 stored in the D flip-flop portion D29 of the multiplier 140 and the multiplier result is multiplied. It is output to 141.

The divider 141 divides the value received from the multiplier M10 by 16 and outputs the result value to the comparison accumulator 150. Here, the value output from the divider 141 becomes a high frequency component value of the luminance signal of the pixel located at P7.

In addition, the operations of the spatial high frequency filter 130 and the multiplier 140 described above are repeatedly performed on all the pixels of one field screen.

On the other hand, the comparison accumulator 150 compares the absolute value of the value output from the divider 141 of the multiplier 140 with the set first reference value (for example, 32) and the absolute value is greater than the first reference value. The operation of accumulating the output value only when it is large is repeated for all the pixels of one field screen, and the resulting accumulated data is output to the microcomputer 163 of the focus adjusting unit 160.

The microcomputer 163 of the focus adjusting unit 160 compares the cumulative data received from the comparison accumulator 150 with the set second reference value and determines that the current focus is not correct when the cumulative data is small, thereby driving the focus motor 161. The direction is determined and then provided to the focus motor driver 162. If the accumulated data is large, the controller determines that the current focus is precisely correct, and provides a driving stop command of the focus motor 161 to the focus motor driver 162.

The focus motor driver 162 drives or stops the focus motor 161 under the control of the microcomputer 163, and the focus motor 161 is driven by the focus motor driver 162 to provide the focus lens of the video camera. Move 1) a predetermined amount or fix it at the current position.

5 is a functional block diagram of an autofocus system according to another embodiment of the present invention, wherein the autofocus system includes a selection bit controller 121 and a first reference value controller in the configuration of an embodiment of the present invention shown in FIG. 151 and a second reference value controller 164 are further provided. In addition, in FIG. 5, components that perform the same functions as those in the embodiment of the present invention (FIG. 2) are described with the same reference numerals.

The selection bit controller 121 provides a bit positioning signal to the multiplexer 120 to change a bit value selected by the multiplexer 120. That is, the selection bit control unit 121 allows the video camera user to arbitrarily select a bit value selected by the multiplexer 120 in addition to a bit value other than the seventh bit value (usually the fifth bit, the sixth bit, and the eighth bit, which is an upper bit). First bit, etc.).

The first reference value controller 151 provides the comparison accumulator 150 with a first reference value setting signal for changing the first reference value of the comparison accumulator 150. That is, the first reference value control unit 151 allows the video camera user to arbitrarily change the first reference value, which is the determination reference of the comparison accumulator 150.

The second reference value controller 164 provides a second reference value setting signal for changing the second reference value of the microcomputer 163 to the microcomputer 163. That is, the second reference value controller 164 allows the video camera user to arbitrarily change the second reference value, which is the determination standard of the microcomputer 163.

As described above, when the video camera user changes the selection bit of the multiplexer 120, the first reference value of the comparison accumulator 150, or the second reference value of the microcomputer 163 to an appropriate value according to the current situation, more accurate auto focusing function is performed. Can be performed.

As described above, the present invention extracts the high-frequency components of the luminance signal output from the video signal processing unit of the video camera in place of the existing optical system and then automatically focuses on the basis of the resultant value, thereby simplifying the structure and making it compact and lightweight. And the cost of the product is reduced.

In addition, the present invention has the effect of simplifying the hardware configuration because the spatial high frequency filter is implemented in a small memory (bit-by-bit FIFO memory) and logic.

Claims (3)

An analog / digital converter configured to convert the luminance signal of each pixel output from the image signal processor of the video camera into a digital signal and output the digital signal; A multiplexer unit which selects and outputs only one set bit value among a plurality of bit values constituting a luminance signal output from the analog / digital converter; A spatial high frequency filter unit for performing spatial high frequency filtering on the output value of the multiplexer unit using a filter coefficient having a 3 × 3 structure to output high frequency component values of luminance signals of the corresponding pixels; A multiplier for multiplying an output value of the spatial high frequency filter by a luminance signal value of a predetermined pixel; A comparison accumulator for comparing the output value of the multiplier with a set first reference value and repeating an operation of accumulating output values only when the output value is larger than the first reference value for all pixels on the first field screen to output accumulated data; And The cumulative data output from the comparison accumulator is compared with the set second reference value, and if the cumulative data is small, the focus lens of the video camera is moved by a predetermined amount. If the cumulative data is large, the focus lens is determined to be an optimal focus state. An auto focus system of a video camera, characterized in that it consists of a focusing unit for locking it in position. The apparatus of claim 1, wherein the auto focus system of the video camera further comprises a selection bit control unit configured to provide a bit positioning signal for changing the one bit value selected and output from the multiplexer unit to the multiplexer unit. Auto focus system of video camera. The method of claim 1 or 2, wherein the focus adjustment unit A focus motor for moving the focus lens; A focus motor driver for controlling driving of the focus motor; And The accumulated data output from the comparison accumulator is compared with the set second reference value, and when the accumulated data is small, the driving direction of the focus motor is determined and provided to the focus motor driver. When the accumulated data is large, the driving stop command of the focus motor is large. And a microcomputer to provide the focus motor driver to the auto focus system.