KR100298361B1 - Asynchronous Transfer Mode Cell Handshaking Method Between Asynchronous Transfer Mode Layer and Multiple Physical Layers - Google Patents

Abstract

In the asynchronous transmission mode cell handshaking method between an asynchronous transmission mode layer and multiple physical layers, the present invention provides a method for checking whether the multiple physical layers are selected by the asynchronous transmission mode layer and whether data can be received. The first physical layer device selected by the asynchronous transmission mode layer and receiving a data reception enabled state transmits an asynchronous transmission mode cell transmission start signal to the asynchronous transmission mode layer and all non-selected second physical layer devices and transmits its own asynchronous. Transmitting a transmission mode cell to the asynchronous transmission mode layer, and whether the asynchronous transmission mode cell transmission start signal is received by a second physical layer device which is unselected by the asynchronous transmission mode layer and has received a data reception state And determining the first physical signal when the asynchronous transmission mode cell transmission start signal is received. The process of controlling the asynchronous transmission mode cell of the second physical layer device is not transmitted until the asynchronous transmission mode cell transmission of the layer device is completed.

Description

Asynchronous Transfer Mode Cell Handshaking Method Between Asynchronous Transfer Mode Layer and Multiple Physical Layers

The present invention relates to an interface device, and more particularly, to an asynchronous transfer block (Asynchronous Transfer Mode layer) and a multi-physical layer interface of UTOPIA Level 2 (Universal Test & Operations Physical Interface for ATM level 2). The present invention relates to a transmission mode cell handshaking method.

UTOPIA (Universal Test & Operations Physical Interface for ATM) is a standard for handshaking (handshaking) for transmitting and receiving ATM cells between the ATM layer and the physical layer. The ATM Forum has finalized the UTOPIA Level 2, Version 1.0 standard by extending UTOPIA Level 1, an ATM cell transmission method between a single ATM layer and a single physical layer. UTOPIA Level 2 supports ATM cell transmission between a single ATM layer and multiple ATM layers, between multiple ATM layers and a single physical layer, and between multiple ATM layers and multiple physical layers.

Pages 5 and 6 of Utopia Level 2, Version 1.0 af-phy-0039.000, published in June 1995 by The ATM Forum Technical Committee, provide a basic reference model for UTOPIA, an extended reference model, and the intended use of UTOPIA Level 2. The reference configuration is shown. 14 is a basic reference model configuration diagram for UTOPIA, FIG. 15 is an expanded reference model configuration diagram, and FIGS. 16A to 16D are diagrams for various UTOPIA reference models based on the reference model.

UTOPIA consists of UTOPIA Tx (tranmit) and UTOPIA Rx (Receive). The UTOPIA Tx is TxData, which is the ATM cell data to be transmitted, and Tx Control (Tx Addr, TxClav, TxEnb, which is a handshaking signal between the ATM layer and the physical layer). TxSOC, etc.) to transmit ATM cells from the ATM layer to the physical layer. The UTOPIA Rx (Receive) is an ATM cell from the physical layer to the ATM layer using Rx Data (Rx Data, Rx Addr, RxClav, RxEnb, RxSOC, etc.) which is a handshaking signal between the ATM layer and the physical layer. It serves to transmit.

In UTOPIA Level 1, TxControl defines TxSOC, TxEnb, TxFull / TxClav, TxClk, TxPrty, Txclav [3: 1], and TxRef signals to transfer ATM cells between a single ATM layer and a single physical layer, and RxControl defines RxSOC, RxEnb, RxEmpty / RxClav, RxClk, RxPrty, Rxclav [3: 1] and RxRef signals were defined. UTOPIA level 2 adds a polling technique between multiple ATM layers and multiple physical layers in UTOPIA level 1. The polling address of UTOPIA level 2 (meaning the address generated by ATM when polling) defines the TxAddr and RxAddr signals.

Tables 1 and 2 show signals defined in UTOPIA Tx and UTOPIA Rx.

signal direction Required / Optional Logic Explanation TxAddr [4: 0] ATM → PHY necessary Address of the multiphysics device to be selected TxData [7: 0] ATM → PHY necessary Data bus TxSOC ATM → PHY necessary Starting point of boundary of ATM cell TxEnb ATM → PHY necessary Whether data can be transmitted TxFull / TxClav PHY → ATM necessary Tristate FIFO full / cell buffer storage available TxClk ATM → PHY necessary Transmitter Operation Clock TxData [15: 8] ATM → PHY Selection Extended data bus to support 16-bit operation TxPrty ATM → PHY Selection Data Bus Odd Peripheral Bit TxClav [3: 1] PHY → ATM Selection FIFO full / cell buffer storage available TxRef ATM → PHY Selection Reference signal for synchronization purpose (e.g. 8KHz)

signal direction Required / Optional Logic Explanation RxAddr [4: 0] ATM → PHY necessary Address of the multiphysics device to be selected RxData [7: 0] PHY → ATM necessary Tristate Data bus RxSOC PHY → ATM necessary Tristate Start Of Cell At ATM Cell Boundary RxEnb ATM → PHY necessary Whether data can be transmitted RxEmpty / RxClav PHY → ATM necessary Tristate FIFO empty / ATM cell in cell send buffer (available) RxClk ATM → PHY necessary Receiver operation clock RxData [15: 8] PHY → ATM Selection Tristate Extended data bus to support 16-bit operation RxPrty PHY → ATM Selection Data Bus Odd Peripheral Bit RxClav [3: 1] PHY → ATM Selection FIFO empty / ATM cell in cell sending buffer (avilable) RxRef PHY → ATM Selection Reference signal for synchronization purpose (e.g. 8KHz)

Multi-physical layer support operations performed at UTOPIA Level 2 are first and basic operations, 1-TxClav and 1-Rxclav operations, second, direct status indication, third, multiplexing. There is a multiplexed status polling technique. See Utopia Level 2, Version 1.0 af-phy-0039.000, published in June 1995 by The ATM Forum Technical Committee, for such multi-physical layer support operations.

The signal of the UTOPIA Tx part is defined as shown in Table 1, and the operation thereof will be described with reference to FIGS. 1 is a diagram illustrating an operation timing for TxClav checking and cell transmission of an ATM layer.

Referring to FIG. 1, a physical layer PHY-N device receives an ATM cell. In FIG. 1, P40 to P48 of an ATM cell, TxData, are received. The ATM layer continues to check the TxClavs transmitted from the physical layer. Then, as in the 10th to 11th rising edges of the clock TxClk, the ATM layer notifies the physical layer by setting TxEnb to "1" when there is no ATM cell to be transmitted or other work processing takes precedence. The ATM layer selects the physical layer PHY-N + 3 device at the 16th rising edge of the clock TxClk and sets TxSOC to "1" to inform the physical layer of the start of transmission of the ATM cell. Accordingly, an ATM cell composed of header 5 bytes H1 to H5 and payload data 48 bytes P1 to P48 will be transmitted to the physical layer PHY-N + 3 from the time when TxSOC is "1".

Meanwhile, during ATM cell transmission, the ATM layer transmits TxAddr as shown in FIG. 1 to the physical layer, and continuously checks the TxClav of the corresponding physical layer. TxAddr consists of 5 bits as defined in Table 1 (TxAddr [0: 4]). In TxAddr, "1F (hexa)" is a null address, "N + 2", "N + 3", "N + 1", "N", and the like are polling addresses for the corresponding physical layer device. The weight for generating the polling address varies depending on the traffic type, and the order of polling to the corresponding physical layer device is determined based on the weight. In TxClav transmitted by the corresponding physical layer device in response to TxAddr, the logic "1" state means the FIFO only charge state, the logic "0" state means that there is cell buffer storage space, "0" and "1" The middle level of "means high-impedance state.

2 is a diagram illustrating an operation timing of a cell transmission after completion of ATM cell transmission. The physical layer PHY-N device receives the ATM cell, and the ATM layer keeps checking the TxEnb by the corresponding physical layer device. At the fourth rising edge of the clock TxClk, the ATM layer informs the physical layer with TxEnb as "1" that there is no cell to transmit. The ATM layer continues to poll the corresponding physical layer, but the physical layer stops receiving the cell because TxEnb is "1". The ATM layer selects the physical layer PHY-N + 3 at the 10th rising edge of the clock TxClk and then transmits an ATM cell to the physical layer PHY-N + 3. The ATM cell is transmitted from the time when TxSOC is in the "1" state.

3 is an example of operation timing regarding the suspension of ATM cell transmission in the ATM layer. At the fifth rising edge of the clock TxClk during ATM cell transmission, TxEnb transitions to "1", so cell reception is stopped. Thereafter, at the 12th rising edge of clock TxClk, TxEnb transitions back to " 0 ", so the physical layer PHY-N device continues to receive the suspended cell. The ATM layer continuously checks the TxClav of the device of the physical layer during cell transmission.

Meanwhile, the signal of the UTOPIA Rx part is defined as shown in Table 2, and the operation thereof will be described with reference to FIGS. 4 to 6.

4 is a diagram illustrating an operation timing of RxClav checking and cell reception of an ATM layer. Referring to FIG. 4, the physical layer PHY-N device transmits an ATM cell, and the ATM layer continuously checks RxClav transmitted from the corresponding physical layer device. The ATM layer informs the physical layer that RxEnb is " 1 " that there is no ATM cell buffer space to receive, as in the 10th to 11th rising edges of the clock TxClk. The ATM layer then selects the physical layer PHY-N + 3 device at the 15th rising edge of clock RxClk and transitions RxEnb to "0" to inform the physical layer PHY-N + 3 device of the ATM cell buffer space to receive. Accordingly, the physical layer PHY-N + 3 informs the ATM layer of the ATM cell transmission start by setting RxSOC to "1" because the RxEnb is "0" at the 12th rising edge of the clock RxClk. During ATM cell reception, the ATM layer sends RxAddr to the physical layer to continue checking the RxClav of the device in the physical layer.

FIG. 5 is an example of operation timing relating to the start of cell reception after completion of ATM cell reception in the ATM layer. The physical layer PHY-N device transmits an ATM cell, and the ATM layer keeps checking RxClav of the corresponding device of the physical layer. At the sixth to eleventh times of the clock RxClk, the ATM layer informs the physical layer that RxEnb is "1" that there is no cell to transmit. Then, at the 12th rising edge of the clock RxClk, RxEnb is shifted to "0", so the selected physical layer PHY-N + 3 device transmits an ATM cell to be received to the ATM layer with RxSOC as "1".

6 is an example of operation timing related to the suspension of ATM cell reception in an ATM layer. The ATM layer informs the physical layer PHY-N device that there is no ATM cell buffer space to receive by RxEnb transitioning to "1" at the sixth rising edge of clock RxClk during ATM cell reception. In the seventh rising edge of the RxClk, since the RxEnb is "1", the physical layer PHY-N device stops cell transmission. Thereafter, at the eleventh rising edge of the clock RxClk, the RxEnb transitions back to " 0 ", so that the physical layer PHY-N device continues the cell transfer that was suspended. The ATM layer continuously checks the RxClav of the corresponding physical layer during ATM cell reception.

UTOPIA Level 2 relates to a technique that supports ATM cell handshaking between multiple ATM layers and multiple physical layers. However, a UTOPIA RxData collision problem occurs between multiple physical layers implemented by a single chip (domain) and multiple physical layers of another single chip (domain). The UTOPIA RxData collision problem will be described with reference to FIG. 7. The multiple physical layers are implemented with PHY-1, PHY-2, PHY-N, PHY-3, PHY-5, PHY-9, PHY-N + i, PHY-7, as shown in the example shown in FIG. The physical layers of PHY-1, PHY-2, PHY-N, and PHY-3 are configured to be included in the first single chip 10, PHY-5, PHY-9, PHY-N + i, and PHY. The physical layers of −7 are configured to be included in the second single chip (domain) 20. The receivers of the first and second single chips 10 and 20 are connected to the ATM layer 30 through the UTOPIA Rx interface.

In the example configuration of FIG. 7, the physical layer PHY-N device of the first single chip 10 is transmitting an ATM cell to the ATM layer 30, and accordingly, the ATM layer 30 has a receiving buffer space with RxEnb as "0". In a situation in which all the physical layers are continuously informed, the RxClav of the second single chip 20 is set to "1" because there is an ATM cell to be transmitted by the physical layer PHY-N + i device of the second single chip 20. In addition, the physical layer PHY-N + i device checks whether RxEnb is "0". As described above, the RxEnb = "0" state is maintained, so that the physical layer PHY-N device of the first single chip 10 already has an ATM cell. Despite being transmitted to the ATM layer through RxData, its ATM cell is transmitted to the ATM layer 30 through the RxData. As a result, a collision occurs between the RxData between the physical layer PHY-N device and the PHY-N + i device. Such a collision occurs because there is no signal indicating that an ATM cell is transmitting between a physical layer PHY-N device and another physical layer PHY-N + i device.

If RxEnb of each single chip including a plurality of physical layer devices is connected to the ATM layer, and RxENB = "0" is applied only to the corresponding single chip, the data collision problem as described above. Does not occur, but in this case, additional pins must be allocated to the ATM layer and RxENB signal control for each single chip must be performed separately. In addition, there is a disadvantage that the existing ATM cell handshaking procedure should be changed.

If an access circuit for data collision prevention is implemented between the multiple physical layer and the ATM layer, the data collision problem is solved. However, in this case, the access circuit must be additionally implemented, and the existing ATM cell handshaking procedure is performed. There is a disadvantage to be changed.

Accordingly, an object of the present invention is to provide an ATM cell handshaking method between an ATM layer and a multiphysics layer to solve a data collision problem of multiple UTOPIA blocks of a UTOPIA level 2 without adding an additional circuit.

Another object of the present invention is to support the transmission technique of the existing UTOPIA Rx as it is, does not require additional pins of the UTOPIA Rx part, and also does not require additional connection circuits when connecting multiple physical layer chips (domains). ) And another physical layer chip (domain) to provide a handshaking method that can be directly connected to the ATM layer.

It is still another object of the present invention to provide a method capable of supporting ATM cell handshaking at UTOPIA level 2 without changing the circuit structure even when ATM and physical layers are expanded.

According to the above object, the present invention, in the asynchronous transmission mode cell handshaking method between the asynchronous transmission mode layer and the multiple physical layer, whether the selection by the asynchronous transmission mode layer and whether data reception is possible in the multiple physical layers And a first physical layer device selected by the asynchronous transmission mode layer and receiving a data reception enabled state to transmit an asynchronous transmission mode cell transmission start signal to the asynchronous transmission mode layer and all non-selected second physical layer devices. Transmitting the asynchronous transmission mode cell to the asynchronous transmission mode layer, and transmitting the asynchronous transmission mode cell by a second physical layer device which is unselected by the asynchronous transmission mode layer and receives a data reception state. Determining whether a start signal is received; When new features to the completion of the first asynchronous transfer mode cell transmission of the physical layer device constituted by any process of controlling not the second physical layer device, an asynchronous transfer mode cell is not transmitted in the.

1 is an example of operation timing related to TxClav checking and cell transmission of an ATM layer.

2 is a diagram illustrating an operation timing of a cell transmission after completion of ATM cell transmission;

3 is an example of operation timing relating to an ATM cell transmission pause of an ATM layer;

4 is a diagram illustrating an operation timing of RxClav checking and cell reception of an ATM layer.

5 is an example of operation timing relating to the start of cell reception after completion of ATM cell reception of the ATM layer;

6 is an example of operation timing regarding the suspension of ATM cell reception of an ATM layer;

FIG. 7 is a diagram for explaining a UTOPIA RxData collision problem between multiple physical layers implemented by a single chip (domain) and multiple physical layers of another single chip (domain);

8 is a flowchart illustrating the operation of the UTOPIA Rx unit according to an embodiment of the present invention;

9 is a state diagram of a finite state machine for controlling RxData of a physical layer according to an embodiment of the present invention;

10 is an operation waveform diagram of a UTOPIA Rx unit according to an embodiment of the present invention;

11 is a configuration diagram of a UTOPIA Rx unit according to an embodiment of the present invention;

12 is a detailed circuit diagram in which the RxSOC of FIG. 11 is implemented as a bidirectional pulldown buffer;

FIG. 13 shows ATM cell counter ATM_Cell_cnt and ATM cell transmission status check counter Utopia_Rx_cnt and UTOPIA RxData and RxSOC control finite state machine Ctl_FSM provided in the UTOPIA Rx part of each physical layer PHY.

14 is a block diagram of a basic reference model for UTOPIA;

15 is an expanded reference model configuration diagram,

16A to 16D are configuration diagrams of various UTOPIA reference models based on the reference model.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the same elements in the figures are denoted by the same numerals wherever possible. In addition, detailed descriptions of well-known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

In the embodiment of the present invention, the UTOPIA RX transmission method is supported as it is, and additional input / output pins of the UTOPIA receiver are not required. We will implement another multiphysics layer domain directly to the ATM layer.

In an embodiment of the present invention, in order to solve a data collision problem of multiple UTOPIA Rx blocks of UTOPIA level 2, ATM cell handshaking signals between the ATM layer and the multiple physical layers are defined as shown in Table 3.

signal direction Required / Optional Logic Explanation RxAddr [4: 0] ATM → PHY necessary Address of the multiphysics device to be selected RxData [7: 0] PHY → ATM necessary Tristate Data bus RxSOC PHY↔ATM necessary Pull-down Start of Cell and UTOPIA Rx Status Count Start of ATM Cell Boundary RxEnb ATM → PHY necessary Whether data can be transmitted RxEmpty / RxClav PHY → ATM necessary Tristate FIFO empty / ATM cell in cell send buffer (available) RxClk ATM → PHY necessary Receiver operation clock RxData [15: 8] PHY → ATM Selection Tristate Extended data bus to support 16-bit operation RxPrty PHY → ATM Selection Data Bus Odd Peripheral Bit RxClav [3: 1] PHY → ATM Selection FIFO empty / ATM cell in cell sending buffer (avilable) RxRef PHY → ATM Selection Reference signal for synchronization purpose (e.g. 8KHz)

As shown in Table 3 above, the RxSOC signal of the Rx section of UTOPIA level 2 is modified. The RxSOC signal is implemented to be a bidirectional signal and the logic state is implemented to be pulled down. The RxSOC signal is used as the ATM cell transmission state count start signal of all physical layer devices other than the physical layer PHY-N device as well as the boundary start point of the ATM cell of the selected physical layer PHY-N device.

8 is a flowchart illustrating an operation procedure of the UTOPIA Rx unit according to an embodiment of the present invention, and FIG. 9 is a state diagram of a finite state machine for controlling RxData of a physical layer device according to an embodiment of the present invention. FIG. 10 is a diagram illustrating an operation waveform of a UTOPIA Rx unit according to an exemplary embodiment of the present invention, and FIG. 11 is a block diagram of a UTOPIA Rx unit according to an exemplary embodiment of the present invention. It should be understood that the signal connection configuration of RxClk, RxAddr [4: 0], RxClav, RxEnb, and RxData in FIG. 11 is the same as that shown in FIG.

First, referring to FIG. 11, in the embodiment of the present invention, the RxSOCs of the single chips (domains) 40, 50, and 60 of the multiple physical layers are implemented as buffers 42, 52, and 62 of bidirectional pulldown. . The UTOPIA Rx unit in each physical layer device is further provided with a UTOPIA Rx counter Upotopia_Rx_cnt and a UTOPIA RxData and RxSOC control finite state machine (FSM) Ctl_FSM to control the RxData and RxSOC signals. In FIG. 12, RxSOC of FIG. 11 is a detailed circuit diagram of a bidirectional pulldown buffer, and FIG. 13 is a UTOPIA Rx counter Utopia_Rx_cnt and UTOPIA RxData and RxSOC control provided in the UTOPIA Rx unit of each physical layer PHY device. Figure showing the finite state machine (FSM) Ctl_FSM.

Referring to FIG. 12, in the bidirectional pull-down type buffer, an output buffer 80 used for RxSOC signal output and an input buffer 82 used for RxSOC signal input are commonly connected to the input / output pad 88 through the common node 90. The common node 90 has a pull-down resistor 84 connected at one end thereof to the ground 86. Meanwhile, the bidirectional pull-down buffer may be implemented by separately using an input pad and an output pad as shown in FIG. 12 without using the input / output pad 88 in common. In this case, the output buffer 80 of FIG. 12 is directly connected to the output pad, and the input buffer 82 of FIG. 12 is directly connected to the input pad.

Referring to Fig. 13, the UTOPIA Rx section of each physical layer PHY-k (k = 1 to i, i is a natural number) includes an ATM cell counter ATM_Cell_cnt 92 and an ATM cell transmission status check counter Utopia_Rx_cnt 94, and UTOPIA RxData and RxSOC. A control finite state machine (FSM) Ctl_FSM 96 is provided, wherein the ATM cell counter ATM_Cell_cnt 92 performs an operation of counting the transmitted ATM cells, and the Utopia_Rx_cnt 94 counter for checking the ATM cell transmission status is RxSOC in an unselected physical layer. As the " 1 " is received, it is enabled and performs a count operation for about 1 ATM cell period. The Ctl_FSM 96 performs an operation mode as shown in FIG. 9, that is, a transmission mode and a check mode.

Hereinafter, operations according to an embodiment of the present invention will be described in detail with reference to FIGS. 8 to 12.

All physical layer devices in each of the single chips 40, 50, and 60 shown in FIG. 11 perform an initialization process as in step 100 of FIG. In step 100, the ATM_Cell_cnt 92 is initialized to "0", the Utopia_Rx_cnt 94 is also initialized to "0", and the Ctl_FSM 96 is reset. Thereafter, steps 210 to 250 of step 200 are performed for each RxClk.

In step 200 of FIG. 8, if RxEnb = "0", in step 210, the selected physical layer device performs step 220, and the unselected physical layer devices perform step 230. First, operation 220 of the selected physical layer device is as follows. In the periodic domain of one RxClk, its ATM_Cell_cnt 92 counts up by one, and Ctl_FSM 96 maintains the transmission mode. In addition, the RxSOC signal is transmitted, and RxData [7: 0], that is, 1 byte of an ATM cell is transmitted. Next, operation 230 of the non-selected physical layer devices is as follows. If the RxSOC signal received in the periodic domain of one RxClk is "1", the operation starts counting up Utopia_Rx_cnt 94 by 1, and Ctl_FSM 96 maintains the check mode state.

In operation 210 of operation 200 of FIG. 8, when RxEnb is “1”, operation 240 is performed. In operation 240, the RxSOC becomes a high impedance state, and ATM_Cell_cnt 92 of the physical layer device in the transmission mode and Utopia_Rx_cnt 94 of all the physical layer devices in the check mode maintain the current count value.

A detailed operation of the 200th process of FIG. 8 will be described in more detail with reference to FIGS. 9 and 10.

9 and 10, the physical layer PHY-N device operates in the transmission mode until the fourth of the clock RxClk and operates in the check mode from the fifth clock. The physical layer PHY-N + 1 device operates in the check mode up to the eighth clock of the clock RxClk and in the transfer mode from the ninth clock. As shown in FIG. 9, the transmission mode is a mode in which ATM cells are transmitting, and the check mode is a mode in which non-selected physical layers receive RxSOC = "1". As can be seen in Figures 9 and 10 it can be seen that in the embodiment of the present invention, the transmission modes of different single chips to transmit ATM cells do not overlap.

As shown in FIG. 9, the transition from the check mode to the transmission mode occurs when the selected physical layer transmits the RxSOC as "1", and the transition from the transmission mode to the check mode occurs as the ATM cell transmission is terminated. Accordingly, the RxData between the physical layer PHY-N device and the PHY-N + i device does not collide.

The selected physical layer PHY-N device of FIG. 11 transmits an ATM cell in a transmission mode that continues until the fourth clock of the clock RxClk, which is a transmission mode, as shown in FIG. Since RxEnb is "0" during the transmission mode period of the physical layer PHY-N device, Utopia_Rx_cnt 94 of unselected physical layer devices continues counting up in response to the clock RxClk. The Utopia_Rx_cnt 94 started counting in response to the application of RxSOC = " 1 " (not shown in FIG. 10). Among the non-selected physical layer devices, Utopia_Rx_cnt 94 of the physical layer PHY-N + 1 device shown in FIG. 10 is "51", "52", "53 in response to the third, fourth, and fifth rising edges of the clock RxClk. You can count up with ". And " 52 " in response to clock RxClk corresponding to cell bytes " P46 ", " P47 " and " P48 " It can be seen that the count ups to "53" and "54".

The count value of the ATM cell counter ATM_Cell_cnt 92 of the selected physical layer PHY-N device and the count value of Utopia_Rx_cnt 94 of the non-selected physical layer PHY-N + 1 device are compared with each other at the same clock time. For example, in the fourth rising edge of the clock RxClk, the count value of the ATM cell counter ATM_Cell_cnt 92 of the selected physical layer PHY-N device is "53", and the count value of Utopia_Rx_cnt 94 of the unselected physical layer devices is "52". Can be. The count value "53" of the ATM cell counter ATM_Cell_cnt 92 of the selected physical layer PHY-N device means that the ATM cell transmission from the PHY-N device has been completed.

At the fifth rising edge of clock RxClk, Utopia_Rx_cnt 94 of the unselected physical layer devices is counted up to a count value "53", and then the count value of Utopia_Rx_cnt 94 of the unselected physical layer devices is counted from the fifth clock to the seventh clock. Keep "53". The RxData of the unselected physical layer device maintains a "high impedance" state during the fifth to seventh periods of the clock RxClk. 10, the byte value of the "high impedance" state is represented by "XX". The physical layer PHY-N device terminates the ATM cell transmission at the fourth rising edge of clock RxClk and then becomes the unselected physical layer from the fifth rising edge of clock RxClk, and receives the RxSOC signal like other non-selected physical layers. Transition to check mode for Meanwhile, the ATM layer 70 continuously checks the RxClav of the corresponding physical layer through RxAddr regardless of the operation mode (the transmission mode and the check mode) of the physical layers.

10, in the eighth rising edge of the clock RxClk, the PHY-N + 1 device is selected among the physical layer devices in the check mode, and since the RxEnb is "0", the selected physical layer PHY-N + 1 is selected. The device sets the count value of the ATM cell counter ATM_Cell_cnt 92 to "1", starts ATM cell transmission, and transmits an RxSOC to "1". The selected physical layer PHY-N + 1 device transitions to the transfer mode at the time when RxSOC is transmitted as "1", that is, at the ninth rising edge of the clock RxClk shown in FIG. 10 (see FIG. 9).

At the ninth rising edge of the clock RxClk, all unselected physical layer devices (including PHY-N devices) in RxSOC receive wait state check the logic state of the RxSOC received in check mode. If the check result is RxSOC = "1", it counts up Utopia_Rx_cnt 94. That is, the count value of Utopia_Rx_cnt 94 is counted up to "1" at the 9th rising edge. Thereafter, at the tenth rising edge of the clock RxClk, RxEnb becomes "1", so that RxSOC becomes high impedance, and the ATM cell counter ATM_Cell_cnt 92 of the physical layer PHY-N + 1 device in transmission mode and all physical layers in check mode. The Utopia_Rx_cnt 94 of the devices maintains the current count value state (see step 240 of FIG. 8). That is, the ATM cell counter ATM_Cell_cnt 92 maintains the count value "1", and the Utopia_Rx_cnt 94 maintains the count value "0". Thereafter, since the RxEnb becomes "1" in the eleventh rising edge of the clock RxClk, the same operation as that in the tenth rising edge is performed.

Then, at the 12th rising edge of clock RxClk, RxEnb transitions to "0", so RxSOC transitions to "1", and the ATM cell counter ATM_Cell_cnt 92 of the physical layer PHY-N + 1 device in transmission mode and all the check modes. Utopia_Rx_cnt 94 of the physical layer devices performs a count up operation. At the 12th ascending edge, the count value of the ATM cell counter ATM_Cell_cnt 92 of the physical layer PHY-N + 1 device in the transmission mode is counted up to "3", and all physical layer device PHY-N devices in the check mode are counted up. It can be seen that the count value of Utopia_Rx_cnt 94 is counted up to "2". In this manner, as the clock RxClk increases, the count value of the ATM cell counter ATM_Cell_cnt 92 of the physical layer PHY-N + 1 device and the count value of Utopia_Rx_cnt 94 of all other physical layer devices except the physical layer PHY-N + 1 device. This increases.

In the embodiment of the present invention, by operating in the above-described manner, physical layer devices on different single chips do not overlap transmission modes, and as a result, data transmitted by physical layer devices on different single chips do not collide.

In the above description of the present invention, specific embodiments have been described, but various modifications can be made without departing from the scope of the present invention. Therefore, the scope of the present invention should not be defined by the described embodiments, but should be defined by the equivalent of claims and claims.

As described above, the present invention not only requires an additional input / output pin of the UTOPIA receiver while supporting the transmission technique of the existing UTOPIA RX, but also adds a multiphysics layer domain without adding a connection circuit when connecting multiple physical layer domains (chips). And other multiphysics layer domains can be connected directly to the ATM layer.

Claims (9)

In the asynchronous transmission mode cell handshaking method between an asynchronous transmission mode layer and multiple physical layers, Checking in the multiple physical layers whether there is a selection by the asynchronous transmission mode layer and whether data can be received; A first physical layer device selected by the asynchronous transmission mode layer and receiving a data reception state transmits an asynchronous transmission mode cell transmission start signal to the asynchronous transmission mode layer and all non-selected second physical layer devices and Transmitting an asynchronous transmission mode cell to the asynchronous transmission mode layer; Determining, by the second physical layer device that is unselected by the asynchronous transmission mode layer and receiving a data reception state, whether the asynchronous transmission mode cell transmission start signal is received; When the asynchronous transmission mode cell transmission start signal is received, controlling the asynchronous transmission mode cell of the second physical layer device not to be transmitted until the completion of the asynchronous transmission mode cell transmission of the first physical layer device. . The method of claim 1, wherein the terminals of the chips of the multiphysics layer through which the asynchronous transmission mode cell transmission start signal is input and output are implemented as a bidirectional pull-down buffer. 2. The device of claim 1, wherein each device of the multiphysics layer is selected by the asynchronous transmission mode layer and operates in a transmission mode upon receiving a data reception enabled state, and is deselected by the asynchronous transmission mode layer and is capable of receiving data. And a finite state machine operating in a check mode when the asynchronous transmission mode cell transmission start signal is received in a received state. 4. The finite state machine of claim 3, wherein the finite state machine transitions from a transmission mode to a check mode upon completion of asynchronous transmission mode cell transmission, and is selected by the asynchronous transmission mode layer and is checked when the asynchronous transmission mode cell transmission start signal is transmitted. Transition from mode to transmission mode. 2. The device of claim 1, wherein each device of the multiphysics layer is unselected by the asynchronous transmission mode layer and receives the asynchronous transmission mode cell transmission start signal while receiving a data reception enabled state for about 1 cell interval. A counter is included for checking the asynchronous transmission mode cell transmission status. In the asynchronous transmission mode cell handshaking method between an asynchronous transmission mode layer and multiple physical layers, Allocating a signal line of an asynchronous transmission mode cell transmission start signal in a plurality of single chips including a certain number of physical layer devices to be a bidirectional signal channel; Checking in the multiple physical layers whether there is a selection by the asynchronous transmission mode layer and whether data can be received; One physical layer device in a single chip selected by the asynchronous transmission mode layer and receiving a data reception enabled state sends an asynchronous transmission mode cell transmission start signal to the asynchronous transmission mode layer and all unselected physical layer devices through the bidirectional signal channel. Transmitting the asynchronous transmission mode cell to the asynchronous transmission mode layer, Determining, by the physical layer device, unselected by the asynchronous transmission mode layer and receiving a data reception state, whether an asynchronous transmission mode cell transmission start signal is received through the bidirectional signal channel; When the asynchronous transmission mode cell transmission start signal is received, controlling the asynchronous transmission mode cells of the unselected physical layer devices not to be transmitted to the asynchronous transmission mode layer until the completion of the asynchronous transmission mode cell transmission of the selected physical layer device. Characterized by the above. 7. The device of claim 6, wherein each device of the multiphysics layer is selected by the asynchronous transmission mode layer and operates in a transmission mode upon receiving a data reception enabled state, and is deselected by the asynchronous transmission mode layer to enable data reception. And a finite state machine operating in a check mode when the asynchronous transmission mode cell transmission start signal is received in a received state. 8. The method according to claim 7, wherein the finite state machine transitions from a transmission mode to a check mode upon completion of asynchronous transmission mode cell transmission, and is selected by the asynchronous transmission mode layer and checked when transmitting the asynchronous transmission mode cell transmission start signal. Transition from mode to transmission mode. 7. The method of claim 6, wherein each device of the multiphysics layer is deselected by the asynchronous transmission mode layer and receives the asynchronous transmission mode cell transmission start signal while receiving a data reception enabled state for about one cell period. A counter is included for checking the asynchronous transmission mode cell transmission status.