KR100297101B1 - Method of manufacturing a capacitor in a semiconductor device - Google Patents

Method of manufacturing a capacitor in a semiconductor device Download PDF

Info

Publication number
KR100297101B1
KR100297101B1 KR1019990025462A KR19990025462A KR100297101B1 KR 100297101 B1 KR100297101 B1 KR 100297101B1 KR 1019990025462 A KR1019990025462 A KR 1019990025462A KR 19990025462 A KR19990025462 A KR 19990025462A KR 100297101 B1 KR100297101 B1 KR 100297101B1
Authority
KR
South Korea
Prior art keywords
capacitor
film
semiconductor device
oxide film
manufacturing
Prior art date
Application number
KR1019990025462A
Other languages
Korean (ko)
Other versions
KR20010004748A (en
Inventor
김경민
박기선
Original Assignee
박종섭
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 박종섭, 주식회사 하이닉스반도체 filed Critical 박종섭
Priority to KR1019990025462A priority Critical patent/KR100297101B1/en
Publication of KR20010004748A publication Critical patent/KR20010004748A/en
Application granted granted Critical
Publication of KR100297101B1 publication Critical patent/KR100297101B1/en

Links

Classifications

    • H01L28/40—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 소자의 캐패시터 제조 방법에 관한 것으로, 반도체 기판 상부에 하부 전극을 형성한 후 유전체막으로 알루미늄 옥사이드막과 티타늄 옥사이드막의 이중막을 형성하므로써 소자의 집적화에 따른 캐패시터의 높은 정전 용량과 낮은 누설 전류 특성을 동시에 확보할 수 있는 반도체 소자의 캐패시터 제조 방법이 제시된다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, wherein a lower electrode is formed on a semiconductor substrate, and a double layer of an aluminum oxide film and a titanium oxide film is formed as a dielectric film so that a high capacitance and a low leakage of the capacitor according to the integration of the device are provided. A method of manufacturing a capacitor of a semiconductor device capable of simultaneously securing current characteristics is provided.

Description

반도체 소자의 캐패시터 제조 방법{Method of manufacturing a capacitor in a semiconductor device}Method of manufacturing a capacitor in a semiconductor device

본 발명은 반도체 소자의 캐패시터 제조 방법에 관한 것으로, 특히 알루미늄옥사이드(Al2O3)와 티타늄 옥사이드(TiO2)의 이중막으로 유전체막을 형성하므로써 높은 높은 정전 용량과 낮은 누설 전류 특성을 동시에 확보할 수 있는 반도체 소자의 캐패시터 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device. In particular, by forming a dielectric film with a double layer of aluminum oxide (Al 2 O 3 ) and titanium oxide (TiO 2 ), high capacitance and low leakage current characteristics can be secured simultaneously. The present invention relates to a method for manufacturing a capacitor of a semiconductor device.

탄탈륨 옥사이드(Ta2O5)는 기존의 DRAM 제조 공정에서 캐패시터의 유전체막으로 사용되는 ONO막(Oxide-Nitride-Oxide)보다 유전율이 5배 정도 더 크므로 1G 이상의 고집적도가 요구되는 DRAM 제조 공정에서 캐패시터의 유전체막 물질로 각광받고 있다. 특히 Ta2O5는 CVD 공정을 사용하여 높은 스텝커버러지를 얻을 수 있고, 후속 열처리 공정에 의해 유전 특성이 좋고 누설 전류가 작은 막으로 구현될 수 있다.Tantalum oxide (Ta 2 O 5 ) is 5 times larger in dielectric constant than Oxide-Nitride-Oxide, which is used as a dielectric film for capacitors in DRAM manufacturing processes. Has been spotlighted as a dielectric film material for capacitors. In particular, Ta 2 O 5 can obtain high step coverage by using a CVD process, and can be realized as a film having good dielectric properties and a small leakage current by a subsequent heat treatment process.

또한, 알루미늄 옥사이드는 유전율은 낮지만 누설 전류 특성은 우수한 것으로 알려져 있다.In addition, aluminum oxide is known to have a low dielectric constant but excellent leakage current characteristics.

그런데, 소자가 점점 고집적화됨에 따라 안정된 소자의 동작을 위해 필요한 셀당 캐패시턴스는 변화가 없으나, 캐패시터 셀 사이즈는 점점 줄어들어 탄탈륨 옥사이드나 알루미늄 옥사이드의 단일막으로 유전체막을 형성할 경우에는 캐패시터의 충분한 정전 용량과 낮은 누설 전류를 동시에 확보할 수 없다.However, as the device becomes increasingly integrated, the capacitance per cell required for stable operation of the device does not change, but the capacitor cell size decreases gradually. Leakage current cannot be secured at the same time.

따라서, 본 발명은 알루미늄 옥사이드의 우수한 누설 전류 특성을 확보하면서 정전 용량 값을 극대화하기 위해 알루미늄 옥사이드와 고유전 특성을 지닌 티타늄 옥사이드(εt=40∼60)의 이중막으로 유전체막으로 형성하므로써 높은 정전 용량과 낮은 누설 전류를 동시에 확보할 수 있는 반도체 소자의 캐패시터 제조 방법을 제공하는데 그 목적이 있다.Accordingly, the present invention provides a high-density film by forming a dielectric film with a double layer of aluminum oxide and titanium oxide having high dielectric properties (ε t = 40 to 60) in order to maximize the capacitance value while ensuring excellent leakage current characteristics of aluminum oxide. It is an object of the present invention to provide a method for manufacturing a capacitor of a semiconductor device capable of simultaneously securing a capacitance and a low leakage current.

상술한 목적을 달성하기 위한 본 발명은 반도체 소자의 캐패시터 제조 방법에 있어서, 소정의 공정을 통해 하부 구조가 형성된 반도체 기판 상부에 하부 전극을 형성하는 단계와, 상기 하부 전극 상부에 유전체막으로 알루미늄 옥사이드막 및 티타늄 옥사이드막의 이중막을 형성하는 단계와, 상기 유전체막 상부에 상부 전극을 형성하는 단계를 포함하여 이루어진 것을 특징으로 한다.In accordance with another aspect of the present invention, there is provided a method of manufacturing a capacitor of a semiconductor device, the method comprising: forming a lower electrode on an upper portion of a semiconductor substrate having a lower structure through a predetermined process; Forming a double layer of the film and the titanium oxide film, and forming an upper electrode on the dielectric film.

도 1(a) 내지 도 1(c)는 본 발명에 따른 반도체 소자의 캐패시터 제조 방법을 설명하기 위한 소자의 단면도.1 (a) to 1 (c) are cross-sectional views of a device for explaining a capacitor manufacturing method of a semiconductor device according to the present invention.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for main parts of the drawings>

11 : 반도체 기판 12 : 제 1 폴리실리콘막11: semiconductor substrate 12: first polysilicon film

13 : 알루미늄 옥사이드막 14 : 티타늄 옥사이드막13: aluminum oxide film 14: titanium oxide film

15 : 티타늄 나이트라이드막 16 : 제 2 폴리실리콘막15 titanium nitride film 16 second polysilicon film

첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.The present invention will be described in detail with reference to the accompanying drawings.

도 1(a) 내지 도 1(d)는 본 발명에 따른 반도체 소자의 캐패시터 제조 방법을 설명하기 위한 소자의 단면도이다.1 (a) to 1 (d) are cross-sectional views of devices for explaining a capacitor manufacturing method of a semiconductor device according to the present invention.

도 1(a)를 참조하면, 소정의 공정을 통해 게이트, 소오스, 드레인 및 비트라인등이 형성된 반도체 기판(11) 상부에 하부 전극으로 제 1 폴리실리콘막(12)을 형성한다. 폴리실리콘막(12)을 HF 또는 BOE로 식각하여 자연 산화막을 제거한다. 제 1 폴리실리콘막(12) 상부에 알루미늄 옥사이드막(13)을 형성한다. 알루미늄 옥사이드막(13)은 0.1∼1Torr의 압력을 유지하는 반응로에 (CH3)3Al 소오스 가스와 H2O 가스를 유입시켜 200∼450℃로 가열된 웨이퍼에 증착한다. 후속 열공정으로 알루미늄 옥사이드(13)내의 탄소 및 불순물을 제거하기 위해 300∼400℃에서 N2O 플라즈마 어닐을 실시한 후 알루미늄 옥사이드막을 결정화시키기 위해 600∼650℃의 질소 분위기에서 10∼30분간 어닐 공정을 실시한다.Referring to FIG. 1A, a first polysilicon layer 12 is formed as a lower electrode on an upper portion of a semiconductor substrate 11 on which gates, sources, drains, bit lines, and the like are formed. The polysilicon film 12 is etched with HF or BOE to remove the native oxide film. An aluminum oxide film 13 is formed on the first polysilicon film 12. The aluminum oxide film 13 is deposited on a wafer heated to 200 to 450 ° C. by introducing (CH 3 ) 3 Al source gas and H 2 O gas into a reactor maintaining a pressure of 0.1 to 1 Torr. Subsequent thermal process was performed by N 2 O plasma annealing at 300 to 400 ° C. to remove carbon and impurities in the aluminum oxide 13, and then annealing for 10 to 30 minutes in a nitrogen atmosphere at 600 to 650 ° C. to crystallize the aluminum oxide film. Is carried out.

도 1(b)는 알루미늄 옥사이드막(13) 상부에 티타늄 옥사이드막(14)을 형성한 상태의 단면도이다. 티타늄 옥사이드막(14)은 CVD 방법 또는 스퍼터링 방법으로 티타늄을 증착한 후 N2O 플라즈마 처리를 실시하여 형성한다. N2O 플라즈마 처리는 챔버의 압력을 0.1∼1Torr로 유지하고, 서브 히터의 온도를 300∼500℃로 유지한 상태에서 N2O 가스를 20∼1000sccm의 양으로 유입시키고 고주파 전력을 10∼500W로 인가하여 형성한다. 이때, N2O 플라즈마 처리는 10초∼1분 정도 실시한다.FIG. 1B is a cross-sectional view of the titanium oxide film 14 formed on the aluminum oxide film 13. The titanium oxide film 14 is formed by depositing titanium by a CVD method or a sputtering method and then performing an N 2 O plasma treatment. In the N 2 O plasma treatment, the chamber pressure is maintained at 0.1 to 1 Torr, the N 2 O gas is introduced in an amount of 20 to 1000 sccm while the temperature of the sub heater is maintained at 300 to 500 ° C., and the high frequency power is 10 to 500 W. It is formed by applying. At this time, the N 2 O plasma treatment is performed for about 10 seconds to about 1 minute.

도 1(c)는 티타늄 옥사이드막(14) 상부에 티타늄 나이트라이드막(15)를 형성한 후 상부 전극으로 제 2 폴리실리콘막(16)을 형성한 상태의 단면도이다. 티타늄 나이트라이드막(15)은 후속 열공정에 의해 티타늄 옥사이드막(14)에서 산소가 빠져 나가는 것을 방지하기 위해 증착하는 것이다. 제 2 폴리실리콘막(16)은 1000Å 정도의 두께로 형성한다.FIG. 1C is a cross-sectional view of a state in which the second polysilicon film 16 is formed as an upper electrode after the titanium nitride film 15 is formed on the titanium oxide film 14. The titanium nitride film 15 is deposited to prevent oxygen from escaping from the titanium oxide film 14 by a subsequent thermal process. The second polysilicon film 16 is formed to a thickness of about 1000 mW.

상술한 바와 같이 본 발명에 의하면 알루미늄 옥사이드막과 티타늄 옥사이드막의 이중막으로 캐패시터의 유전체막을 형성하므로써 소자의 집적화에 따른 캐패시터의 높은 정전 용량과 낮은 누설 전류 특성을 동시에 확보할 수 있다.As described above, according to the present invention, by forming a dielectric film of a capacitor using a double layer of an aluminum oxide film and a titanium oxide film, it is possible to secure a high capacitance and a low leakage current characteristic of the capacitor due to the integration of devices.

Claims (10)

반도체 소자의 캐패시터 제조 방법에 있어서,In the capacitor manufacturing method of a semiconductor element, 소정의 공정을 통해 하부 구조가 형성된 반도체 기판 상부에 하부 전극을 형성하는 단계와,Forming a lower electrode on the semiconductor substrate on which the lower structure is formed through a predetermined process; 상기 하부 전극 상부에 유전체막으로 알루미늄 옥사이드막 및 티타늄 옥사이드막의 이중막을 형성하는 단계와,Forming a double layer of an aluminum oxide film and a titanium oxide film as a dielectric film on the lower electrode; 상기 유전체막 상부에 상부 전극을 형성하는 단계를 포함하여 이루어진 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.And forming an upper electrode on the dielectric film. 제 1 항에 있어서, 상기 알루미늄 옥사이드막은 0.1 내지 1Torr의 압력을 유지하는 반응로에 (CH3)3Al 소오스 가스와 H2O 가스를 유입시켜 200 내지 450℃로 가열된 웨이퍼에 증착하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 1, wherein the aluminum oxide film is deposited on a wafer heated to 200 to 450 ° C. by introducing (CH 3 ) 3 Al source gas and H 2 O gas into a reactor maintaining a pressure of 0.1 to 1 Torr. A method for producing a capacitor of a semiconductor device. 제 1 항에 있어서, 상기 알루미늄 옥사이드막을 형성한 후 N2O 플라즈마 어닐 공정을 실시하고 질소 분위기에서 어닐 공정을 실시하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 1, wherein after the aluminum oxide film is formed, an N 2 O plasma annealing process is performed and an annealing process is performed in a nitrogen atmosphere. 제 3 항에 있어서, 상기 N2O 플라즈마 어닐 공정은 300 내지 400℃에서 실시하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 3, wherein the N 2 O plasma annealing process is performed at 300 ° C. to 400 ° C. 5. 제 3 항에 있어서, 상기 질소 분위기 어닐 공정은 600 내지 650℃의 온도에서 10 내지 30분간 실시하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 3, wherein the nitrogen atmosphere annealing process is performed at a temperature of 600 to 650 ° C. for 10 to 30 minutes. 제 1 항에 있어서, 상기 티타늄 옥사이드막은 티타늄막을 형성한 후 N2O 플라즈마 처리를 실시하여 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 1, wherein the titanium oxide film is formed by performing a N 2 O plasma treatment after forming the titanium film. 제 6 항에 있어서, 상기 티타늄막은 CVD 방법 또는 스퍼터링 방법으로 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of manufacturing a capacitor of a semiconductor device according to claim 6, wherein the titanium film is formed by a CVD method or a sputtering method. 제 6 항에 있어서, 상기 N2O 플라즈마 0.1 내지 1Torr의 압력을 유지하는 처리 챔버에 서브 히터의 온도를 300 내지 500℃로 유지한 상태에서 N2O 가스를 20 내지 1000sccm의 양으로 유입시키고 고주파 전력을 10 내지 500W로 인가하여 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 6, wherein the N 2 O gas is introduced into the processing chamber maintaining a pressure of 0.1 to 1 Torr of N 2 O plasma in an amount of 20 to 1000 sccm while maintaining the temperature of the sub heater at 300 to 500 ° C. Capacitor manufacturing method of a semiconductor device, characterized in that formed by applying power to 10 to 500W. 제 6 항에 있어서, 상기 N2O 플라즈마 처리는 10초 내지 1분간 실시하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of claim 6, wherein the N 2 O plasma treatment is performed for 10 seconds to 1 minute. 제 1 항에 있어서, 상기 상부 전극을 형성하기 전 티타늄 나이트라이드막을 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조 방법.The method of manufacturing a capacitor of a semiconductor device according to claim 1, wherein a titanium nitride film is formed before the upper electrode is formed.
KR1019990025462A 1999-06-29 1999-06-29 Method of manufacturing a capacitor in a semiconductor device KR100297101B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019990025462A KR100297101B1 (en) 1999-06-29 1999-06-29 Method of manufacturing a capacitor in a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990025462A KR100297101B1 (en) 1999-06-29 1999-06-29 Method of manufacturing a capacitor in a semiconductor device

Publications (2)

Publication Number Publication Date
KR20010004748A KR20010004748A (en) 2001-01-15
KR100297101B1 true KR100297101B1 (en) 2001-11-01

Family

ID=19597217

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990025462A KR100297101B1 (en) 1999-06-29 1999-06-29 Method of manufacturing a capacitor in a semiconductor device

Country Status (1)

Country Link
KR (1) KR100297101B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100473113B1 (en) * 2002-04-04 2005-03-08 삼성전자주식회사 Method Of Fabricating A Capacitor Of Semiconductor Device

Also Published As

Publication number Publication date
KR20010004748A (en) 2001-01-15

Similar Documents

Publication Publication Date Title
KR100390831B1 (en) Method for forming Ta2O5 dielectric layer by Plasma Enhanced Atomic Layer Deposition
US20020076946A1 (en) Method for forming Ta2O5 dielectric layer
JPH0869998A (en) Tantalum oxide thin film preparation by low temperature ozone plasma annealing
KR20000053452A (en) Method for making an integrated circuit capacitor including tantalum pentoxide
KR100639200B1 (en) Method for manufactruing capacitor in semiconductor memory device
KR20010108994A (en) Method for manu facturing capa citor in semiconductor memory divice
KR100347547B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR100351238B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR100583157B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR20010108995A (en) Method for manufacturing capacitor in semiconductor memory divice
KR100297101B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR20020001378A (en) Method of manufacturing a capacitor in a semiconductor device
KR100671604B1 (en) Method of manufacturing a capacitor in a semiconductor device
US6329237B1 (en) Method of manufacturing a capacitor in a semiconductor device using a high dielectric tantalum oxide or barium strontium titanate material that is treated in an ozone plasma
US20040126980A1 (en) Method of fabricating capacitor with hafnium
KR100297100B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR100342873B1 (en) Method for forming capacitor of semiconductor device
KR20010088207A (en) Method of forming composite dielectric film of tantalum oxide and titanium oxide
KR100231604B1 (en) Manufacturing method of capacitor of semiconductor device
KR100382610B1 (en) Method for forming of capacitor the cell used high-integrated DRAM
KR100382611B1 (en) Method for forming of capacitor the cell used high-integrated DRAM
JP4106513B2 (en) Capacitor manufacturing method for semiconductor device
KR100321702B1 (en) Method for forming tantalum oxide and method for fabricating capacitor by the same
KR100373160B1 (en) Method of manufacturing a capacitor in a semiconductor device
KR100440777B1 (en) Method of manufacturing capacitor in semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20110429

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee