KR100282614B1 - Motion Predictor for Low Bit Rate Video Codecs - Google Patents

Abstract

The present invention proposes a motion predictor applicable to a low bit rate video codec (H.261 / H.263). The full search block matching algorithm used in the present invention is the most accurate method of extracting the motion vector through motion prediction, but when implemented, it takes a lot of computation time and high hardware cost. The parallel structure and the memory structure proposed by the present invention maximize the efficiency of the system to reduce the execution time and reduce the hardware cost. In addition, the motion predictor includes a portion in which an macro block during encoding operation determines an intra / inter block. Intra / inter decision operation requires a separate memory for the reference block data, arithmetic unit and control unit. In the present invention, this part is calculated using the reference block data in the motion predictor to reduce the extra memory, and the intra / inter decision part is performed in the motion predictor to reduce the burden on the entire codec controller.

Description

Motion Predictor for Low Bit Rate Video Codecs

The present invention relates to a motion predictor applicable to a low bit rate video codec. In particular, the present invention uses a two-port RAM to load search area data in a motion predictor with an inter / intra portion of a reference block inside the motion predictor. The present invention relates to a motion detection device for a low bit rate video codec that enables the continuous operation while reducing the size of the memory, thereby reducing the size of the entire video codec.

In general, a method of compensating inter-frame motion of an image block in an image data compression system, comprising: a motion vector of a current block from a previous frame (search area block) having substantially the same information as the current block (reference block) Is generated, and motion is estimated by detecting a motion vector whose magnitude and direction are the most similar to the motion vector of a block adjacent to the current block among the motion vectors of the current block generated by comparison with the previous block.

However, since the search area data for generating the motion vector must be loaded at a time, a large memory capacity is required, and separate hardware must be configured for intra / inter determination on the reference block from which the motion vector is detected. Therefore, there is a problem that the gate count of the entire system increases and the hardware increases.

Therefore, in the present invention, after loading both reference block data and search region data required for the motion prediction operation into the local memory of the motion predictor, the motion block does not directly perform the motion prediction operation. After loading the search area data as much as (search area size x 16), the data required during the operation was loaded without affecting the motion prediction operation to enable continuous motion prediction operation.

This is implemented by using two-port RAM to simultaneously read and write the search area data storage memory. This design reduces the time due to the loading of the search area data and distributes the data loading time. It is helpful for scheduling external video data memory access of the entire video codec system, and above all, uses less memory than storing all search area data.

Intra / Inter determination of the video codec also calculates the average pixel value of the reference block, calculates the sum of the difference between each pixel of the reference block and the average pixel value, and then compares the minimum SAD values obtained from the candidate blocks selected from the motion vectors. This part determines whether the reference block is Intra or Inter. Independently configuring the hardware requires a reference block to be loaded from the video memory, reading each pixel value to calculate its average value, and calculating an absolute value of the difference between the average value and each pixel value.

In the present invention, when this part is placed independently of the motion predictor, the memory according to the load of overlapping reference blocks in the overall design of the video codec, various adders for calculation, an address generator for reading pixel data from the memory, and a control part The hardware that composes the system is reduced, the memory bandwidth of the entire system is lowered by not overlapping the reference block data in the video memory, and the added control part is also simplified.

1 is an overall structural diagram of a motion prediction apparatus according to the present invention.

2 is a diagram illustrating a structure of reference blocks and search area data and slice structure of search area data according to the present invention;

3 is a structure diagram of a search region local memory for storing search region data of the present invention.

4 is a timing diagram for explaining the data flow during operation of the motion predictor of the present invention.

<Description of the code | symbol about the principal part of drawing>

100: local memory 101: reference block data memory

102: search area data memory 110: motion prediction unit

111: Operator Array 112: Subtotal Store and Comparator

113: vector generation and intra / inter determination unit

120: intra / inter decision information provider

121: average pixel value calculator 122: sum of pixel value differences calculator

130: control unit 131: state counter and state control unit

132: DMA and IF unit 133: write address control unit

134: read address control unit 135: operator array control unit

136: vector generation control

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall block diagram of a motion predictor designed in the present invention.

Local memory 100 for receiving and storing data from a video memory (not shown) to load 16 x 16 one macroblocks for current data into a reference block and to load them as search area data of (search area size x 16). And receiving the reference block data, which is the current data, from the local memory 100 to obtain an average pixel value of the reference block, and again obtaining a sum of the difference between each pixel of the reference block and the average pixel value. The inter / intra decision information providing unit 120, which is provided as a unit, receives the sub-units of the absolute value sums of the difference between the reference block and the search area block, stores them, accumulates the sub-sums, generates SAD values, and compares them. After finding a candidate block with a small SAD value, select the minimum SAD value by comparing with the current SAD value, and then move the block having the selected SAD value. By generating a data value and comparing the SAD value of the reference block according to the current data provided by the inter / intra decision information providing unit with the SAD value of the candidate block selected from the motion vector, it is determined whether the reference block is Intra or Inter. A motion vector predictor 110 for determining;

The controller 130 is configured to control an address for input / output of the local memory, a control signal for subtotal operation of the motion prediction unit, a control signal for generating the vector, and the like under the control of the state counter and the state controller. .

The local memory 100 includes a reference block data memory 101 which receives one macro block data of 16 × 16 as reference block data (current data) and 16 of the search area (search area size x 16). And a search data memory 102 for receiving and storing search area slice data composed of two rows and outputting odd row data and even row data.

The motion predictor 110 receives a reference block, odd rows and even rows of every search region slice from the local memory 100, and performs a reference operation between the reference block and the candidate blocks for motion vector extraction by repeating parallel operations. The operator array 111 for calculating the partial sum of absolute difference (PSAD) and the cumulative sum of the partial sums output from the operator array 111 are obtained, and the last row of the reference block and the last of one slice data are obtained. When the operation value for the row is input, the subtotal storage and comparator 112 for comparing the final SAD values of the search candidate blocks included in one search region slice and outputting the vector and the corresponding SAD value of the candidate block having the smallest SAD value; The SAD value of the candidate block outputted from the subtotal storage and comparator 112 and the current minimum SAD value are compared to obtain the smallest SAD value and solution in the entire search area. Generating a vector value of the block and comparing the SAD value of the reference block provided by the intra / inter determination information providing unit 120 with the minimum SAD value to determine whether the reference block is Intra or Inter; It consists of the intra / inter determination part 113.

The intra / inter determination information providing unit 120 receives the reference block data which is current data from the local memory 100, and obtains an average pixel value calculator 121 for obtaining an average pixel value of the reference block, and each of the reference blocks. And a partial sum calculating unit 122 for calculating the sum of the difference between the pixel and the average pixel value, and is provided as information for inter / intra determination.

The controller 130 includes a state counter and a state controller 131 for counting a clock for controlling input / output and operation timing of reference block data and search area data, a DMA and IF controller 132, and the state. The write address generator 133 for generating the write address of the local memory 100, the read address generator 134 for generating the read address, and the operator array 111 based on the output of the counter and the state controller 131. The operator array control unit 135 to control, and the vector generation controller 136 to control the vector generation and intra / inter determination unit 113.

2 illustrates the shapes of the reference block and the search region data.

The reference block data of FIG. 2 is current input data, and all of them are stored in the reference block data memory 101 of FIG. In FIG. 2, a portion consisting of 16 rows of the search region is referred to as a search region slice 221. One search region slice is stored in the search region data memory 102 of FIG. 1.

In the motion prediction unit 110 of the present invention, a motion vector extraction operation is performed by repeating parallel operation of a reference block and one search region slice. The initialized data is input to the operator array 111 for extraction of the motion vector.

Search area data is input to the operator array 111 of the present invention simultaneously with odd and even rows of every search area slice. In the operator array 111, an absolute sum (Partial Sum of Absolute Difference (PSAD)) of the partial difference between the reference block and the candidate blocks is transmitted to the partial sum storage and comparator 112 by the input data. When the last row of the reference block and the last row of one slice data are input, the subtotal storage and comparator 112 compares the final SAD values of the search candidate blocks included in one search region slice to obtain a vector of the candidate block having the minimum SAD value. And the corresponding SAD value to the vector generator and the Intra / Inter determiner 113.

This operation is repeated until the last search area slice is processed, the last search area slice data is input, and the subtotal and comparator 112 determines the smallest SAD value and the corresponding vector value of the last slice in the vector generator and Intra / Inter. It is transmitted to the unit 113. The passed value is compared with the minimum SAD value so far to determine the smallest SAD value and corresponding vector in the entire search area. The new slice data must be prepared before all the slice data under calculation are input to the operator array 111 so that the repeated reference block and the search region slice can be operated.

FIG. 3 illustrates a search region memory for storing one search region slice as the search region data memory of FIG. 1. As shown in FIG. 3, the search area data is composed of 16 banks, and the physical start address of each bank is determined by the maximum number of pixels of one row of the search area, and the data width thereof is 16 bits so that two pixel data are stored. 0, 24, 47, ..., 360. One bank stores data constituting one row of search area data.

In FIG. 3, the range of the search area is 48 data included in one row of the search area, and 32 if the search area is the edge of the previous frame. In this case, 32 pixel data are stored in one bank and the rest The latter part has no data. As a result, the search region data initially loaded becomes one search region slice for the motion prediction operation.

4 illustrates the operation process described above as a flow of data. In FIG. 4, the operation corresponding to the first search region slice 221 starts with an already initialized state. That is, 16 rows of R0 to R15 of the reference block are stored, and the search area data is loaded from S0 to S15 constituting the first slice of the search area data, so that each bank 0 to bank 15 is loaded. It is stored line by line.

Search area as shown when the first row (R0) of the reference block data and the first row (S0) data of the slice data, that is, Bank0 data, are respectively input to the operator array 111 and the second row of the reference block is input. The second row S1 of the slice is input. In this case, the two search area data are input to the operator array 111 through odd and even row data paths, respectively. The first odd row of the slice is the data in Bank0, and the first even row is the data in Bank1. After all Bank0 data has been entered, Bank2 data is continuously entered through the same path. From this point on, the data stored in Bank0 is no longer used. In the present invention, S16, which is the last row of the next slice 222 from this point, is loaded into Bank0 until the operation for the first search region slice is completed.

In FIG. 4, after the operation for the first search region slice is finished, the second search region slice 222 is composed of Bank1 to Bank15 and Bank0 data, and Bank1, Bank3, ... data are input through an odd row path, Bank2, Bank4, ... data is entered into the operator array via an even row path.

This repeated operation is repeated by the number of slices constituting the search area data. As described above, the motion predictor of the present invention enables continuous operation through data loading during operation, thereby maximizing the efficiency of the operator and reducing the memory for storing the search area data.

In order to extract a motion vector from a reference block by the motion predictor 110, the reference block is repeatedly read in the local memory 100 by the number of search region slices. In the present invention, by repeatedly reading the reference block, the Intra / Inter decision information providing unit 120 is placed in the motion predictor to perform a corresponding operation.

When the first reference block data is read in FIG. 1, the reference block data is also input to the intra / inter decision information providing unit 120 to calculate the average pixel value calculation unit 121 of the reference block. The calculation is performed through the absolute sum calculator 122 of the difference between the pixel value and the average pixel value. Then, when the final motion prediction operation is completed and the SAD values of the motion vector and the corresponding vector are determined, the vector generation and the Intra / Inter determiner 113 are input to determine whether the reference block is Intra / Inter.

On the other hand, in the control of the above operation, the write / read address generators 133 and 134 generate the write read address of the reference memory 100 by the state counter of the controller 130 and the state controller 131, The operator array controller 135 controls the address of the operator array 111, and the vector generation controller 136 controls the vector generation timing of the vector generation and the intra / inter determination unit 113.

As described in detail above, in the present invention, in loading the search area data required for the motion prediction operation of the motion predictor, the entire video codec is made possible by reducing the size of the local memory by using 2 ports. Reduced the size of the number of gates.

In the present invention, the Intra / Inter decision part is placed inside the motion estimator, thereby simplifying the overall control of the video codec by eliminating the need for an address generation part and a control part for reading the redundant memory and separate data from the memory. Reduced the size of the codec.

The present invention implements a motion predictor suitable for a low bit rate video codec using the top two methods.

Claims (6)

A reference block corresponding to one macro block from the video memory, and a local memory for receiving and storing data of the search area block; An inter / intra decision information providing unit for receiving an average pixel value by receiving reference block data of the local memory and obtaining a sum of a difference between each pixel and the average pixel value; After inputting the reference block and the search area block by row unit, obtain a subtotal sum of the absolute difference of the difference, accumulate SAD values, compare and find the candidate block having the smallest SAD value for each search area slice, and then The minimum SAD value is selected to be compared with the minimum SAD value to generate a vector value, and the SAD value of the reference block provided by the inter / intra decision information providing unit is compared with the minimum SAD value to determine whether the corresponding reference block is intra or A motion vector predictor for determining whether an inter-interface; And a controller configured to control an address for input / output of the local memory, an address for subtotal operation of the motion predictor, and an address for generating the vector under the control of a state counter and a state controller. Motion prediction device for the. The method of claim 1, wherein the local memory, A reference block data memory configured to receive one macro block data of 16 × 16 as reference block data; (Search area size x 16) Motion prediction for a video codec, comprising: a search data memory for receiving and storing search area slice data consisting of 16 rows of a search area and outputting odd row data and even row data Device. The method of claim 1, wherein the motion prediction unit, An operator array that receives the reference block and odd and even rows of every search region slice from the local memory and calculates an absolute sum of partial differences between the reference block and candidate blocks for motion vector extraction through repetition of parallel operations; When the partial sum output from the operator array is stored and operation values for the last row of the reference block and the last row of one slice data are input, the minimum SAD is compared by comparing the final SAD values of the candidate candidate blocks included in one search range slice. A partial sum storage and comparator for outputting a vector of a candidate block having a value and a corresponding SAD value; The SAD value of the candidate block output from the subtotal storage and comparator and the current minimum SAD value are compared to generate the smallest SAD value and the vector value of the corresponding block in the entire search area, and are provided by the intra / inter decision information providing unit. And a vector generator and an intra / inter determiner for determining whether the reference block is intra or inter by comparing the SAD value of the reference block with the minimum SAD value. The apparatus of claim 1, wherein the intra / inter decision information providing unit comprises: An average pixel value calculator which receives the reference block data which is current data from the local memory and obtains an average pixel value of the reference block; And a partial sum calculator configured to obtain a sum of a difference between each pixel of the reference block and an average pixel value, and to provide information for inter / intra determination. The method of claim 1, wherein the reference memory, The search area data storage memory of the reference memory is implemented to be simultaneously read and written using two port RAM, and is loaded in odd / even rows by the motion predictor to perform the next one row of the search area during operation. A motion predictor for a video codec, characterized in that for configuring a search region slice to be used for the next operation. Obtain subtotals for the absolute sum of the difference between the row-by-row data of the reference block and the search area block, accumulate the subtotals to generate SAD values, compare the candidate blocks with the smallest SAD values, and compare them with the current SAD values. In the motion predictor for generating a motion vector value by selecting the minimum SAD value, The average pixel value of the reference block data is obtained, the sum of the difference between each pixel and the average pixel value is obtained, and a part for making inter / intra determination of the reference block is based on the comparison with the minimum SAD value. A motion predictor for a video codec, wherein block data is simultaneously used for motion prediction and computation for intra / inter determination.