KR100278209B1 - Multiphase Low Frequency Downconversion Device and Method for Implementation of CMOS Wireless Communication Transceiver - Google Patents

Abstract

The present invention relates to a wireless communication apparatus and method, and more particularly, to a frequency conversion apparatus and method for implementing an RF transceiver in which an RF transmission block and a baseband signal processing block are integrated into a single chip using CMOS technology.

The frequency converter according to the present invention eliminates the off-chip virtual image suppression filter by mixing a multiphase low frequency local oscillation signal having an oscillation frequency with a low frequency obtained by dividing the frequency of the received RF signal by N oscillation with the RF signal. It provides a simple architecture that uses a PLL.

In addition, the frequency converter according to the present invention can improve the phase noise characteristics by using a low frequency PLL, and can eliminate the DC offset due to LO leakage or mixing.

Description

Multiphase Low Frequency Down Conversion Apparatus and Method for Implementation of CMOS Wireless Communication Transceiver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless communication apparatus and method, and more particularly, to an RF transceiver implementation in which a radio frequency (RF) transmission / reception block and a baseband signal processing block are integrated into a single chip using CMOS technology. The present invention relates to a frequency conversion device and a method for the same.

With the rapid development of personal portable wireless communication, there is a demand for miniaturization and light weight of a transmission / reception terminal for wireless communication. In other words, the wireless communication transceiver terminal is composed of a front-end RF block and a base-band digital signal processing (DSP) block, which lowers the manufacturing cost of the transceiver terminal and achieves small size and light weight. This requires one chip integration of the entire system.

In order to reduce the size and power of the wireless communication transceiver, the research and development for the CMOS for the front end RF block as well as the DS signal processing block of the baseband is in progress.

However, CMOS circuits have a lower operating frequency range and poor phase noise characteristics compared to bipolar or gallium arsenide technology. There are many technical difficulties to do this.

That is, the CMOS technology has difficulty in satisfying device operation speed of a personal mobile communication system requiring a frequency characteristic of 1.8 to 2.0 GHz. When the CMOS technology is used to integrate a voltage controlled oscillator (CCO), Since the phase noise characteristic of the MOS transistor is not good, a reference spur causing interference between channels cannot be avoided.

In addition, when the transmission and reception terminal for wireless communication uses a superheterodyne method according to the prior art, an additional off chip such as an image rejection filter or an intermediate frequency filter. Filters are needed and matching designs for them are required.

The prior art superheterodyne transmit / receive frequency converter requires an IR filter and an IF channel select filter for image rejection on the output of a low-noise amplifier (LNA). In order to secure channel selectivity and stable operation, it is necessary to manufacture a filter having a high Q value. However, in CMOS technology, it is difficult to fabricate a low noise channel select phase locked loop (PLL) having a high Q value, so that the front end RF block is actually superheated according to the prior art superheterodyne method. Not suitable for (CMOS).

To address this technical problem, Ahmadreza Rofougaran et al., Published in the Journal of Solid-State Circuits, April 1998, pp. 515-534, A single-chip 900 MHz spread-spectrum wireless transceiver in 1 μm CMOS—Part I: Architecture and Transmitter Design ”discloses the direct conversion architecture described in FIG.

Referring to FIG. 1, the output RF signal of the RF filter 11 passes through a low noise amplifier (LNA) 12 to quadrature multiply the output signal of the phase locked loop PLL 13. It is demodulated into baseband signals through quadrature multiplication. The demodulated signal 14 then passes through a low band filter 15 and is input to an A / D converter.

The above-described direct conversion method, such as Amadeza Lofogaran, employs a method in which channel selection changes the frequency by the channel selection PLL 13, and unlike the conventional superheterodyne method, the RF signal is different. Since it does not convert to an intermediate frequency (IF) band, additional IR filters are not required, and CMOS integration may be considered possible.

However, the direct conversion scheme disclosed by Amadeza Lofogaran et al. In the IEEE Journal of Solid-State Electronics Circuits has caused the time varying dc offset to occur since the output frequency of the PLL oscillator is equal to the input frequency of the RF receiver. do. Moreover, the direct conversion technology disclosed by Amadere Pororogaran et al. Requires a PLL with low-noise, high-sensitivity channel selectivity that delivers a frequency of 1.9 GHz for PCS personal mobile communication systems, so that CMOS technology is commonly used. (quadrature phase shift keying) makes one-chip integration impossible.

Meanwhile, Jacques C. Rudell et al., An academic paper published in IEEE Solid-State Electronics Journal Journal December 1997, pages 2,071 to 2,087, “A 1.9 GHz wide band IF double conversion CMOS receiver for cordless telephone. application ”provides double conversion architecture technology.

2 is a diagram illustrating a double transform architecture provided by Jacques C. Rurell et al. Referring to FIG. 2, the double conversion architecture uses a PLL 20 and a quadrature mixer 21 to output a single fixed frequency to move the RF signal to the IF frequency. In addition, the low band filter 22 is used to remove the upconverted frequency components and send all channels to the second stage. Subsequently, the variable frequency PLL 23 of the second stage performs channel selection and is converted into a baseband signal.

The double conversion architecture provided by Zachus C. Rhurell et al. Does not require a high frequency PLL to select an RF channel and enables image rejection without a passive IR filter. It may seem possible.

However, the prior art provided by Jacques C. Rurell et al. Requires a fixed PLL 20 at a single frequency and two low-frequency PLLs 23 for channel selection. When two PLLs are integrated on a single chip, Good characteristics cannot be expected due to interference. In addition, it is not technically easy to obtain a signal with exactly 90 ° phase difference in order to quadrature mixing the output of the PLL 20.

Moreover, the double conversion architecture provided by Jacques C. Rurell et al. Still suffers from the DC offset problem of the direct conversion method described by Amadeza Lofogaran et al.

Accordingly, a first object of the present invention is to provide an apparatus and method for transmitting / receiving frequency for wireless communication capable of integrating an RF front end block and a baseband signal processing block with one chip technology.

A second object of the present invention is to provide an apparatus and method for transmitting / receiving frequency for wireless communication which, in addition to the first object, does not further use an off-chip passive image rejection filter.

A third object of the present invention is to provide an apparatus and method for transmitting / receiving frequency for wireless communication that does not use a high frequency PLL for channel selection in addition to the first object.

A fourth object of the present invention is an apparatus and method for transmitting / receiving frequency for wireless communication without a DC offset caused by local oscillator leakage and self-mixing in addition to the first object. To provide.

1 shows a direct conversion architecture according to the prior art.

2 shows a double transform architecture according to the prior art.

3 shows a multiphase low frequency mixing device according to a first embodiment of the present invention.

4 shows a six-phase low frequency mixing device according to a first embodiment of the present invention.

5 shows a multiphase low frequency mixing device according to a second embodiment of the present invention.

6 shows a six-phase low frequency mixing device according to a second embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

50: antenna

51, 71, 81: RF filter

52, 72, 82: low noise amplifier

54, 55: 2-Input Frequency Mixer Array

72, 73, 82, 83: multiphase frequency mixer

74, 84: multiphase voltage controlled oscillator

In order to achieve the above object, the present invention provides a frequency conversion device for demodulating an RF signal having a first frequency (f ₁ ) as an RF frequency to a baseband, comprising: means for receiving the RF signal; Generation of a multiphase low frequency signal in which the second frequency f ₂ , which is lower than the first frequency f ₁ , is an oscillation frequency and generates a plurality of N local oscillation signals each having a predetermined phase difference Δ. Way; Frequency mixing means for combining the RF signal and the plurality of multiphase low frequency local oscillation signals; And a means for low band filtering the output of said frequency mixing means.

Hereinafter, with reference to FIGS. 3 to 6 attached to a preferred embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail.

3 is a diagram showing the configuration of the frequency converter according to the first embodiment of the present invention. Referring to FIG. 3, the frequency converter according to the first embodiment of the present invention generates an RF filter 51, a low noise amplifier 52, and a local oscillation signal LO for receiving an RF signal. PLL 53, 2-input mixer array blocks 54, 55, low-band filters 56, 57 and baseband digital provided for down-converting RF signals to baseband. A / D converters 58 and 59 for signal processing.

In a preferred embodiment according to the present invention, the apparatus 53 for generating a local oscillation signal described above uses a CMOS technology to maintain its oscillation frequency f ₂ below the RF frequency f ₁ . When integrated into a chip, CMOS transistors can solve the limitations of operating speed and phase noise.

As a preferred embodiment of the apparatus for generating a local oscillation signal, a PLL according to the prior art can be used, and the apparatus for generating a local oscillation signal according to the first embodiment of the present invention is a multi-phase low frequency LO. Will occur).

The frequency of the received RF signal is f ₁ , the frequency of the multiphase low frequency local oscillation signal according to the first embodiment of the present invention is f ₂ , and the N signals generated from the local oscillation signal generator 53 are different from each other. If the phase difference to be referred to as Δ, there is a relationship of f ₂ = 2 × f ₁ × Δ / π between them. That is, the above-described multi-phase low-frequency local oscillation signal device 53 is both (N-phase ± LO _cos (k, t) and N-phase ± LO _sin (k, t), etc. (2) x N) generates a multiphase low frequency local oscillation signal having different phases.

Where ω ₁ = 2πf ₁ and k = 0, 1, 2, ..., N / 2-1. In addition, the mutual phase difference of the multiphase low frequency local oscillation signals becomes Δ = 2π / N.

Subsequently, the plurality of multiphase low frequency local oscillation signals output from the multiphase low frequency signal generating means 53 are down-frequency converted through the above-described RF received signal and the frequency mixing means 54 and 56. As a preferred embodiment according to the present invention, the frequency mixing means can perform down frequency conversion by configuring N two-input frequency mixers in the form of a cascade array.

The frequency mixer array according to the first embodiment of the present invention includes a first mixer array block 54 for frequency mixing a cosine output of the multiphase low frequency local oscillator 53, as shown in FIG. ) And a second mixer array block 55 for frequency mixing the sine output.

The first mixer array block performs a function of multiplying the received RF signals by N multiphase low frequency local oscillation signals having an oscillation frequency of 2f ₁ / N and each phase difference of (2π / N), where N polyphases N / 2 of the low frequency local oscillating signals are inverted signals, and the remaining N / 2 are noninverted signals. In this manner, by mixing the low frequency local signal having the oscillation frequency f ₂ with the N signal in N times, the same effect as the result of directly mixing the high frequency local oscillation signal f ₁ with the RF signal in the conventional superheterodyne method is obtained. You can get it.

However, unlike the conventional direct frequency converting apparatus, the frequency mixing apparatus according to the first embodiment of the present invention performs frequency mixing at a low frequency f _{2 a} plurality of times, so that the switching characteristics and the noise characteristics of the transistor for the circuit implementation have a frequency. Even if it is not good in the band f ₁ , if the device characteristics are good in the low frequency band f ₂ , frequency conversion can be easily implemented without an IR filter or an additional PLL.

In addition, the second mixer array block shown in FIG. 3 multiplies the received RF signals by the N multiphase low frequency local oscillation signals described above, thereby obtaining a sine function of the frequency f ₁ of the conventional superheterodyne reception method. It is effective to multiply. Here, the inverted and non-inverted signals are required because the 2-input mixer is implemented in the form of a differential amplifier, and therefore, both inverted and non-inverted signals are required. to be.

4 is a diagram illustrating a frequency mixing apparatus according to a first embodiment of the present invention, and illustrates a configuration of performing 6-phase low frequency mixing by generating a low frequency frequency obtained by dividing an RF reception frequency by three divisions.

Referring to FIG. 4, PLL (63) for generating a six-phase low-frequency local oscillation signal is the oscillation frequency f ₂ = f _1/3 of which generates a low-frequency signal, each of the phase difference π / 6 of the six non- An inverted signal and six additional inverted signals are generated, all of which input 12 six-phase low frequency local oscillation signals to the next stage of frequency mixer arrays 64 and 65.

The frequency mixer array consists of an upper first block 64 and a lower second block 65. The first block performs an operation of multiplying the RF signal by cos (ω ₁ t) and the second block is sin ( performs a multiplication by ω ₁ t).

The frequency mixer array is cascaded with two two-input frequency mixers 66 and 67 in the first stage and one two-input frequency mixer 68 in the second stage.

The RF mixer and the PLL output signal are input to the frequency mixer of the first stage, and the frequency mixer output of the first stage is input to the frequency mixer 68 of the second stage in a cascade manner.

5 is a diagram illustrating a frequency converter according to a second embodiment of the present invention, wherein an RF filter 70, a low noise amplifier 71, a polyphase frequency mixer 72, 73, a local oscillation PLL 74, 75, Low frequency band filters 74 and 75, and A / D converters 76 and 77.

Referring to FIG. 5, a multi-phase mixer 72, 73 is provided in place of the two-input frequency mixer array according to the first embodiment of the present invention. Together with a multi-phase voltage controlled oscillator 74 generates an N-phase clock with a clock frequency of 2 × f ₁ / N [MHz].

Since the multiphase frequency mixers 72 and 73 and the polyphase voltage controlled oscillator 74 according to the second embodiment of the present invention use a low frequency which lowers the clock frequency from f ₁ , which is an RF frequency, to 2 × f ₁ / N, PMOS design is easy using CMOS technology.

The multiphase frequency mixers 72 and 73 according to the second embodiment of the present invention mix the N-phase, low frequency LO clock of 2 x f ₁ / N frequency with the RF signal f ₁ . In the case of the direct conversion method according to the prior art, the same effect as that of mixing the high frequency LO clock of the frequency f ₁ with the RF signal f ₁ is generated.

6 is a diagram illustrating a six-phase low frequency mixers 82 and 83 and a six-phase voltage controlled oscillator 84 as an example of the frequency conversion scheme according to the second embodiment of the present invention.

Referring to Figure 6, six-phase mixer 82 is six-phase mixer (83) shown below. 6 is a means for mixing the phase LO. In addition, the 6 degrees with a frequency of f _1/3 for RF signal is as for the function, which is multiplied by the sine (sine) functions in a conventional superheterodyne scheme, a mixture of 6-phase LO having a lower frequency of f _1/3.

The foregoing has outlined rather broadly the features and technical advantages of the present invention to better understand the claims of the invention which will be described later. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.

In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously changed, substituted, and changed without departing from the spirit or scope of the invention described in the claims.

As described above, the frequency converter according to the present invention is an architecture that solves the problem of the conventional frequency converter, and the present invention provides a multiphase low frequency local part having a low frequency obtained by dividing the frequency of the received RF signal by the oscillation frequency. By mixing the oscillation signal with the RF signal and multiphase frequency, the off-chip virtual image suppression filter, which has been a obstacle in the prior art in integrating the RF front end block and the baseband signal processing block into a single chip using CMOS technology, It provides a simple frequency conversion architecture using a single PLL.

In addition, the frequency conversion device according to the present invention, since the frequency of the RF channel selection PLL is several hundred MHz by dividing the NF reception frequency by N, the CMOS technology can be easily implemented in the circuit, it is possible to reduce the phase noise effect. In addition, since the frequency of the received RF signal and the local oscillation frequency applied to the input of the frequency mixer are different from each other, no DC leakage due to LO leakage or self-mixing occurs.

Claims (19)

A frequency conversion device for demodulating an RF signal having a first frequency f ₁ as an RF frequency with a base band, Means for receiving the RF signal; Generation of a multiphase low frequency signal in which the second frequency f ₂ , which is lower than the first frequency f ₁ , is an oscillation frequency and generates a plurality of N local oscillation signals each having a predetermined phase difference Δ. Way; Frequency mixing means for combining the RF signal and the plurality of multiphase low frequency local oscillation signals; Means for low band filtering the output of said frequency mixing means Communication frequency conversion apparatus comprising a. 2. The apparatus of claim 1, wherein the means for receiving the RF signal comprises an RF band filter and a low noise amplifier. The multiphase low frequency signal generating means comprises: a second frequency f _{2 at} which the multiphase low frequency signal generating means is generated, a first frequency f ₁ of the received RF signal, and And a relationship f ₂ = (2 × f ₁ x Δ) / π between the phase differences Δ of the plurality of local oscillation signals generated. The method of claim 1, wherein the multiphase low frequency signal generating means generates half of the inverted and uninverted signals among the plurality of low frequency generating signals, respectively, and the number of signals to be generated by the signal generating means (N). And N = π / Δ between the phase shifts Δ of the generated local oscillation signals. The method of claim 1, wherein the multiphase low frequency signal generating means outputs a plurality of cosine signals and a plurality of sine signals in an inverted form and an inverted form, respectively, using the second frequency f ₂ as an oscillation frequency. A frequency conversion device for communication, characterized in that. The communication frequency converter of claim 1, wherein the communication frequency converter further comprises a baseband signal processing means. 7. The communication frequency converter of claim 6, wherein the communication frequency converter is integrated into a single chip. 2. The apparatus of claim 1, wherein said frequency mixing means comprises a two-input frequency mixer array. 9. The apparatus of claim 8, wherein the two-input frequency mixer array comprises: a first block for mixing the RF signal and the cosine signal output by the polyphase low frequency signal generating means, and the RF signal and the multiphase low frequency signal generation; And a second block for mixing the sign signal outputted by the means. 9. The apparatus of claim 8, wherein the two-input frequency mixer array comprises the same number of two-input frequency mixers as the number N of signals generated by the multiphase low frequency signal generating means, {(N / 2) -1}. In the cascade arrangement of stages, the number of 2-input frequency mixers is provided at each stage from the input stage to the output stage, and the RF signals and the signals output by the multiphase low frequency generating means are respectively input to the input of the first stage. And connecting the outputs of the two-input frequency mixers of the first stage to the inputs of the two-input frequency mixers of the second stage, respectively, and then repeatedly applying the connection scheme to the two-input frequency mixers of the subsequent stages. Frequency converter for communication. The signal generator according to claim 1, wherein the multiphase low frequency signal generating means generates half of each of the plurality of low frequency generating signals and an inverted signal, and the number of signals to be generated by the signal generating means (N). And a PLL having a relationship of N = π / Δ between the generated plurality of local oscillation signals. A frequency conversion method for demodulating an RF signal having a first frequency f ₁ as an RF frequency to a base band, Receiving the RF signal; By generating the second frequency f ₂ , which is lower than the first frequency f ₁ of the RF signal, as the oscillation frequency, a plurality of N multiphase low frequency local oscillation signals each having a predetermined phase difference Δ are generated. Doing; Demodulating the RF signal into a baseband by frequency mixing the plurality of multiphase low frequency local oscillating signals; Lowband filtering the demodulated signal into the baseband Frequency conversion method comprising a. 13. The frequency conversion method according to claim 12, wherein the second frequency (f ₂ ) of the multiphase low frequency local oscillating signal includes a low frequency band having excellent noise characteristics and good switching operation characteristics. The method of claim 12, wherein receiving the RF signal comprises: Filtering the RF signal through an RF band pass filter; Amplifying the output of the RF band pass filter using a low noise amplifier. The method of claim 12, wherein the generating of the multiphase low frequency local oscillation signal comprises: f ₂ = (2 × f) between the oscillation frequency f ₂ and the RF frequency f ₁ and the phase difference Δ. A frequency conversion method characterized by having a relationship of ₁ × Δ) / π. 13. The method of claim 12, wherein generating the multiphase low frequency local oscillation signal comprises generating a multiphase low frequency local signal using a PLL. 13. The method of claim 12, wherein generating the multiphase low frequency local oscillation signal comprises generating a multiphase low frequency local signal using a polyphase voltage controlled oscillator (VCO). 13. The method of claim 12, wherein demodulating the RF signal into a baseband comprises demodulating the RF signal into a baseband by quadraturely multiplying the plurality of multiphase low frequency local oscillation signals in a cascade manner. Way. 15. The method of claim 13, wherein demodulating the RF signal to baseband comprises demodulating to baseband using a polyphase frequency mixer.