KR100275545B1 - Bias circuit - Google Patents

Abstract

PURPOSE: A bias circuit is provided to be capable of adjusting a common voltage of a differential circuit simply. CONSTITUTION: A bias circuit comprises a current source(I1), a resistor(R31), and two transistors(M35, M36). A source of the transistor(M36) is connected to a power voltage(Vdd) via the current source(I1), and a gate is connected to a common voltage(VB3). A drain of the transistor(M36) is connected to one end of the resistor(R31), the other end of which is connected to a drain of the transistor(M35). The transistor(M35) has a source connected to a ground voltage and a gate connected to the drain of the transistor and to gates of transistors(M33, M34), which form a current mirror of a differential circuit.

Description

Bias circuit

The present invention relates to a bias circuit of an integrated circuit.

The conventional bias circuit has a complicated problem of adjusting the common bias voltage by using one amplifier and two resistors.

1 is a schematic diagram of a conventional bias circuit for a first differential circuit, in which two current sources I _1, 2I _1, and transistors M _11, M ₁₆ , and M ₁₃ and M ₁₅ are matched with each other, and a bias voltage V _B1 is a differential circuit. The conditions of both circuits are the same, such as the common bias voltage of the two inputs, V _ip1 and V _in1 , so if the gates of transistors M ₁₅ , M ₁₃ , and M ₁₄ are connected to each other, the common voltage at the amplifier output is transistor M _15. Is equal to the drain voltage of V ₁₁ .

However, since the size of V ₁₁ is usually about 1.2V and is determined in a state slightly higher than the threshold voltage of the MOS device, it is difficult to adjust the voltage to more or less than that.

Therefore, in the above case, a rather complicated circuit including an amplifier as shown in FIG. 2 is used.

FIG. 2 is a schematic diagram of a conventional bias circuit for a second differential circuit. A circuit for adjusting a common voltage includes one amplifier A1 and two resistors R ₂₁ and R _22, and two resistors are connected to each output. The dot is equal to the common voltage of the output.

Since this voltage is connected to the + terminal of the amplifier and there is no load effect, its center point is equal to the output common voltage.

The voltage is input to the + terminal of the amplifier and the-input is connected to the voltage V _B2 representing the desired bias voltage, and its output is connected to the gates of the transistors M ₂₃ , M ₂₄ .

Since the structure has a negative feedback, when the output voltage is higher than the voltage V _B2 , the output of the amplifier is also increased to increase the current of the transistors M ₂₃ and M ₂₄ , thereby lowering the output voltage, thereby stabilizing the output voltage to the voltage V _B2 .

However, this circuit has the disadvantage of increasing power loss and area due to the addition of an amplifier.

In order to solve the above disadvantages, an object of the present invention is to construct a circuit that can easily adjust the common voltage of a differential circuit having a conventionally complicated configuration using one amplifier and two resistors.

1 is a structure diagram of a conventional bias circuit for a first differential circuit;

2 is a structure diagram of a conventional bias circuit for a second differential circuit;

3 is a diagram illustrating a first embodiment of a bias circuit for a differential circuit to which the present invention is applied;

4 is a diagram illustrating a second embodiment of a bias circuit for a differential circuit according to the present invention;

Figure 5 is a characteristic and load curve characteristics of the transistor for explaining the bias circuit for the differential circuit according to the present invention.

<Description of the symbols for the main parts of the drawings>

I _1, 2I _1, 2I ₁ , I ₂ : Current source V _B1, V _B2, V _B3 , V _B4 : Bias voltage

V _ip1 , V _ip2 , V _ip3 , V _b4 , V _in1, V _in2 , V _in3 , V _in4 : Input voltage of differential circuit

_On1 V, V _on2, V _{on3, on4} V, V _{op1, op2} V, V _{op3, op4} V: output voltage of the differential circuit

M ₁₁ , M ₁₂ , M ₁₃ , M ₁₄ , M ₁₅ , M _16, M ₂₁ , M ₂₂ , M ₂₃ , M ₂₄ , M ₃₁ , M ₃₂ , M ₃₃ , M ₃₄ , M ₄₁ , M ₄₂ , M ₄₃ , M ₄₄ , M ₄₅ , M ₄₆ : Transistor

R ₂₁ , R ₂₂ , R ₃₁ , R ₄₁ : resistance

V ₁₁ , V ₂₁ , V ₂₂ , V ₃₁ , V ₃₂ , V ₄₁ , V ₄₂ , V _g1 , V _g2 , V _g3 : Node voltage

In order to achieve the above object, the present invention is to increase the gain by operating the transistor (M ₃₁ , M ₃₂ ) and the transistor (M ₃₁ , M ₃₂ ) constituting the input differential amplifier by receiving a bias current from the current source to increase the gain. For a differential circuit for transistors M ₃₃ and M ₃₄ , a current source matched to the differential circuit

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is a diagram illustrating a first embodiment of a bias circuit for a differential circuit to which the present invention is applied, in which transistors M ₃₁ , M ₃₆ , M ₃₃ , and M ₃₅ matched with two current sources I ₁ and 2I ₁ , respectively, and a differential input V; _in3, the above which consists to the common voltage of the V _B3 that is a common voltage V _ip3, the output transistor equal to the M ₃₅ drain voltage V ₃₁ in such that the transistor M ₃₅ and M _33, M ₃₄ are connected to each other 1 By adding a resistor R ₃₁ between the gates M ₁₆ and M ₁₅ of the circuit, the output common voltage can be lowered below the normal gate voltage of about 1.2V.

In the above principle, a resistor is inserted between the gate and the drain of M ₃₅ , which causes the drain voltage to stay as low as l ₁ * R ₃₁ below the gate voltage.

This will be described with reference to FIG. 5 in comparison with FIG. 1 as follows.

5 is a characteristic and load curve characteristic diagram of a transistor for explaining a bias circuit for a differential circuit according to the present invention, and simply shows an operating state according to a characteristic curve and a load of a transistor.

Suppose that the operating point of the circuit of FIG. 1 is aligned at point B, that is, when a current of l ₁ flows, the gate voltage is V _g2 and the drain voltage is V _ds2 .

In this case, as shown in FIG. 3, when the resistor is inserted between the drain and the gate, the current flows as it is, but the drain voltage decreases, so that the gate voltage increases to maintain the same current in the reduced state.

Therefore, the drain voltage of FIG. 3 is determined as V _ds1 lower than the gate.

The magnitude of the voltage can simply be determined as the magnitude of the current source and the magnitude of the resistance.

When the common voltage V _odc of the output is expressed by the equation, it is expressed by the following equation (1)

V _odc = V _DS1 = V _g3 -I ₁ ㆍ R ₃₁ … … … (Equation 1)

However, the structure has one drawback as shown in Equation (1), which is that it can only operate under the condition that the drain voltage is lower than the gate voltage.

Referring to FIG. 4 as a method for solving the above disadvantages, the resistor is connected between the gate and the drain, but supplies a current to the drain side, and connects another drain source between the gate and the ground (Gnd). There is a voltage difference between the gates.

If the resistance is 0, if the balance is achieved at the point B of FIG. 5, the drain voltage is higher than the gate voltage by the resistor and the current source, and since the current of I ₁ flows in the drain invariably, it is balanced at the C point.

4 is a diagram illustrating a second embodiment of a bias circuit for a differential circuit according to the present invention, in which transistors M ₄₆ are matched with M ₄₁ , M ₄₅ is matched with M _43, and the gates are the same voltage. The voltage stays above the gate voltage.

At this time, the common voltage V _odc of the output is expressed as in the following equation (2).

V _odc = V _DS3 = V _g1 -I ₁ ㆍ R ₄₁ … … … (Equation 2)

Therefore, the appropriate output common voltage can be determined by appropriately selecting the current source and the resistor size.

As described above, the present invention can determine the output bias voltage of the differential circuit by simply using the matching characteristics of the resistor and the transistor without using a complicated feedback circuit, and can minimize the circuit size because the feedback circuit is not used. This has the effect of increasing the stability of the circuit.

Claims (2)

A differential circuit comprising the transistors forming the input differential amplifier receives the supply of the bias current from the current source (M _{31, 32)} and a transistor transistor to increase the gain to operate in the active resistance _{(M 31, 32) (M} 33, 34) With respect to the differential circuit, a current source and transistors M ₃₅ and ₃₆ matched to the differential circuit and the gates of the transistors M ₃₅ and _{34 of} the active resistance transistors M ₃₃ and ₃₄ are connected to each other. In the bias circuit of the differential circuit such that the output common voltage matches the drain voltage of the transistor M ₃₅ , Connecting the drain and the gate of the transistor (M ₃₆₎ of the transistor (M _35), and So that the drain voltage of the transistor (M ₃₅₎ lower than the gate voltage by inserting a resistor (R ₃₁₎ element to the drain and gate of the transistor (M _35), And a low output common voltage of the differential circuit matching the output voltage of the drain of the transistor (M ₃₅ ). In the bias circuit for supplying current to the drain side while the resistance of the bias circuit having the same structure as the differential circuit is connected between the gate and the drain, A resistor R ₄₁ is inserted between the drain and the gate of the transistor M ₄₅ , The reference current is supplied toward the gate, and another current source I ₂ is inserted between the gate and the ground Gnd to generate a difference voltage between the drain and the gate. And forming the drain voltage higher than the gate voltage to increase the output common voltage of the differential circuit matched with the device.

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