KR100273681B1 - Method for forming capacitor of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a capacitor of a semiconductor device is provided to omit a storage node contact etching process by forming a bit line directly on a storage node contact. CONSTITUTION: A gate oxide layer and a gate electrode(1) are formed on a semiconductor substrate including a field oxide layer. An oxide layer is deposited on the gate electrode. The first oxide layer spacer(2) is formed on a sidewall of the gate electrode. The first storage node electrode(5) and the interlayer dielectric are deposited on the whole face of the substrate. The second oxide layer spacer(7) is formed on a stepped sidewall between the interlayer dielectric and the first storage node electrode(5). A bit line and a bit line oxide layer(9) are formed by burying a conductive material and an oxide layer into a contact hole. The third oxide layer spacer(10) is formed on a stepped sidewall between the bit line and the bit line oxide layer(9). A polysilicon layer for the second storage node electrode and an oxide layer(12) are deposited thereon. The second storage node electrode mask pattern is formed by a photoresist layer. The fourth oxide layer spacer(14) is formed by etching selectively the oxide layer(12). The fourth oxide layer spacer(14) is removed from the oxide layer(12) and a sidewall of the oxide layer(12).

Description

Capacitor Formation Method for Semiconductor Devices

1 is a plan view and a cross-sectional view showing a state in which a polysilicon film constituting a first storage node electrode is deposited and an interlayer oxide film is deposited after a gate oxide film, a gate electrode, an oxide film, and a first oxide spacer are formed by a general method;

2 is a plan view and a cross-sectional view showing a state in which a second oxide film spacer is formed on a sidewall of a polysilicon film forming a first storage node electrode;

3 is a plan view and a sectional view showing a state in which a bit line is formed and a mask oxide film and a third oxide film spacer are formed;

4 is a plan view and a cross-sectional view showing a state in which a polysilicon film and an oxide film forming a second storage node electrode are deposited, and a photosensitive film pattern used as an etching mask for forming a second storage node is formed;

5 is a cross-sectional view showing a state in which only the oxide film is etched using the photosensitive film and the fourth oxide film spacer is formed;

6 is a cross-sectional view illustrating a state in which a polysilicon film forming a second storage node electrode is etched using an oxide film and a fourth oxide film spacer as a mask;

FIG. 7 is a cross-sectional view showing a state in which an oxide film is removed by etching back through full etching. FIG.

<Explanation of symbols for main parts of drawing>

1: gate electrode 2, 7, 10, 14: oxide film spacer

3, 9, 12: oxide film 4: field oxide film

5, 11: storage node electrode 5A, 11A: polysilicon film

5B: storage node contact 6: interlayer oxide film

8: bit line 8A: bit line contact

13: photosensitive film

The present invention relates to a method for forming a capacitor of a semiconductor device.

In the manufacture of a conventional bit line shield (bit) type device, the bit line is formed to pass around the storage node contact so that the bit line pattern itself and the isolation pattern change from a straight line to various different shapes.

This occurs because the bit line is designed to pass around the storage node, which in turn reduces the process margin and results in a somewhat bad electrical characteristic.

Accordingly, the present invention for solving the above problems provides a method for forming a capacitor of a semiconductor device that can ensure the process margin and omit the storage node contact etching process by forming the bit line to pass directly over the storage node contact. There is a purpose.

According to an aspect of the present invention, there is provided a method including forming a gate oxide film and a gate electrode on a semiconductor substrate on which a field oxide film is formed, covering the gate electrode with an oxide film, and covering the gate electrode sidewall with a first oxide film spacer; Forming a first storage node electrode parallel to the gate electrode and making a storage node contact at a portion in contact with the semiconductor substrate; Forming a bit line contact at a portion in contact with the semiconductor substrate, a portion of which overlaps the first storage node contact and forms a bit line perpendicular to the gate electrode; And forming a second storage node electrode overlapping the first storage node electrode.

In addition, the present invention for achieving the above object, the first step of forming a gate oxide film and a gate electrode on the semiconductor substrate on which the field oxide film formation is complete, covering the gate electrode with an oxide film and covering the gate electrode sidewall with a first oxide film spacer ; A second step of forming a first polysilicon film and a first oxide film to form a first storage node electrode on the entire structure in which the first step is completed; Selectively etching the first oxide film and the first polysilicon film to form a first storage node electrode and a first oxide film pattern forming a storage node contact at a portion parallel to the gate electrode and in contact with the semiconductor substrate; Forming a second oxide spacer on sidewalls of the first storage node and the first oxide pattern; A fifth step of forming a conductive film and a second oxide film to form a bit line on the entire structure in which the fourth step is completed; Selectively etching the conductive layer and the second oxide layer to form a bit line contact at a portion perpendicular to the gate electrode and in contact with the semiconductor substrate, and a portion of the bit line and the second oxide layer overlapping the first storage node contact A sixth step of forming a pattern; A seventh step of forming a third oxide film spacer on sidewalls of the bit line and the second oxide film pattern; An eighth step of forming a second polysilicon and a third oxide film for a second storage node electrode on the entire structure in which the seventh step is completed; A ninth step of forming a photoresist pattern defining a shape of a second storage node electrode on the third oxide film; A tenth step of selectively etching the third oxide film using the photoresist pattern as an etching mask to form a third oxide pattern, and then removing the photoresist pattern; An eleventh step of forming a fourth oxide film spacer on sidewalls of the third oxide film pattern; A twelfth step of forming a second storage node electrode by etching the second polysilicon layer using an etching mask of the third oxide pattern and the fourth oxide layer spacer; And a thirteenth step of removing the third oxide layer pattern and the fourth oxide layer spacer.

Hereinafter, a capacitor forming method according to an embodiment of the present invention with reference to the accompanying drawings will be described in detail. In the drawings, '1' is a gate electrode, '1A' is a gate oxide film, '2, 7, 10, 14' is an oxide spacer, '3, 9, 12' is an oxide film, '4' is a field oxide film, ' 5 'and 11' represent storage node electrodes, '5A and 11A' represent polysilicon films, '5B' represents storage node contacts, '6' represents interlayer oxide films, '8' represents bit lines, and '13' represents photoresist.

In FIGS. 1 to 4, each (a) shows a layout according to an embodiment of the present invention, and each (b) shows a cross-sectional view along the line A-A 'of the angle (a). , (C) shows a cross-sectional view along the line B-B 'of the angle (a). And (a) and (b) of FIGS. 5 to 7 are process diagrams corresponding to parts (b) and (c) of FIGS. 1 to 4, respectively.

First, FIG. 1A is a plan view showing a state in which an active region 4A separated by a word line (gate electrode 1) and a field oxide film 4 is defined using a word line and an isolation mask, respectively. 1 (b) and (c) form an oxide film 3 and an oxide film spacer 2 on the top and sidewalls of the gate electrode 1, respectively, and interlayer with the polysilicon film 5A constituting the first storage node electrode. It is sectional drawing which shows the state formed even to the oxide film 6. The process will be described in more detail with reference to FIGS. 1 (b) and 1 (c).

FIG. 1B shows the field oxide film 4, the gate oxide film 1A and the gate electrode 1 on the semiconductor substrate, and the first oxide spacer 2 and the oxide film on the sidewalls and the top of the gate electrode 1, respectively. (3) to insulate the gate electrode 1, open the operation region of the semiconductor substrate, and then form the polysilicon film 5A and the interlayer oxide film 6 to form the first storage node electrode. Is showing.

FIG. 1C shows a cross section taken along the line B-B 'of FIG. 1A, which illustrates a polysilicon film 5A forming a first storage node electrode on a semiconductor substrate on which a field oxide film 4 is formed; It has been shown that the interlayer oxide film 6 is laminated.

FIG. 2A is a plan view showing a state in which the masks of the first storage node electrodes 5 are overlapped and arranged in the same state as in FIG. 1A, and FIGS. 2B and 2C are views of FIG. 1, the polysilicon film 5A and the interlayer oxide film 6 are selectively etched using the storage node electrode 5 mask to form a pattern of the first storage node electrode 5 and the interlayer oxide film 6, and the first storage It is sectional drawing which shows the state in which the 2nd oxide film spacer 7 was formed in the side wall of the node electrode 5 and the interlayer oxide film 6 pattern. Reference numeral '5B' shows a storage node contact portion.

FIG. 3 (a) is a plan view showing the mask for the bit line 8 superimposed on FIG. 2 (a), and FIG. 3 (b) shows the process as shown in FIGS. 2 (b) and (c). A bit line conductive material and an oxide film are sequentially deposited on the entire structure, and an etch process using the mask for forming the bit line 8 is performed to make the bit line contact 8A and the bit line 8 in contact with the semiconductor substrate at a predetermined portion. The oxide film 9 pattern covering the upper portion of the light bit line is formed, and the third oxide film spacer 10 is formed on the sidewalls of the bit line 8 and the oxide film 9 pattern. 3 (c) shows that the interlayer oxide film 6 not covered with the bit line 8 and the third oxide film spacer 10 is etched as the process proceeds.

4 (a) is a plan view showing a state in which the photoresist pattern 13, which is a mask for forming the second storage node electrode, is arranged in the third view (a). Is deposited on the oxide film 12, the polysilicon film (11A) and the oxide film (2) constituting the second storage node electrode in order on the entire structure of the process shown in Figs. The photosensitive film 13 pattern covering the second storage node electrode region is formed.

5 (a) and 5 (b) show an oxide film by selectively etching the oxide film 12 not covered with the photosensitive film 13 pattern in a state where the process of FIG. 4 (b) and (c) is completed. (12) A pattern is formed, and the fourth oxide film spacer 14 is formed on the sidewalls of the oxide film 12 pattern.

FIG. 6 (a) selectively selects the polysilicon film 11A not covered with the oxide film pattern 12 and the fourth oxide film spacer 14 while the processes shown in FIGS. 5A and 5B are performed. The second storage node electrode 11 is formed by etching, and FIG. 6B shows the first storage node electrode 5 under the polysilicon film 11A during the etching process. 4) shows disconnection.

Finally, FIGS. 7A and 7B show a state in which the oxide film pattern 12 and the fourth oxide film spacer 14 are removed while the processes of FIGS. 6A and 6B are completed.

According to the present invention as described above, since the capacitor is formed so that the bit line 8 passes directly over the storage node contact 5B without the bit line being formed around the storage node as in the prior art, the etching process margin is increased. Therefore, the etching process for the storage node contact can be omitted.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

Claims (3)

A method of manufacturing a semiconductor device, comprising: forming a gate oxide film and a gate electrode on a semiconductor substrate on which a field oxide film is formed, covering the gate electrode with an oxide film, and covering the gate electrode sidewall with a first oxide spacer; Forming a first storage node electrode parallel to the gate electrode and making a storage node contact at a portion in contact with the semiconductor substrate; Forming a bit line contact at a portion in contact with the semiconductor substrate, a portion of which overlaps the first storage node contact and forms a bit line perpendicular to the gate electrode; And forming a second storage node electrode overlapping the first storage node electrode. A method of manufacturing a semiconductor device, comprising: forming a gate oxide film and a gate electrode on a semiconductor substrate on which a field oxide film is formed, covering the gate electrode with an oxide film, and covering the gate electrode sidewall with a first oxide spacer; A second step of forming a first polysilicon film and a first oxide film to form a first storage node electrode on the entire structure in which the first step is completed; Selectively etching the first oxide film and the first polysilicon film to form a first storage node electrode and a first oxide film pattern that form a storage node contact at a portion parallel to the gate electrode and in contact with the semiconductor substrate; Forming a second oxide spacer on sidewalls of the first storage node and the first oxide pattern; A fifth step of forming a conductive film and a second oxide film to form a bit line on the entire structure in which the fourth step is completed; Selectively etching the conductive layer and the second oxide layer to form a bit line contact at a portion perpendicular to the gate electrode and in contact with the semiconductor substrate, and a portion of the bit line and the second oxide layer overlapping the first storage node contact A sixth step of forming a pattern; A seventh step of forming a third oxide film spacer on sidewalls of the bit line and the second oxide film pattern; An eighth step of forming a second polysilicon and a third oxide film for a second storage node electrode on the entire structure in which the seventh step is completed; A ninth step of forming a photoresist pattern defining a shape of a second storage node electrode on the third oxide film; A tenth step of selectively etching the third oxide film using the photoresist pattern as an etching mask to form a third oxide pattern, and then removing the photoresist pattern; An eleventh step of forming a fourth oxide film spacer on sidewalls of the third oxide film pattern; A twelfth step of forming a second storage node electrode by etching the second polysilicon layer by using the third oxide pattern and the fourth oxide spacer as an etch mask; And a thirteenth step of removing the third oxide film pattern and the fourth oxide film spacer. The method of claim 2, wherein after the twelfth step, the field oxide layer is exposed by selectively etching the first storage node electrode in an etching process for forming the second storage node electrode.