KR100267228B1 - Fabricating method of josephson junction device operating at high temperature - Google Patents

Abstract

PURPOSE: A method for making a high-temperature superconductive Josephson junction element is provided to uniformly deposit a barrier thin film layer at a relative low temperature without using a pin hole, and epitaxially deposits a high-temperature superconductor on the barrier layer. CONSTITUTION: A first high-temperature superconductive layer and a first insulating layer used as a lower electrode are sequentially deposited on a monocrystal substrate. The first insulating layer and the first high-temperature superconductive layer are mesa-etched partially, thereby their one ends are exposed, and a lower electrode pattern having a predetermined slope is formed. On the exposed lower electrode, a first insulating layer and a barrier layer, a milling ratio by ion-beam and a deposition ratio are similarly adjusted. A milling ion-beam's direction is set to be channeled with a crystal axis of the barrier layer, and a low-temperature growth is performed. A second high-temperature superconductive layer and a second insulating layer used as an upper electrode are sequentially deposited on the barrier layer. The first high-temperature superconductive layer used as a lower electrode, a second insulating layer positioned on the first insulating layer, the second high-temperature superconductive layer and the barrier layer are sequentially etched to form an upper electrode pattern. A contact hole is formed to electrically interconnect the upper electrode and the lower electrode. A metal layer deposited on a total surface including the contact hole is patterned to form an electrode pad.

Description

Fabrication method of josephson junction device operating at high temperature

The present invention relates to a method for manufacturing a high temperature superconducting Josephson junction device, and in particular, by controlling the milling rate and deposition rate by the ion beam similarly and growing the thin film to form a dense, void-free uniform epitaxial thin film It relates to a method for manufacturing a high temperature superconducting Josephson junction element to be formed in.

The high temperature superconducting Josephson junction element is very important for studying the fundamental properties of high temperature superconductors that are not yet known, as well as microwave active devices such as oscillators and mixers, such as superconducting quantum interference devices (SQUID), It is an essential element for small scale applications of high temperature superconductors, such as ultrafast switching elements.

The high temperature superconductor has a very short coherence length of ~ 10Å and the anisotropy of the material makes it difficult to manufacture a tunnel barrier type junction (SIS) widely used in the existing low temperature superconductivity. Therefore, to overcome the shortcomings of the SIS method, Josephson junction devices are fabricated in several different ways.These methods use the method of grain boundary (GB) junction and SIS (superconductor + insulator +) using granular properties of high-temperature superconductors. It is divided into SNS (superconductor + normal material + superconductor) type bonding method in which a normal layer is inserted instead of an insulator of a superconductor.

As shown in FIG. 1A, the GB-type high-temperature superconducting Josephson deposits an epitaxial thin film 12 on a substrate 10 formed by bonding two single crystals 11 and 11 ′ having different crystal axes to grain boundaries 13. ) And then patterning the bi-cristel junction, and as shown in FIG. 1B, depositing a seed layer 14 such as MgO on the substrate 10 and depositing a buffer layer 15 such as SrTiO 3 on the substrate 10 as a whole. And a bi-epitaxy junction that epitaxially deposits the superconductor layer 16 to form a 45 ° grain boundary 17, and a sharp 45 ° phase on the substrate 10 as shown in FIG. 1C. After making the step, there is a step edge junction in which the superconductor layer 18 is epitaxially deposited to form two 90 ° grain boundaries 19 and 20 on the step surface.

The Josephson junction device manufactured by the bi-crystal junction of FIG. 1A is relatively excellent in characteristics but only a portion where two single crystals 11 and 11 'are joined to make a Josephson junction formed by the grain boundary 13. It is limited, and it is not easy to adjust the junction characteristic variables such as critical current, normal resistance, etc., and the cost of the substrate is high, and the type of the substrate is limited.

On the other hand, the SNS-type junction uses the theory of proximity effect that superconductivity of superconductor penetrates into normal material when superconductor (S) and normal material (N) are in close proximity. In this case, the degree of superconductivity penetrating into normal material is normal nose. It is called normal coherence length, and this value depends on interface condition or characteristics of normal material. However, in case of high temperature superconductor, it is much larger than coherence length of superconductor. This is much easier.

SNS-type joints are manufactured to allow Josephson coupling to be made on a-b planes with relatively long coherence lengths.

As shown in FIG. 1D, the SNS-type junction typically forms a superconductor layer 21 on a substrate 10 and is then patterned to separate the superconductor layer 21 and then a normal material layer on the separated superconductor layer. 22).

In the initial SNS bonding fabrication, the material of the normal material layer 22 was mainly used as a precious metal such as gold, silver, or a gold-silver alloy, and these materials may cause high temperature superconductor and inter-diffusion during high temperature deposition. In addition, since epitaxial growth is not possible when the high temperature superconducting upper electrode is deposited, it is possible to fabricate the junction by patterning the normal material after normal temperature deposition.

Precious metals may have long normal coherence lengths, but IcRn (Ic is the critical current, Rn is the junction resistance) because high temperature superconductors and electronic mismatch are large and boundary resistance is large. There was a very small problem.

As a method for solving the problem when using such a noble metal as a normal layer, a superconductor layer 23, an insulator layer 24 is formed on one surface of the substrate 10 as shown in FIG. After forming the edge (edge) by depositing a perovskite-like metal oxide such as PrBa2Cu3O7-y, YxPr1-xBa2Cu3O7-x and the like to form a normal material layer (25) The method of depositing the superconductor layer 26 thereon was used.

However, this method is a junction due to the SNS proximity effect, which allows the thickness of the normal material layer to be thicker than the normal coherence length, and by controlling the thickness of the normal material layer or the line width of the Josephson junction, the critical current (Ic) or the junction resistance (Rn). Although it is advantageous in that it is possible to arbitrarily adjust the bonding parameters, etc., the manufacturing process is complicated and difficult, which leads to a lot of cost and time, and thus it is not reproducible and shows irregular bonding resistance depending on the normal layer material. It has a complex structure such as SINS or SINIS, which makes it difficult to analyze the bonding mechanism, which makes it difficult to determine the design conditions.

In addition, in the case of SNS junction using oxide high temperature superconductor as superconducting electrode, the thermal expansion coefficient is well matched with the superconducting material to reduce the stress at the interface, suppressing unnecessary resistance, and chemically stable to inner diffusion. ), The structural matching is good, epitaxial growth must be achieved, and the material that can satisfy such conditions relatively well, the metal oxide of the perovskite pseudo-phase structure or the oxide having a lower transition temperature than the superconducting electrode A high temperature superconductor or the like is used. In this case, IcRn is low, and there is a problem such that there is an interface resistance required for water.

In the case of the metal low temperature superconductor having a relatively long coherence length, the uniformity of the barrier thin film deposited by the general method is greatly decreased. Therefore, the SIS junction is fabricated by the uniform barrier thin film by the oxidation method of Al. The most successful and common method is the high temperature superconductor, which itself is an oxide, and it is impossible to form a barrier thin film by oxidation, and if the barrier thin film is epitaxially grown at high temperature, strain, outgrowth It is difficult to control the clean thin barrier to the interface due to the influence of), and thus, there is a problem that the uniformity and characteristics of the bonding are significantly reduced due to the limitation of the barrier thin film material.

Accordingly, the present invention has been invented in view of such conventional problems, and aims at a manufacturing method for improving the characteristics and manufacturing yield of the high temperature superconductor Josephson junction element.

It is another object of the present invention to provide a method for manufacturing a high temperature superconductor Josephson junction element in which a uniform and homogeneous barrier thin film layer can be deposited without pinholes at a relatively low substrate temperature and the high temperature superconductor is epitaxially deposited on the barrier layer. .

1A to 1E schematically illustrate the shapes of various conventional Josephson junction elements.

Figure 2 is a schematic cross-sectional view showing a deposition apparatus of a Josephson junction element for implementing the manufacturing method of the present invention

3A to 3E schematically show the cross section of a Josephson junction element in each manufacturing process of the present invention.

4A to 4D are graphs showing X-ray θ-2θ scan results and X-ray ψ scan results of the Josephson junction element according to the manufacturing method of the present invention and the Josephson junction element according to the conventional manufacturing method.

5A to 5C are graphs showing the characteristics of the Josephson junction element according to the manufacturing method of the present invention.

Explanation of symbols for main parts of the drawings

10: substrate 11,11 ': single crystal

12: epitaxial thin film 13,17,19,20: grain boundary

14: seed layer 15: buffer layer

16,18,21,23,26: superconductor layer 22,25: normal material layer

24: insulator layer 30: deposition chamber

31: substrate support device 32: heater

33: target support device 34: KrF laser beam generator

35 ion-gun 36 gas supply device

40: STO substrate 41: target

42: YBCO 43 for lower electrode: Insulation STO layer

44: PBCO barrier layer 45: YBCO for the upper electrode

46: cap STO layer 47,48: electrode pad

The method of manufacturing a high temperature superconducting Josephson junction device of the present invention for achieving the above object is formed by sequentially depositing a first high temperature superconductor layer and a first insulating layer used as a lower electrode on a single crystal substrate, and the first Etching a portion of the insulator layer and the first high temperature superconductor layer into a mesa shape to form a lower electrode pattern having one end exposed and having a predetermined slope, and including the exposed lower electrode and the first insulator layer on the entire surface of the substrate. Controlling the milling rate and the deposition rate by ion-beams similarly and simultaneously setting the direction of the milling ion-beams to form the crystal axes and channeling of the barrier layer to be deposited; Sequentially depositing a second high temperature superconductor layer and a second insulator layer to be used as upper electrodes on the layer; Sequentially etching the first high temperature superconductor layer and the second insulator layer, the second high temperature superconductor layer, and the barrier layer positioned on the first insulator layer to form an upper electrode pattern, and forming the upper electrode; And forming a contact hole for electrically connecting the lower electrode to the lower electrode, and patterning a metal layer deposited on the front surface including the contact layer to form an electrode pad.

According to the manufacturing method of the present invention, the etching layer and the deposition rate by the ion-beam, while at the same time to set the direction of the ion-beam for milling so that the crystal axis and the channeling of the deposited thin film, the barrier layer is The crystal axis direction of the barrier layer is formed by epitaxial deposition, so the channeling is good and the probability of collapse is low. Therefore, the etching rate is greatly reduced, whereas the crystals grown randomly in other directions are highly dense and cracked. Since the uniform epitaxial barrier layer thin film without voids is formed at low temperature, the bonding uniformity and characteristics of the Josephson junction element can be greatly improved.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Figure 2 schematically shows a manufacturing apparatus for implementing the manufacturing method of the high temperature superconducting Josephson junction element of the present invention, the apparatus is installed to support the heat treatment substrate in the deposition chamber 30 and the chamber 30 And a substrate support device 31 having a heater 32 for heating the substrate at a predetermined temperature, and a target support device 33 for supporting the target by being provided to face the substrate supported by the substrate support device 31. ), A KrF laser beam generator (34), an ion-gun (35) for generating ion beams using an ECR source, and a gas supply (36) for supplying argon and oxygen into the chamber (30). Equipped with.

An embodiment of the manufacturing method of the high temperature superconducting Josephson junction element of the present invention using the manufacturing apparatus will be described with reference to FIGS. 3A to 3E.

First, a target STO (SrTiO3) {100} substrate 40 and a target 41 are mounted in the manufacturing apparatus of FIG.

3A, a laser beam of the KrF laser beam generator 34 is irradiated onto the STO {100} substrate 40 by applying a pulse laser deposition (PLD) method, that is, the target 41 to the laser beam. The electrode YBCO layer 42 and the insulating STO layer 43 are epitaxially grown in-situ.

At this time, the thickness of the lower electrode YBCO layer 42 and the insulating STO layer 43 is 2000 kPa, respectively, and the lower electrode YBCO layer 42 has the C-axis perpendicular to the STO substrate 40 and the insulating STO layer. 43 grows perpendicular to the STO substrate 40 in the {100} direction.

Then, as shown in Figure 3b, the pattern is defined in a mesa using a photolithography method, wherein a hard baking and a separate ion-milling chamber so that the inclination angle is about 20 ° The edges are defined by 30 ° Ar ion milling.

Then, as shown in FIG. 3C, a PBCO barrier layer 44 is deposited on the surface of the resultant portion including a mesa-shaped inclined portion.

At this time, as the deposition conditions of the PBCO barrier thin film layer 44, the direction of the oxygen ion beam of the ion-gun 35 is set for the thin film so that the crystal axis and the channeling of the thin film are deposited well, the ion-gun 35 Of the ion ion beam (ECR source) is incident on the surface of the thin film deposited on the substrate at 400 eV energy in the set direction, and the substrate temperature is 600 ° C., while the KrF of the KrF laser beam generator 34 The laser beam is incident on the target 41 at a 5 Hz repetition rate and 1.5 J / cm 2 of energy, so that the deposition rate of the thin film on the substrate is about 8 mW / min.

Just before deposition of the PBCO barrier layer 44, the energy of the oxygen ion-beam of the ion-gun 35 is adjusted to about 50 eV to clean the surface damaged or soiled by photolithography. It is desirable to clean the interface for 5 minutes.

In this case, since the ion-gun 35 for ion milling is previously adjusted to the beam at a channeling angle, the surface cleaning and oxygen annealing are added to the ion-gun 35, which is very helpful in forming a clean interface.

After the ion-gun 35 was stopped, the oxygen partial pressure was increased to 300 mtorr and the substrate temperature was increased to 790 ° C. Then, the upper electrode YBCO layer 45 and the cap STO layer 46 were each 2500 kPa. To 500 mm thick.

3D, the cap STO layer 46 and the upper electrode YBCO layer 45 and the PBCO barrier layer 44 positioned on the lower electrode YBCO layer 42 and the insulator STO layer 43. Sequentially etching to form an upper electrode pattern.

Next, as shown in FIG. 3E, contact holes for electrically connecting the lower electrode pattern and the lower electrode pattern are respectively formed, and then a metal layer deposited on the front surface including the contact holes is patterned to form the electrode pads 47,. 48).

According to the embodiment of the present invention as described above, the PBCO barrier is formed under the condition that the polycrystalline grows and the direction of the channeling of the crystal lattice of the deposited thin film is set to the direction of the ion-gun oxygen ion-beam of the additionally-installed ion-gun. Since the layer 44 is deposited, it receives less strain than the high temperature and relative high pressure atmosphere in which the conventional epitaxial layer is deposited, so that less outgrowth, dislocation, etc. can be obtained, and a more uniform barrier layer can be obtained. In this case, grains grown in a direction different from the channeling angle are milled out, thereby obtaining an epitaxial barrier layer.

4A and 4B are graphs showing the case where ion-milling is not performed by using an ion-beam when the PBCO barrier layer is formed and when each is performed.

4A and 4B show X-ray θ-2θ scan results with and without ion milling according to the manufacturing conditions of the present invention as described above when forming the PBCO barrier layer, and FIGS. 4C and 4D show X- The results of the ray ψ scans are shown, respectively. In the case of ion-milling, as shown in FIG. 4A, all of the (001) peaks appear in the case of polycrystal, indicating that the c-axis is grown perpendicular to the substrate. In this case, as shown in FIG. 4B, only the main peaks 110 and 103 are shown, indicating that the c-axis does not grow perpendicular to the substrate.

In the case of not performing ion milling, as shown in FIG. 4D, there is no alignment for the in-plane at all, whereas in the case of ion milling, 4-fold symmetry is shown. It can be seen that there was a tactical growth.

In particular, the thin film grown by ion-milling showed the excellent morphology observed by SEM and AFM, which is very suitable for use as a barrier.

5A, 5B and 5C show the characteristics of the high-temperature superconducting Josephson junction element manufactured by the manufacturing method of the present invention at the liquid nitrogen temperature (77k), 1-V characteristics, Ic (H) characteristics, and As a graph showing the V-4 characteristics of the dc SQUID, it can be seen that the Josephson junction was formed as confirmed from FIGS. 5A and 5B. Also, in the case of the SQUID fabricated using this junction, as shown in FIG. The characteristics are shown.

In particular, the high temperature superconducting Josephson junction element according to the manufacturing method of the present invention showed that the Josephson junction characteristics of all 20 elements in the same substrate showed the Josephson junction characteristics despite the thickness of the thin barrier layer. The distribution of Rn 1σ was about 10%, showing very good characteristics.

In the above embodiment of the present invention, but the example using a high-temperature superconductor YBCO, but the present invention is in addition to this (rare earth) BCO, BiSrCaCuO (composition 2-1-2-2-X or 2-2-2-3 -X), TiBoCaCuO (composition is 2-1-2-2-X or 2-2-2-3-X or 1-2-1-2-X or 1-2-2-3-X), Any oxide high-temperature superconductor may be used as long as it can epitaxially grow such as HgBaCaCuO (composition 1-2-1-2-X or 1-2-2-3-X).

In addition, PBCO is an example of a barrier layer material, but in addition, perovskite capable of epitaxial growth above and below high temperature superconductors such as NBCO, doped YBCO, STO, NGO, LAO, LSCO, CRO, SRO, etc. All oxides are possible, such as insulators such as perovskite, metals, semiconductors and superconductors with low critical temperatures.

In addition, although the PLD method is used as the deposition method, the present invention is also not limited to this method. Various methods of deposition such as CVD (chemical vapor deposition), MBE (mocular beam epitaxy), and sputtering can be used simultaneously. In addition, the present invention can be applied to the form of a sandwich, a ramp-edge, etc., having a structure of high temperature superconductivity-barrier-high temperature superconductivity except grain boundary junctions. have.

As described above, the manufacturing method of the present invention makes the etching layer and the deposition rate similar to the ion-beam and at the same time sets the direction of the ion-beam for milling so that the crystal axis and the chamfering of the deposited thin film are made well, thereby preventing the barrier layer. Since it is formed by CVD deposition, the crystal axis direction of the barrier layer has good channeling, so the probability of collapse during ion milling is low, so that the etching rate is greatly decreased, whereas crystals grown randomly in other directions have different etching rates. It is possible to form a very dense and void-free uniform epitaxial thin film barrier layer at a low temperature, thereby greatly increasing the bonding uniformity and characteristics of the Josephson junction element without being strongly limited by the barrier layer forming material. It can be improved, and this has the effect that can greatly improve the production yield.

Claims (6)

Sequentially depositing a first high temperature superconductor layer and a first insulating layer, which are used as lower electrodes, on the single crystal substrate; Etching a portion of the first insulating layer and the first high temperature superconductor layer into a mesa shape to form a lower electrode pating portion having one end exposed and having a predetermined slope; Including the exposed lower electrode and the first insulator layer to control the milling rate and deposition rate by the ion-beam barrier layer on the front surface of the substrate and at the same time the crystal axis and channeling of the barrier layer to be deposited is achieved Growing to form at low temperature by setting the direction, Sequentially depositing a second high temperature superconductor layer and a second insulator layer to be used as upper electrodes on the barrier layer; Sequentially etching the first high temperature pyroelectric layer and the second insulator layer, the second high temperature superconductor layer, and the barrier layer forming the lower electrode to form an upper electrode pattern; Forming a contact pad by forming a contact hole for electrically connecting the upper electrode and the lower electrode, and then patterning a metal layer deposited on the front surface including the contact hole to form an electrode pad. Method of manufacturing the device. The method of claim 1, The barrier layer is a method of manufacturing a high temperature superconducting Josephson junction device, characterized in that formed of a phase-conducting material of PBCO. The method of claim 1, The first and second high temperature superconductors are YBCO, R (rare earth) BCO, BiSrCaCuO (composition 2-1-2-2-X or 2-2-2-3-X), TiBaCaCuO (composition 2-1 -2-2-X or 2-2-2-3-X or 1-2-1-2-X or 1-2-2-3-X), HgBaCaCuO (composition is 1-2-1-2- X or 1-2-2-3-X) any one of the high temperature superconducting Josephson junction device manufacturing method. The method of claim 1, The milling ion beam uses an ion gun of an ECR device that generates an oxygen ion beam, the deposition ion beam uses a KrF laser beam generator, and the energy of the oxygen ion beam of the ion gun is 400 ev. And the ion-beam of the KrF laser beam generator is an energy of 1.5 J / cm 2 at a 5 kV repetition rate, wherein the substrate temperature is set to 600 ° C. The method of manufacturing a high temperature superconducting Josephson junction element. The method of claim 1, Preparation of a high temperature superconducting Josephson junction device further comprising the step of pre-cleaning the surface of the site to be deposited for 5-30 minutes using a low energy oxygen ion-beam of 50 ~ 100ev before the formation of the barrier layer Way. The method of claim 5, The ion-beam is a method of manufacturing a high temperature superconducting Josephson junction device, characterized in that generated by using an ion-beam ion milling device for forming the barrier layer.

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