KR100263389B1 - ATM-VME interface device in computer system - Google Patents

Abstract

PURPOSE: An apparatus for connecting an ATM(Asynchronous Transfer Mode) with a VME(Versa Module European) in computer systems is provided to be mounted in a large computer systems connected with an ATM network, so as to make the computer systems use a communication method on the basis of the ATM. CONSTITUTION: A user-network connector(370) directly connects with an ATM(Asynchronous Transfer Mode) network, and performs a conversion operation between data of a bit unit and data of a byte. A packet reassembler(360) reassembles ATM cells with a packet, if errors of the ATM cells do not exist. A packet memory(320) receives packet data from a data bus of the packet reassembler(360) or a computer system, and stores the packet data. A packet divider(350) receives the packet data and divides the packet data into data of an ATM cell unit. A control memory(340) stores data necessary for the packet division and the packet reassembly. A local block unit(330) supplies information such as a program necessary for an ATM connection board operation. A processor(311) manages entire controls of an ATM-VME(Versa Module European) connector.

Description

A unit of interfacing Asynchronous Transfer Mode with Versa Module European bus in a computer system

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM-VME access device, and more particularly, to a computer system connected to an ATM network, and the computer system transmits and receives data using a Versa Module European (VME) bus. The present invention relates to an ATM-VME access device for a computer system, which is a device that allows data to be sent and received.

1 is a simple configuration diagram of an ATM network, and illustrates a connection relationship between computer systems connected to an ATM network. Computer systems 110 and 120 that transmit and receive data through an ATM network are connected to each other through an ATM switch 130. At this time, each computer system (110, 120) requires an ATM-VME access device 300 that can interface with the ATM network (interface) to transmit or receive signals in an ATM cell unit.

That is, when the computer systems 110 and 120 send data to the ATM network, the data to be transmitted are sent to the ATM-VME access device 300 through the data buses 111 and 121: VME buses, and then converted into a signal suitable for ATM transmission. Sent to ATM network. In addition, in the case of receiving data from the ATM network, the ATM-based signal received from the ATM network is received through the ATM-VME access device 300, and after the necessary data are extracted, the data buses 111 and 121 are transmitted through the VME bus. It is sent to a higher level process.

On the other hand, in the ATM communication method, in order to provide a service having various traffic characteristics, a message (or packet) to be transmitted is divided into ATM cells having a size of 53 bytes and transmitted, and the receiving side reassembles the received cell to reassemble the message (or packet). It is a way to restore.

2 is a conceptual diagram of an ATM protocol reference model, and the ATM communication scheme has a hierarchical structure as shown in FIG. In FIG. 2, the protocol reference model is composed of a management plane, a control plane, and a user plane, and the management plane is composed of hierarchical management and plane management. In addition, the plane management means the overall management of the system, and the hierarchical management manages resource and usage variables and OAM information management.

In addition, the control plane manages call control and connection control information, and the user plane transmits user information. The protocol of the control plane and the user plane consists of an upper layer, an ATM adaptation layer, an ATM layer, and a physical layer.

Table 1 below shows the function of each layer.

Hierarchy Tier function Upper hierarchy Higher layer function ATM Adaptation Layer Convergence (CS) sublayer Convergence function Cutting and Recombination (SAR) Cutting function and recombination function ATM layer General flow control and cell header processing Physical layer Transmission Convergence (TC) HEC signal generation and extraction function Physical medium Bit time information function

As shown in Table 1 above, ATM communication methods are divided into vertical structures such as physical layer, ATM layer, ATM adaptation layer (AAL), and higher protocol layer. It is divided into segmentation and reassembly sublayer (SAR) and convergence sublayer (CS) sublayer, and the physical layer is divided into physical medium (PM) and transmission convergence (TC) sublayer.

3 is a schematic diagram showing the role of each layer and the flow of data in the ATM network. In FIG. 3, the transmitting computer system 110 to transmit data using the ATM communication method transmits the data to be transmitted in a manner suitable for the ATM communication method. The data arrive at the receiving computer system 120, which is the destination of the data, via the ATM switch 130.

The sender computer system 110 to transmit data will first make the data to be transmitted in packet units. This packet data is divided into 48-byte cells, which are performed in the processing of the ATM adaptation layer. In the processing of the ATM adaptation layer, a cell divided into 48 bytes is added with a 5-byte ATM cell header for correct data transmission. This is done in the processing of the ATM layer.

In the ATM layer, transmitted data made up of 53-byte ATM cells are converted into signals in synchronous digital hierarchy frame units for transmission over the actual transmission path. The signals of SDH frame units are transmitted through the actual ATM network. . This signal is then sent to the receiving computer system 120 via the ATM switch 130, which receives the signal by performing the reverse process of the above-described data transmission process.

That is, in order for any computer system having a VME bus to connect to an ATM network and send and receive data through an ATM-based communication method, an ATM-VME access device that satisfies the ATM protocol described above is required.

Accordingly, the present invention has been made to meet the above needs, and is provided in a computer system, in particular, a medium-to-large computer system, so that the computer system can use an ATM-based communication method, that is, in a computer system The purpose is to provide an ATM-VME access device.

In order to achieve the above object, an ATM-VME access device in a computer system according to the present invention is connected to an ATM network, receives data in bits from an ATM network, converts the data into bytes, and outputs the data. A user-network connection unit receiving the data in bytes and converting the data into bits and outputting the data to the ATM network; Receives byte data output from the user-network connection unit, stores it in FIFO, outputs it in order, and configures an ATM cell. If there is no error in the received ATM cell, the ATM cell is reassembled into a packet. If there is a packet reassembly for discarding the cell; A packet memory unit for receiving and storing packet data output from the packet reassembly unit according to an arbitrary packet control command, or for receiving and storing packet data from a data bus of the computer system; A packet division unit for receiving the packet data output from the packet memory unit, dividing the packet data into ATM cell unit data, and outputting the packet data to the user-network connection unit; A control memory unit for storing data for packet division or packet reassembly in the packet division unit or packet reassembly unit; A VME access unit which receives data from the computer system and stores the data in the packet memory unit or transmits data transmitted from an ATM network to the computer system; A local block unit for storing programs and data necessary for operating the VME connection unit, the packet memory unit, the control memory unit, the packet division unit, the packet reassembly unit, and the user-network connection unit; And a processor unit for issuing a packet control command to the control memory unit and the packet memory unit with reference to the program data of the local block unit.

The processor may further include a processor that issues a packet control command to the local block unit, the control memory unit, and the packet memory unit; And a buffer connecting the processor, the local block unit, the control memory unit, and the packet memory unit, respectively.

1 is a simple configuration diagram of an ATM network;

2 is a conceptual diagram of an ATM protocol reference model;

3 is a schematic diagram showing the role and data flow of each layer in an ATM network;

4 is an ATM-VME connection device in a computer system according to the present invention;

5 is a flowchart illustrating a transmission process of an ATM access device;

6 is a flowchart illustrating a receiving process of an ATM access device.

* Explanation of symbols for main parts of the drawings

110,120: computer system 111,121: VME bus

130: ATM exchanger 300: ATM-VME interface

310: processor unit 311: processor

312: buffer 320: packet memory section

330: local block unit 340: control memory unit

350: packet division unit 360: packet reassembly unit

361: Packet Reassembler 362: FIFO

370: user-network connection 380: VME connection

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

4 is a configuration diagram of an ATM-VME connection device 300 (hereinafter, referred to as an ATM-VME connection device) in a computer system according to the present invention, and includes a processor unit 310, a packet memory unit 320, and a local device. The block unit 330, the control memory unit 340, the packet division unit 350, the packet reassembly unit 360, the user-network connection unit 370, and the VME connection unit 380 are included. At this time, the ATM-VME connection device 300 is mounted and used in a computer system connected to the ATM network.

First, the transmission / reception process of the ATM-VME access device 300 will be briefly described.

5 is a flowchart illustrating a transmission process of the ATM-VME access device 300. The packet memory unit 320 transmits data to be transmitted to the ATM network from the data buses 111 and 121 of the computer system. Received and stored through (step S510).

Thereafter, the packet dividing unit 350 receives the packet data from the packet memory unit 320 and divides the packet data into cells of 48 byte units (step S520).

In step S520, 5 bytes of ATM cell headers are inserted into cells divided into units of 48 bytes (step S530). At this time, the ATM cell header is information (overhead) added to transmission data (payload) in order to correctly transmit a signal in units of ATM cells. The 53-byte ATM cell generated in step S530 enters the user-network connection unit 370, is converted into a data stream in units of bits (step S540), and is transmitted through the ATM network as a signal having an SDH frame structure (step S550). .

FIG. 6 is a flowchart illustrating a reception process of the ATM-VME access device 300. The user-network connection unit 370 receives data in units of bits from the ATM network (step S610), and byte data received in units of bits. The data is converted into unit data (step S620).

The data converted in units of bytes from the user-network connection unit 370 is stored in the FIFO 362 of the packet reassembly unit 360 and then input to the packet reassembly 361 in order (step S630).

The bytes of data input to the packet reassembler 361 are checked for errors in units of 53 bytes of ATM cells (step S640). The ATM cells with errors are discarded (step S680). Is converted into packet data (step S650).

Data packetized by the packet reassembly unit 360 is once stored in the packet memory unit 320 (step S660) and then transmitted to the upper processing unit of the computer system through the VME connection unit 380 (step S670).

Now, each component constituting the ATM-VME access device 300 will be described in detail.

The processor unit 310 is composed of a processor 311 and a buffer 312, by controlling the control memory unit 340, the local block unit 330, and the packet memory unit 320 through the buffer 312, Performs overall control and management of the ATM-VME access device (300). That is, in the receiving process, a command to receive the data of the packet reassembly unit 360 to the packet memory unit 320 is issued, and in the transmitting process, the packet data to be transmitted is received from the data bus 111 or 121 of the computer system. Give an order

In addition, by accessing the local block unit 330, the operating program of the ATM-VME access device 300 is executed, and the control memory unit 340 is accessed to control the division and reassembly of ATM cells.

The buffer 312 of the processor unit 310 provides three interfaces to the processor 311, respectively, between the processor unit 310 and the control memory unit 340, between the processor unit 310 and the local block unit ( 330 and a connection between the processor 310 and the packet memory 320. Therefore, the processor unit 310 may access three resources at the same time.

For example, when the processor 311 attempts to access the packet memory unit 320, if the packet memory unit 320 is already used by another master, the other master terminates the use of the packet memory unit 320. The processor 311 should wait until the right to use the packet memory unit 320 is returned. At this time, the address bus and the data bus of the processor 311 are connected to the control memory unit 340 and the local block unit 330 through a buffer while the processor 311 is waiting for the return of the packet memory unit 320. It is possible to process the operation of the control memory unit 340 or the local block unit 330. This provides the advantage that the processor 311 waits to obtain the right to use the shared resource, thereby reducing the idle time incurred, thereby improving the performance of the entire apparatus.

The VME connection unit 380 receives the data to be transmitted from the computer system and stores the data in the packet memory unit 320 or receives data from the ATM network and passes the user-network connection unit 370 and the packet reassembly unit 360. When stored in the packet memory unit 320, this data is transmitted to the computer system.

The packet memory unit 320 receives and stores packet data to be transmitted to the ATM network through the VME connection unit 380, or receives the packet data from the ATM network and passes through the user-network connection unit 370 and the packet reassembly unit 360. Temporarily store data. At this time, the data input / output operation of the packet memory unit 320 is controlled by the processor 311.

The local block unit 330 may include a ROM that permanently stores a program necessary for the operation of the ATM-VME interface 300, and a RAM to which an operation program in the ROM is copied when the ATM-VME interface 300 starts to operate. It consists of. This is because when the ATM-VME connection device 300 starts operation, if the program of the ROM is transferred to the RAM, and the execution of the program is performed with reference to the RAM, the speed is improved as compared with the operation referring to the ROM. At this time, the program copy from the ROM to the RAM is performed under the control of the processor 311.

The control memory unit 340 manages information about data stored in the packet memory unit 320. That is, information generated in the process of dividing and reassembling the packet in the packet division unit 350 or the packet reassembly unit 360 is stored.

The packet dividing unit 350 receives data to be transmitted in the transmission process, that is, data in the packet memory unit 320, divides the data into 48 byte units, and adds a 5-byte ATM header. The 5-byte ATM cell header contains 4-bit General Flow Control (GFC), 1-byte Virtual Path Identifier, 2-byte Virtual Channel Identifier, and 3-bit Payload Type. (Payload Type), 1-bit Cell Loss Priority, and 1-byte Header Error Control.

The packet reassembly unit 360 temporarily stores the 53-byte ATM cell received through the ATM network in the FIFO 362, and then transmits the received data to the packet reassembler 361 in the input order. If there is no error, restore the packet based on the information in the header. If there is an error, the cell is discarded.

The user-network connection unit 370 is divided into an ATM cell transmitter and an ATM cell receiver, and is directly connected to an ATM network. The ATM cell transmitter converts the data in units of bytes sent from the packet dividing unit 350 into data streams in units of bits, and transmits the data to the ATM network in SONET / SDH format.

At this time, each overhead in SONET / SDH format, i.e., section overhead, line overhead, path overhead, and framing patterns A1 and A2 is inserted into the data to be transmitted, and scrambling is performed. , Insert an alarm signal. In addition, Bit Interleaved Parity (B1, B2, B3), Line and Path FEBE (Far End Block Error Indication: Z2, G1), Payload Pointer (H1, H2), And a synchronous payload envelope for transmitting the ATM cell payload.

On the other hand, the ATM cell receiver receives a data stream in units of bits received from the ATM network, recovers clock and data from the received bit stream, and processes section overhead, line overhead, and path overhead.

In addition, framing bytes A1 and A2 are extracted, descrambling is performed, and alarm conditions, section BIPs, line BIPs, and path BIPs are monitored. At this time, the number of errors at each level, the line FEBE, and the path FEBE mark (Z2, G1) are counted for performance monitoring. The payload pointers H1 and H2 are analyzed to remove the synchronous payload envelope carrying the received ATM cell payload and to frame the ATM cell payload. It also filters HCS errors, filters invalid and unallocated cells, and demixes GFC (Generic Flow Control).

As shown above, the packet memory unit 320, the control memory unit 340, the packet divider 350, and the packet reassembly unit 360 of the ATM-VME access device 300 are configured in the ATM adaptation layer and the ATM layer. In charge of some. User-network connection 370 is responsible for the processing of the physical layer.

The ATM-VME connection device 300 according to the present invention is mounted on any computer system connected to an ATM network, especially a medium-large computer system, so that the computer systems can use an ATM-based communication method.

Claims (2)

A device mounted on an arbitrary computer system connected to an asynchronous transmission mode network (ATM network) to enable the computer system to perform ATM-based communication with an ATM network, the device being connected to an ATM network and connected to a bit from an ATM network. A user-network connection unit 370 that receives the data in units and converts the data into bytes and outputs the data, or receives the data in bytes and converts the data into bits and outputs the data to the ATM network; Receives byte data output from the user-network connection unit 370, stores it in the FIFO 362, and outputs it in order to configure an ATM cell. If there is no error in the received ATM cell, the corresponding ATM cell is packetized. A packet reassembly 360 to discard the cell if there is an error; A packet memory unit 320 for receiving and storing packet data output from the packet reassembly unit 360 according to an arbitrary packet control command, or for receiving and storing packet data from a data bus of the computer system; A packet division unit 350 for receiving the packet data output from the packet memory unit 320 and dividing the packet data into ATM cell unit data and then outputting the packet data to the user-network connection unit 370; A control memory unit 350 for storing data necessary for packet division or packet reassembly in the packet division unit 350 or packet reassembly unit 360; A VME connection unit 380 which receives data from the computer system and stores the data in the packet memory unit 320 or transfers the data stored in the packet memory unit 320 to the computer system by being transferred from an ATM network; Programs required to operate the VME connection unit 380, the packet memory unit 320, the control memory unit 340, the packet division unit 350, the packet reassembly unit 360, and the user-network connection unit 370. A local block unit 330 storing data and data; And And a processor unit 310 which issues a packet control command to the control memory unit 340 and the packet memory unit 320 with reference to the program data of the local block unit 330. ATM-VME interface for computer systems. The processor of claim 1, wherein the processor unit 310 includes: a processor 311 which issues a packet control command to the local block unit 330, the control memory unit 340, and the packet memory unit 320; And And a buffer 312 connecting the processor 311 to the local block unit 330, the control memory unit 340, and the packet memory unit 320, respectively. ATM-VME interface.