KR100263077B1 - Message processing apparatus of selective call receiver - Google Patents

Abstract

When call message information corresponding to each cap code is received in a distributed form at the same time in a wireless call receiver having a plurality of cap codes, they are identified and combined to generate complete call message information corresponding to each cap code. A message processing apparatus comprising: an external memory having a specific number of virtual memory blocks and an area for actually storing data of the virtual memory blocks, and an internal memory to which a specific number of message buffers corresponding to each of the virtual memory blocks are allocated; It consists of a main processing unit that temporarily stores any received message packet in the corresponding message buffer and, if an overflow occurs in the message buffer, moves the contents of the message buffer to a specific address of the corresponding virtual memory block. It features.

Description

Receiving message processing device of radio call receiver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for processing a received message in a wireless call system. Particularly, when a message packet of several incomplete call message information is transmitted at the same time, the wireless call receiver receives them and completes each complete call message information. Relates to a device.

In general, the Post Office Code Standardization Advisory Group (POCSAG), a kind of paging protocol, transmits a message corresponding to another address after one message is continuously transmitted to one address. In other words, even if multiple callers call, the message of the other caller is not sent until one call is completed.

1 is a view showing the structure of the digging method signal. This is detailed in CCIR Recommendation 584. One bread code consists of preamble data consisting of 576 bits and a plurality of batch data contiguous. The preamble data is a code in which "1" and "0" are repeated for 576 bits. One digging cord is usually made from 30 batches up to 60 batches. One batch consists of one word sync data of 32 bits and eight frame data of 64 bits. Each frame data is composed of 32 bits of address code word and 32 bits of message code word.

FIG. 2 is a diagram schematically illustrating a process of storing a message code word received in a breading type wireless call receiver in a memory. As shown, a single message buffer can be delivered to multiple message storage memory areas by way of a received message codeword.

Such a digging method has a problem that if the called time of the called message is long, another caller has to wait until the end of the time, because of the structural characteristics of the digging method as described above.

However, the FLEX method, a high-speed paging protocol, multiplexes for faster transmission of call messages from different people. This FLEX method gives each address a phase so that messages from different callers can be connected and sent. However, even when this call method is used, if one person's call message information is long, the entire call message information cannot be transmitted at the time when one phase is allocated, and the rest of the message is connected at the time allocated to the next phase. Should be. In this case, the call message information is transmitted by dividing at least two or more divided message code words during transmission.

The message code word divided as described above cannot be processed normally when using one message buffer as shown in FIG. In addition, if you are forced to use a single message buffer, you have to know exactly where your messages are being dropped and then reconnected from where.

Accordingly, an object of the present invention is to provide an apparatus for receiving a plurality of incomplete call message information corresponding to each cap code at the same time to a radio call receiver having a plurality of cap codes to receive them and complete each complete call message information. have.

According to the present invention for achieving the above object, when the call message information corresponding to each cap code is distributed in an unfinished form and simultaneously received in a wireless call receiver having a plurality of cap codes, each cap code is identified and combined. A message processing apparatus for generating complete call message information corresponding to an external memory having a specific number of virtual memory blocks and an area for actually storing data of the virtual memory blocks, and a specific number corresponding to each virtual memory block. Message buffer has internal memory allocated, temporarily stores any received message packet in the corresponding message buffer, and if the message buffer overflows, the contents of the message buffer are assigned to a specific address of the corresponding virtual memory block. It is characterized by consisting of the main processing unit to transfer to.

1 is a view showing the structure of a digging method signal

2 is a diagram schematically illustrating a state in which a message received at a radio call receiver is stored in a memory using a single message buffer.

3 is a diagram showing a transmission signal form of the FLEX protocol basically

4 is a diagram showing a multiplexed transmission form of the FLEX protocol when the transmission rate is 3200bps

5 is a block diagram showing the configuration of a wireless call receiver to which the present invention is applied.

FIG. 6 is a diagram schematically illustrating a state in which a message received by a wireless call receiver according to an embodiment of the present invention is stored in a virtual memory using a plurality of message buffers.

7 is a flowchart illustrating a method of processing a signal received by a wireless page receiver according to an embodiment of the present invention.

FIG. 8 is a flowchart illustrating a processing process when the main processing unit receives an address packet from a decoder in FIG. 7; FIG.

FIG. 9 is a flowchart illustrating a processing process when the main processing unit receives a vector packet from a decoder in FIG. 7. FIG.

FIG. 10 is a flowchart illustrating a processing process when the main processing unit receives a message packet from a decoder in FIG. 7. FIG.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First of all, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals have the same reference numerals as much as possible even if displayed on different drawings. Also, in the following description, many specific details such as components of specific circuits are shown, which are provided to help a more general understanding of the present invention, and the present invention may be practiced without these specific details. It is self-evident to those of ordinary knowledge in Esau. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

In the present embodiment, 'calling message information' refers to the entire message that any caller sends to call a certain called party (wireless call receiver), and 'message packet' refers to a part of the whole. A 'fragment message' is a term indicating a case where one 'call message information' is received over two or more message fields.

3 is a diagram illustrating a transmission signal form basically provided by the FLEX protocol.

The FLEX protocol is a structure in which addresses, vectors, and messages are connected to each other. An address packet indicates a vector packet, and the vector packet indicates a message packet. That is, the vector packet indicates a word number of an associated message packet.

According to the FLEX protocol, one cycle is four minutes and consists of 128 frames, which transmit 15 cycles per hour. The first frame of the first of these 15 cycles is time-synchronized between the systems so that they are transmitted on time. Therefore, after each radio call receiver receives a signal according to a cycle and frame transmission time currently transmitted in a corresponding RF channel, it first determines whether there is a message sent to the user by checking a region. As a result of the determination, if there is no corresponding address, it immediately enters the battery saving mode.

The following Table 1 shows the sequence of transmitting data to a main processing unit (hereinafter referred to as MPU) by a decoder that interprets a signal of the FLEX protocol assuming a transmission rate of 3200bps.

Block Word number Phase A Phase C 0 0 BIW BIW One 2 3 Address 1 4 Address 2 Address 3 5 Vector1 Vector 3 6 Vector 2 Message 3-1 7 Message 1-1 Message 3-2 One 8 Message 1-2 9 Message 1-3 10 Message 2-1 11 Message 2-2 12 13 14 15

According to Table 1, address 1 and address 2 have the same phase, but address 3 has a different phase. However, data is transmitted one block at a time in phase, and the order of transmitting messages for the addresses is as follows.

That is, in the order of message 1-1 → message 3-1, message 3-2 → message 1-2, message 1-3 → message 2-1, and message 2-2. Thus, before the completion of message 1 (meaning one call message information consisting of message 1-1, message 1-2 and message 1-3), a message packet of other call message information is transmitted in the middle. In this embodiment, multiple memory buffers are used in parallel in order to recover a complete call message information without error by properly processing a message received after being split incompletely. Otherwise, when using a single memory buffer as in the prior art, one message (where the message means part of the entire call message information, that is, the message packet) is received, and then another message is received previously. Save the message in temporary storage, save the other message, and then continue with the previous message, save the other message in another temporary storage, find the previously saved temporary storage area, and so on. Not only does it require complex iterations, but it also requires several temporary storage areas.

4 is a diagram illustrating a multiplexed transmission method of the FLEX protocol assuming a transmission rate of 3200bps.

As shown, phase A and phase C cross each other and are transmitted, and decoder 12 interprets the signal in units of 32 bits and transmits the signal as shown in Table 1 above.

5 is a block diagram showing the configuration of a wireless call receiver to which the present invention is applied.

The RF unit 11 receives radio call information, and outputs radio call information converted into digital data by frequency conversion, demodulation, and waveform shaping. The decoder 12 detects address field data, vector field data, and message field data from the received signal, decodes the message field data, and converts the message field data into an original data form. The alarm unit 17 is a means for alarming in the form of a special tone, vibration, light flickering, or the like. The controller 13 processes the decoded data output from the decoder 12 so that an alarm sound according to the call is output and displayed. A frequency synthesizer 14 designates a channel of the RF unit 11 according to the channel data output from the controller 13. The memory 15 stores an EEPROM which stores unique address information and frame information allocated to the radio call receiver, a program that collectively controls the overall operation of the radio call receiver, and a ROM that stores initial data for executing the program. And a RAM for temporarily storing data generated when the control program is executed. The key input unit 10 is a user interface means and has a plurality of keys for inputting various operation commands and data necessary for the execution of the commands. The display unit 16 displays the message of the calling party and the status information of the radio call receiver by the display control signal output from the control unit 13.

FIG. 6 is a diagram schematically illustrating a state in which a message received by a wireless call receiver according to an embodiment of the present invention is stored in a virtual memory using a plurality of message buffers.

The message buffer and header area are provided in the internal memory 100. The virtual memory is provided in the external memory 200 for sufficient memory use when one message buffer capacity is small. In the present embodiment, it is assumed that there are four message buffers and four header blocks and four virtual memory blocks corresponding to each message buffer. Therefore, the variable idx shown is 0-3.

In the header [idx] area, the usage information (USE-S) of the message buffer [idx], the address index (AI) and the vector number (VEC #) detected from the received address packet, and the message number detected from the received vector packet ( MSG #), the number of message words (MSG.WNS), a pointer to a specific location in the message buffer (ptr), and the subblock location last.vir of the virtual memory block.

7 is a flowchart illustrating a method of processing a signal received by a wireless call receiver according to an embodiment of the present invention.

In step 7A, the variable idx is set to 0. In step 7B, it is checked whether the received signal is an address packet. If the check result is an address packet, the process proceeds to step 7C to perform a predetermined process (refer to FIG. 8 to be described later) for the received address packet. If it is not an address packet, it is checked whether the signal received in step 7D is a vector packet. If the check result is a vector packet, the process proceeds to step 7E to perform a predetermined process (as shown in FIG. 9) for the received vector packet. If it is not a vector packet, it is checked whether the signal received in step 7F is a message packet. If the check result is a message packet, the process proceeds to step 7G to perform a predetermined process (as shown in FIG. 10) for the received message packet.

FIG. 8 illustrates a process when the MPU 10 receives an address packet from the decoder 12 in FIG. 7.

Upon receiving the address packet, in step 8A, the usage information (USE-S) stored in the header [idx] area is checked. If the usage information (USE-S) is 1, the memory buffer [idx] is currently being used, and the process proceeds to step 8E to increase the variable idx by one. In step 8F, it is checked whether the variable idx is smaller than a specific number N (4 in this embodiment). If it is less than N, the process returns to step 8A. According to the present embodiment, this process may be repeated further, and then the header [3] is checked.

On the other hand, if the usage information (USE-S) is not 1, it is determined that the memory buffer [idx] is not currently used. In step 8B, the usage information (USE-S) of the header [idx] region is changed to 1 and stored. In step 8C, an address index AI and a vector number VEC # are detected from the received address packet. In step 8D, the detected address index AI and the vector number VEC # are stored in the header [idx] area. Here, the use information (USE-S) of '1' means that the memory buffer is currently in use, and '0' means that it is not in use.

FIG. 9 illustrates a process when the MPU 10 receives a vector packet from the decoder 12 in FIG. 7.

When the vector packet is received, it is checked whether the vector number (VEC #) of the header [idx] region stored in step 8D of FIG. 8 described above in step 9A matches the ID of the currently received vector packet. The ID is a 7-bit word number WN _{6 to} WN ₀ indicating a position where a vector word is received in the corresponding frame. The vector number VEC # also has the form of word numbers WN _{6 to} WN ₀ . Therefore, if the vector number (VEC #) and the ID of the vector packet match, in step 9B, the message number MSG # is detected from the vector packet and stored in the header [idx] area.

On the other hand, if the vector number (VEC #) and the ID of the vector packet do not match, the process proceeds to step 9D to increase the variable idx by one. Then, in step 9E, it is checked whether the variable idx is smaller than a certain number N (4 in this embodiment). If it is less than N, the process returns to step 9A. According to the present embodiment, this process may be repeated further, and then the header [3] is checked.

FIG. 10 illustrates a processing procedure when the MPU 10 receives a message packet from the decoder 12 in FIG. 7.

If the reception of the message packet is detected, it is checked in step 10A whether the MSG # of the header [idx] and the ID of the received message packet match. If the message number MSG # does not match the ID of the message packet, the process proceeds to step 10M to increase the variable idx by one. In step 10N, it is checked whether the variable idx is smaller than a specific number N (4 in the present embodiment). If it is less than N, the process returns to step 10A. According to the present embodiment, this process may be repeated further, and then the header [3] is checked.

On the other hand, if the message number MSG # and the ID of the message packet match, information bits of the message word included in the message packet at the ptr position of the message buffer [idx] in step 10B: i _{0 to} i ₂₀ ) are stored in byte units. The ptr is read from the header [idx] and has an initial state of 0. After storing the information bits of the message word, in step 10C, the ptr is increased by one, and it is checked whether the message buffer [idx] is overflowed. If an overflow occurs as a result of the check, the process proceeds to step 10E to read last.v in the header [idx], and calculates the address next.add of the corresponding virtual memory block as shown in Equation 1 below.

next.add = off.s + (idx × block.s) + last.v

Where off.s is an offset value representing the start position of the first virtual memory block in external memory. block.s represents the size of the virtual memory block [idx] corresponding to an arbitrary memory buffer [idx], and the variable last.v is a value representing the position of a sub block constituting one virtual memory block. 128 subbytes can be stored in the subblock. Therefore, the overflow occurs at the time when the reception of the message packet continues the byte-by-byte storage of the information bits of the message word and reaches 128 bytes.

After the calculation for the address next.add of the virtual memory is finished, the contents of the message buffer [idx] are moved to the virtual memory [next.add] in step 10F. Subsequently, in step 10G, the variable last.v of the header [idx] region is increased by one, and then, in step 10H, the pointer ptr of the header [idx] region is initialized to zero. On the other hand, if no overflow occurs, the process proceeds to step 10L and checks whether there are more information bits of the remaining message word that are not stored in the corresponding message packet, and returns to step 10B if there is any remaining one.

According to FIG. 6, off.s is '100' and block.s is '10'. If the first idx is '0' (in this case, last.v is also '0'), the contents of the memory buffer [0] are stored after storing two (first) or three bytes of message packets and exceeding 128 bytes. Transfer it to the corresponding virtual memory [100] and store it. This allows the memory buffer [0] to be reused when the next message packet is received.

After there are no remaining information bits in step 10L or after initializing the pointer ptr of the header [idx] region to 0 in step 10H, the number of message word numbers (MSG.WNS) of the header [idx] is decreased by one. Let it be. In step 10J, the message word number (MSG.WNS) is 0 and the fragment flag (FF) is 0. If the check result is 0, the USE-S of the header [idx] is initialized to 0 in step 10K. The number of message word numbers (MSG.WNS) can be detected in a vector packet, and the fragment flag (FF) is information contained in the first message packet of a message field. Information indicating whether or not received over the message field is detected and set in the header [idx].

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by the equivalents of the claims.

As described above, the present invention has a merit of restoring complete call message information by easily combining them by distinguishing them even when several call message information are distributed and transmitted in an incomplete state by simultaneously processing data using a plurality of buffers. . Also, if an overflow occurs in the memory buffer, the contents are moved to virtual memory, so if the internal memory is small, the external memory can be used as the internal memory, so that even if the call message information is long, their processing can be done quickly. have.

Claims (6)

When call message information corresponding to each cap code is received in a distributed form at the same time in a wireless call receiver having a plurality of cap codes, they are identified and combined to generate complete call message information corresponding to each cap code. In the message processing device, An external memory having a specific number of virtual memory blocks and an area for actually storing data of the virtual memory blocks; A specific number of message buffers corresponding to each virtual memory block have an internal memory allocated thereto, and temporarily store any received message packets in the corresponding message buffer, and if an overflow occurs in the corresponding message buffer, And a main processing unit which transfers the contents to a specific address of a corresponding virtual memory block and stores the contents. The method of claim 1, And said internal memory is a RAM. The method of claim 1, The internal memory further includes header areas corresponding to each message buffer, wherein each header area indicates whether the corresponding message buffer is in use. The method of claim 3, In each header area, a pointer indicating the usage information of the corresponding message buffer, the address index and vector number detected from the received address packet, the number of message numbers and message words detected from the received vector packet, and a specific position in the message buffer. And a subblock position of the virtual memory block. The method of claim 1, The wireless call receiver is characterized in that for receiving a message packet in a flex manner. The method of claim 1, The specific address of the virtual memory area is multiplied by the number indicating the number of the corresponding memory buffer area by the size of the virtual memory area corresponding to the memory buffer area, and then an offset indicating the start position of the first virtual memory area in the external memory. The apparatus is calculated by summing the number representing the positions of the sub-blocks forming the virtual memory block corresponding to the value.