KR100258143B1 - ADL 5 packet buffer management method - Google Patents

Abstract

PURPOSE: An AAL5 packet buffer management method is provided to efficiently implement packet segmentation and packet reassembly, which are the heart of the ATM Adaptation Layer5(AAL5) technology. CONSTITUTION: Each data packet is stored in a packet memory through a host bus. A software driver notifies a position of the data packet to SARA. The packet is divided in a cell and the divided cell is multiplexed by another packet. ATM cells are classified into virtual path identifier/ virtual channel identifier(VPI/VCI) values, which are stored on a packet base. A buffer is allocated to the S/W driver, when the SARA-R includes a cell with a new VPI/VCI value. A Cell with the same VPI/VCI values is stored additionally. During the receipt of the end of message cell, the cell is stored in the same buffer and the packet is transmitted to an application. The SARA-S in charge of the segmentation requests the buffer allocation with respect to the S/W driver for packet transmission by the processor. The processor allocates one buffer. The SARA-S transmits the packet to the buffer on a cell base. The SARA-S, after transmitting the all data, notifies the S/W driver of a packet transmission status to allow the buffer to be free.

Description

ADL 5 packet buffer management method

The present invention relates to the implementation of BISDN, and more particularly, to a packet buffer management method for efficiently implementing packet division and combination, which are the core of AAL5 technology.

Looking at the prior art as follows. Conventionally, as a core technology, ATM has been widely applied in the field of exchange and transmission.

Since the conventional buffer management method is a network interface in a local area network (LAN) environment, the buffer management between the processor and the LAN controller has been performed. Usually, the processor writes a packet to a stored memory and how to quickly carry the packet. It was about what could be.

The prior art as described above is presented in US Patent No. 5299313, Network interface with host independant buffer management, but has a problem in that the overhead is large.

The buffer management method proposed in the U.S. patent uses a transport descriptor buffer to store information about a packet, manages the buffer by pointing to a transmission data buffer using a structure in the buffer, and the same on the receiving side. I'm using the method.

When the packet is received from a network interface, a buffer descriptor is allocated from a software driver, the packet is stored in the allocated buffer descriptor, and the received descriptor is updated in a reception ring buffer managing the buffer script.

The buffer management is performed in two ways. The first is tx / rx descriptor ring buffer management, and the second is buffer management.

The descriptor ring buffer is a descriptor allocated for each packet, and the descriptors have information of a packet not yet transmitted. It also contains the data buffer address of the packet, the length of the data, the address of the data, and the information just sent.

The buffer management transmits the packets indicated by the descriptor buffer in order, and is written one by one since two 1.5K bytes of memory are used. The buffer management method is a configuration suitable for the characteristics of the LAN to be transmitted in order.

The problems in the prior art made as described above are summarized as follows.

First, there is a problem that the method of transmitting packets in the above order is not suitable due to the characteristics of ATM.

An ATM connection consisting of several connections must share resources with respect to the open connection, and the resource must be an ATM link and buffer management for the SARA S / R serving the function.

As described above, it is an important feature of the ATM characteristic that the cell transmission is made to be fair to the open connection. However, a method such as the patent [US Patent 5299313] is not suitable.

Second, when processing a packet one by one in a network for a high speed network, such as ATM, there is a performance problem because it is difficult to handle the overhead.

Third, there is a problem in that the descriptor buffer management is rather complicated because the conventional technology does not process multiple connections.

For the above reason, LAN communication chip is usually designed to process one packet one by one. However, chips such as SARA for ATM network basically need to handle several connections, so they only carry packets. The software driver is a small load.

The present invention was devised to solve the above problems of the prior art. First, all the communication between the SARA and the software driver is composed of a message, and the message is the number of the buffer descriptor that the SARA has. Through this, the location and length of the packet can be known, and the software driver can handle the delivered packet independently.

The multiple buffer descriptor numbers are accumulated in the CQ, and have a function of checking whether there are descriptors to be further processed by using a read / write pointer, and from time to time, SARA can start splitting new packets using the CQ. Similarly, the combination is also assigned by assigning a descriptor number for a new packet.

It is an object of the present invention to allow a SARA chip to simultaneously process packets for a plurality of connections.

Second, there is an interrupt in the communication method of the SARA to reduce the load of the CQ check of the software driver. When the difference between the read / write pointers indicates that the software driver should check the read / write pointer of the CQ from time to time. The purpose is to generate and notify an interrupt so that unnecessary polling of the software driver is eliminated.

Third, the communication between the SARA and the software driver using the message is a method suitable for a high speed network such as ATM, and aims to provide an environment in which the load of the software driver is minimized and the hardware can operate independently.

1 is a diagram of a typical AAL5.

2 is an operation diagram of a communication queue (CQ).

3 is a lookup procedure at the time of transmission.

4 is an investigation procedure upon reception.

One preferred embodiment of the AAL5 packet buffer management method according to the present invention created to achieve the object as described above,

Storing the data packet in the packet memory, and then dividing and combining the data packet in an ATM method;

Storing each data packet into a packet memory via a host bus;

Informing a SARA of a location of the data packet by a software driver;

Splitting the packet into a cell form to multiplex with cells divided from other packets;

Classifying the ATM cells to which the SARA-R, which is in charge of the combination, is multiplexed and applied are divided into VIP values and VCI values and stored in packet units;

Requesting a buffer allocation from a S / W driver for a new buffer when the SARA-R encounters a cell having a new VPI / VCI value;

Storing the received cell in the buffer;

Additionally storing a cell having the same VPI / VCI value among the cells;

Storing the cell in the same buffer and delivering a packet to an application when receiving an end of message cell with the VPI / VCI value;

Requesting a buffer allocation from a S / W driver to send a packet from a SARA-S in charge of the partitioning;

The processor allocating a buffer;

The SARA-S sending the packet to the buffer in units of cells; And

And informing the S / W driver of the packet transmission status in order to free the buffer after the SARA-S transmits all the data.

In the present invention, it is preferable to include a S / W driver for managing the packet buffer allocation for the partition and the buffer allocation for the combination,

It is preferable that the SARA-S exchanges packet descriptors with a host using PRQ and TCQ.

Preferably, the PRQ includes a PRQ_ST_ADR register, a PRQ_ED_ADR register, a PRQ_RD_PTR, and a PRQ_WR_PTR.

Preferably, the PRQ is resolved into a start address and an end address of the PCQ, a read pointer, and a write pointer.

Preferably, the SARA-R communicates with the SARA-R using FDQ, PCQ, and EQ (Exception Queue).

Preferably includes a CQ of the SARA-R consisting of a start address, a read pointer and a write pointer,

It is preferable that the PRQ for the division has a descriptor number,

Preferably, the descriptor number is information of a packet stored in a control memory, and one packet has one descriptor number.

It is preferable to find a control memory address with packet information by the descriptor number and extract the information through a defined structure.

The information has a VPI / VCI value, a packet memory address, and a packet size, and SARA-S preferably performs a partitioning process using the information.

A descriptor number is allocated from the software driver, and a bare memory address for storing the packet information is found through the descriptor number, and the VPI / VCI value, packet memory address, packet size, etc. required for the SARA-S are defined according to a structure defined. It is desirable to send one packet to ATM network by recording information of

Preferably, the software driver allocates one descriptor number and increments the write pointer of the PRQ after all the information has been written.

The process is transmitted to the information that there is a packet that needs to be split to SARA-S, and when the information is delivered, it is preferable that SARA-S divides itself, forms a cell, multiplexes it, and sends it to the ATM network.

After the sending operation is finished, it is preferable to update the state of the PCQ by increasing the read pointer of the PCQ, and increase the write pointer of the TCQ with a message indicating that it is finished to the S / W driver using the TCQ.

When the software driver interrupts, find the descriptor number using the write pointer of the TCQ, find the control memory address using the descriptor number, free the packet buffer, and deliver the packet to the application program.

In order to perform the above combination, it is preferable to receive a packet using FDQ and PCQ.

When the SARA-R receives a new cell, it is preferable to obtain which descriptor to write using the FDQ.

It is preferable to keep the descriptor number to be allocated when the FDQ always receives a new packet.

When the SARA-R is assigned a new scripter number, it is preferable to find a control memory address corresponding to the scripter number, to determine which packet memory address to start combining the cells with, and increase the write pointer of the FDQ.

In the above process, it is preferable that the SARA-R performs combinational intelligence on its own to combine and packetize cells into one place.

When one packet is formed, it is preferable to store a descriptor number in the write pointer of the PCQ and increase the write pointer using the PCQ.

Preferably, the increase in the PCQ write pointer is caused by switching to an interrupt by the SARA-R,

Preferably, the SARA-R does not generate an interrupt when the read pointer and write pointer of the PCQ are not equal to each other.

It is preferable to pass the packet to the application program and to increase the read pointer of the PCQ and to free the number corresponding to the predescriptor number.

Hereinafter, a detailed operation principle of the present invention will be described with reference to the drawings. 1 is a diagram of a typical AAL5.

As shown in FIG. 1, the SARA chipset of a transfer switch that performs the AAL5 function is composed of two control memories and two packet memories.

FIG. 2 is an operation diagram of CQ, FIG. 3 is a lookup procedure upon transmission, and FIG. 4 is a lookup procedure upon reception.

The software driver manages packet buffer allocation for partitioning and buffer allocation for combining, wherein the management implements communication with SARA-S using CQ as shown in FIG. 2, and the SARA-S implements PRQ ( Packet descriptors are sent to and received from the host using two queues: Packet Ready Queue (TCQ) and Transmit Complete Queue (TCQ).

The PRQ is composed of a PRQ_ST_ADR register, a PRQ_ED_ADR register, a PRQ_RD_PTR, and a PRQ_WD_PTR, and is pooled with a start address, an end address, a read pointer, and a write pointer of a PCQ. It is solved by the start and end addresses of, and the read and write pointers.

The SARA-R communicates with the SARA-R using three CQs, FDQ, PCQ, and EQ. The CQ configuration of the SARA-R is similar to the SARA-S, so that the start address, the end address, the read pointer, and the write pointer. Has

The PRQ for splitting has a descriptor number. The descriptor number is information of a packet stored in a control memory, and one packet has one descriptor number.

The descriptor number is used as a handle to the packet and all information can be found by the descriptor number.

First, it is possible to extract the information through a structure defined by finding a control memory address with packet information by the descriptor number, and the information is information such as a VPI / VCI value, a packet memory address, and a packet size. -S performs the partitioning process.

When one packet needs to be sent to the ATM network, one descriptor number is allocated from the software driver, and the VPI / VCI required for SARA-S according to the structure defined by finding the control memory address to carry the packet through the descriptor number. Information such as a value, a packet memory address, and a packet size should be recorded. The software driver allocates one descriptor number and increments the write pointer of the PRQ when all the information is recorded.

The above process is transmitted to SARA-R that there is a packet that needs to be split. From this point on, SARA-S divides itself, creates a cell, multiplexes it, sends it to the ATM network, and increases the read pointer of the PCQ to increase the state of the PCQ. The TCQ write pointer is incremented with a message indicating that it is up to the software driver to update and use the TCQ. The communication signal in the message is an interrupt.

When the interrupt occurs, the soft driver finds a descriptor number by looking at a write pointer of a TCQ, finds a control memory address using the descriptor number, and frees a packet buffer, and the packet is delivered to an application program.

In order to perform the combination, a packet is received using a free descriptor queue (FDQ) and a PCQ, and the SARA-R obtains which descriptor to use at the moment of receiving a new cell using the FDQ. The FDQ always keeps a descriptor number to be allocated when a new packet is received. When the SARA-R is assigned a new descriptor number, the FDQ finds a control memory address corresponding to the descriptor number and assigns a combination of the cells to a packet memory address. Determine whether to start, and increment the write pointer of the FDQ.

At this point, the SARA-R performs combinatorial intelligence by itself and combines the cells into one place to packetize them.When one packet is formed, the descriptor number is stored in the write pointer of the PCQ and the write pointer is incremented using the PCQ. In addition, the increase of the PCQ write pointer is generated by switching to an interrupt by SARA-R. Since the interrupt is relatively slow to process, the interrupt is generated every packet, which causes a large overhead and occurs in every packet. Context switches can cause more CPU load than necessary.

For the SARA-R, if the read pointer and write pointer of the PCQ are not equal to each other, no interrupt is generated. For the same reason as above, if the read pointer and the write pointer of the PCQ are different, the software driver knows that the packet is being processed and reads. We know that we'll compare the pointer to the record pointer.

This is because by observing the difference between the read pointer and the write pointer of the PCQ, it is possible to know whether to further process the packet of the descriptor number in the write pointer of the PCQ.

Using the above method, the software driver should always check the read pointer and write pointer of the PCQ to check whether the packet should be processed. The packet processing is the task of passing the received packet to an application program. The buffer corresponding to the descriptor number is freed by registering the job of incrementing the pointer and the descriptor number just processed in the FDQ.

According to the present invention configured as described above, a current pointer is prevented by using a method of preventing an interrupt for a received packet from occurring every time a packet is received and comparing a read / write pointer of a CQ until all packets have been processed. Has the effect of eliminating the use of).

Claims (25)

Storing the data packet in the packet memory, and then dividing and combining the data packet in an ATM method; Storing each data packet into a packet memory via a host bus; Informing a SARA of a location of the data packet by a software driver; Splitting the packet into a cell form to multiplex with cells divided from other packets; Classifying ATM cells multiplexed by SARA-R in charge of the combination into VPI / VCI values and storing them in packet units; Requesting a buffer allocation from a S / W driver for a new buffer when the SARA-R encounters a cell having a new VPI / VCI value; Storing the received cell in the buffer; Additionally storing a cell having the same VPI / VCI value among the cells; Storing the cell in the same buffer and delivering a packet to an application when receiving an end of message cell with the VPI / VCI value; Requesting a buffer allocation from a S / W driver to send a packet from a SARA-S in charge of the partitioning; The processor allocating a buffer; The SARA-S sending the packet to the buffer in units of cells; And a thirteenth step of informing the S / W driver of the packet transmission status in order to free the buffer after the SARA-S transmits all the data. The method according to claim 1, comprising a S / W driver for managing packet buffer allocation for the partitioning and buffer allocation for the combination. The method of claim 1, wherein the SARA-S exchanges packet descriptors with a host using PRQs and TCQs. 4. The method of claim 3, wherein the PRQ comprises a PRQ_ST_ADR register, a PRQ_ED_ADR register, a PRQ_RD_PTR, and a PRQ_WR_PTR. 5. The method according to claim 4, wherein the PRQ is solved with a start address and end address, a read pointer and a write pointer of the PCQ. The method according to claim 1, wherein the SARA-R uses FDQ, PCQ, and EQ (Exception Queue) in communication. 7. A method according to claim 1 or 6, comprising a CQ of the SARA-R consisting of a start address, a read pointer and a write pointer. The method according to claim 1, wherein the PRQ for partitioning has a descriptor number. The method according to claim 8, wherein the descriptor number is information of a packet stored in a control memory, and one packet has one descriptor number. 10. The method according to claim 8 or 9, wherein the control number is found by searching for a control memory address with packet information by the descriptor number and the information is extracted through a structure defined. The method according to claim 10, wherein the information has a VPI / VCI value, a packet memory address and a packet size, and the SARA-S performs a partitioning process using the information. 12. The VPI according to claim 1 or 11, wherein a descriptor number is allocated from the software driver and a bare memory address for storing the packet information is found through the descriptor number. AAL5 packet buffer management method for sending a packet to an ATM network by recording information such as / VCI value and packet memory address and packet size. 13. The method according to claim 12, wherein the software driver allocates one descriptor number and increments a write pointer of a PRQ after all the information has been written. 14. The AAL5 packet according to claim 13, wherein the process is conveyed to SARA-S with information that there is a packet that needs to be split now, and when the information is delivered, SARA-S divides itself, creates a cell, multiplexes it, and sends it to an ATM network. Buffer management method. 15. The method of claim 14, further comprising: updating the state of the PCQ by increasing the read pointer of the PCQ after the sending operation is finished, and increasing the write pointer of the TCQ with a message that the SQ driver is finished using a TCQ. , AAL5 packet buffer management method. 16. The software driver of claim 15, wherein when the interrupt occurs, the software driver finds a descriptor number using the write pointer of the TCQ, finds a control memory address using the descriptor number, frees a packet buffer, and delivers the packet to an application program. AAL5 packet buffer management method. The method according to claim 1, wherein a packet is received using FDQ and PCQ to perform the combination. 18. The method according to claim 1 or 17, wherein when the SARA-R receives a new cell, it obtains which descriptor to write using the FDQ. 19. The method according to claim 18, wherein the descriptor number to be allocated is always kept when the FDQ receives a new packet. 19. The method according to claim 1 or 18, wherein when the SARA-R is assigned a new scripter number, it finds a control memory address corresponding to the scripter number and determines which packet memory address to start combining the cells with. AAL5 packet buffer management method of increasing the write pointer. 21. The method of claim 20, wherein the SARA-R performs combinatorial intelligence by itself to combine and packetize cells into one location. 22. The method according to claim 1 or 21, wherein if one packet is formed, the descriptor number is stored in the write pointer of the PCQ and the write pointer is incremented using the PCQ. 23. The method according to claim 22, wherein an increase in the PCQ write pointer occurs by switching to an interrupt by SARA-R. 23. The method according to claim 22, wherein SARA-R does not generate an interrupt when the read pointer and write pointer of the PCQ are not equal to each other. 22. The method according to claim 1 or 21, wherein the operation of passing the packet to an application program and incrementing a read pointer of the PCQ and a number corresponding to a predescriptor number is freed.

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