KR100253360B1 - Low noise amplifier - Google Patents

Low noise amplifier Download PDF

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Publication number
KR100253360B1
KR100253360B1 KR1019970064554A KR19970064554A KR100253360B1 KR 100253360 B1 KR100253360 B1 KR 100253360B1 KR 1019970064554 A KR1019970064554 A KR 1019970064554A KR 19970064554 A KR19970064554 A KR 19970064554A KR 100253360 B1 KR100253360 B1 KR 100253360B1
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South Korea
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amplifier
nmos transistor
signal
drain
source
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KR1019970064554A
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Korean (ko)
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KR19990043541A (en
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하용해
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김영환
현대반도체주식회사
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier

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  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE: A low noise amplifier is provided which can be driven with small current to improve noise figure and integrated to reduce the chip size and whose gain can be controlled. CONSTITUTION: A low noise amplifier includes the first amplification unit(20) for reducing the noise figure of an input signal and amplifying the input signal, a gain controller(21) for controlling the gain of the amplified signal, the second amplifier(22) for amplifying the output signal of the gain controller, and a current generator(23) serving as a current source of the first and second amplifiers and the gain controller. The first amplifier is constructed in such a manner that the source of a PMOS transistor(P11) is connected to one end of a coil(L4) the other end of which is supplied with power voltage(VDD), and the drain of the PMOS transistor is coupled to the drain of an NMOS transistor(N11). Also, a coil(L2) one end of which is grounded is connected to the source of the NMOS transistor, and AC voltage is applied to the gates of the NMOS and PMOS transistors through a capacitor(Cin) and a coil(L1).

Description

저잡음증폭기{LOW NOISE AMPLIFIER}Low Noise Amplifiers {LOW NOISE AMPLIFIER}

본 발명은 저잡음증폭기에 관한 것으로, 특히 저전류로 동작하여 전력소모가 적으며 집적이 가능하고 또한 이득을 조절할 수 있는 900MHz 대역의 저잡음증폭기에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low noise amplifier, and more particularly, to a low noise amplifier operating in a low current, low power consumption, integration, and gain control of the 900MHz band.

도1은 일반적인 저잡음증폭기의 구성을 보인 회로도로서, 이에 도시된 바와같이 코일(

Figure pat00002
)의 일측에 교류전원(VIN)이 인가된 저항(
Figure pat00003
)을 접속하고, 상기 코일(
Figure pat00004
)의 타측에 바이어스전압(
Figure pat00005
)이 인가된 저항(
Figure pat00006
)을 접속하며, 그 접속점을 엔모스트랜지스터(N11)의 게이트에 접속하고,상기 엔모스트랜지스터(N11)의 드레인에는 전원전압(VDD)이 인가된 저항(
Figure pat00007
)을 접속하며, 상기 엔모스트랜지스터(N11)의 소스에는 일측이 접지된 코일(
Figure pat00008
)을 접속하고, 상기 엔모스트랜지스터(N11)의 드레인과 게이트 사이에 커패시터(
Figure pat00009
)를 접속하며, 또한 상기 엔모스트랜지스터(N11)의 소스와 게이트 사이에 커패시터(
Figure pat00010
)를 접속하여 구성되며, 이와같이 구성된 종래 장치의 동작을 설명한다.1 is a circuit diagram showing a configuration of a general low noise amplifier, as shown in FIG.
Figure pat00002
Resistance to which AC power (VIN) is applied to one side of
Figure pat00003
), And the coil (
Figure pat00004
On the other side of the
Figure pat00005
) Applied resistance (
Figure pat00006
), The connection point is connected to the gate of the NMOS transistor N11, and a resistor (A) to which a power supply voltage VDD is applied to the drain of the NMOS transistor N11.
Figure pat00007
) Is connected to the source of the NMOS transistor N11, and a coil having one side grounded (
Figure pat00008
) And a capacitor (B) between the drain and the gate of the NMOS transistor N11.
Figure pat00009
) And a capacitor (C) between a source and a gate of the NMOS transistor N11.
Figure pat00010
), The operation of the conventional apparatus configured as described above will be described.

먼저, 제1,제2 코일(

Figure pat00011
)(
Figure pat00012
)을 이용하여 소스저항()과 50
Figure pat00014
의 입력임피던스로 매칭시키는 데 이를 수식으로 표현하면 다음과 같다.First, the first and second coils (
Figure pat00011
) (
Figure pat00012
Source resistance using ) And 50
Figure pat00014
Matching with the input impedance of, expressed as a formula is as follows.

Figure pat00015
Figure pat00015

Figure pat00016
Figure pat00016

여기서,

Figure pat00017
은 엔모스트랜지스터(N11)의 트랜스컨덕턴스(Transconductance)이다.here,
Figure pat00017
Is the transconductance of NMOS transistor N11.

이때, 상기와 같은 매칭조건에서 저잡음증폭기의 노이즈 팩터를 수식으로 표현하면In this case, when the noise factor of the low noise amplifier under the matching conditions as described above

F=1+(8

Figure pat00018
)/(3
Figure pat00019
)이다.F = 1 + (8
Figure pat00018
) / (3
Figure pat00019
)to be.

한편, 커패시터(

Figure pat00020
)는 입력신호(VIN)에 대한 직류성분을 제거하고, 저항(
Figure pat00021
)에 걸린 전압(
Figure pat00022
)은 상기 엔모스트랜지스터(N11)의 바이어스를 잡아주며, 이에따라 상기 엔모스트랜지스터(N11)는 알에프신호를 입력받아 이를 소정 증폭비로 증폭하여 출력한다.Meanwhile, the capacitor (
Figure pat00020
) Removes the DC component of the input signal (VIN), and
Figure pat00021
)
Figure pat00022
) Holds the bias of the NMOS transistor N11. Accordingly, the NMOS transistor N11 receives an RF signal and amplifies it to a predetermined amplification ratio and outputs the amplified signal.

그러나, 상기와 같이 동작하는 종래 장치는 저잡음증폭기의 잡음지수를 작게 하기 위해서는 큰

Figure pat00023
값이 필요하나 이 값을 크게 하기 위해선 많은 드레인 전류를 흘려주어야 하는 문제점이 있었다.However, the conventional apparatus operating as described above is large in order to reduce the noise figure of the low noise amplifier.
Figure pat00023
Although a value is required, there is a problem in that a large drain current must be flowed in order to increase this value.

따라서, 상기와 같은 문제점을 감안하여 창안한 본 발명은 저전류로 동작하여 전력소모가 적으며 집적이 가능하고 또한 이득조절이 가능하도록 한 저잡음증폭기를 제공함에 그 목적이 있다.Accordingly, the present invention devised in view of the above problems has an object of providing a low noise amplifier which operates at a low current, allows for low power consumption, integration, and gain control.

도1은 일반적인 저잡음증폭기의 구성을 보인 회로도.1 is a circuit diagram showing the configuration of a general low noise amplifier.

도2는 본 발명 저잡음증폭기의 구성을 보인 회로도.Figure 2 is a circuit diagram showing the configuration of the low noise amplifier of the present invention.

*****도면의 주요부분에 대한 부호의 설명********** Description of the symbols for the main parts of the drawings *****

20:제1 증폭부 21:게인조절부20: first amplifier 21: gain control unit

22:제2 증폭부 23:전류발생부22: second amplifier 23: current generator

상기와 같은 목적을 달성하기 위한 본 발명은 입력신호의 잡음지수를 감소시킴과 아울러 증폭하는 제1 증폭부와, 상기 제1 증폭부의 증폭신호의 게인을 조절하는 게인조절부와, 상기 게인조절부의 출력신호를 다시 증폭하는 제2 증폭부와, 상기 제1,제2 증폭부와 게인조절부의 전류소스로 동작하는 전류발생부로 구성된 저잡음 증폭기에 있어서, 상기 제1 증폭기는 피모스트랜지스터(P11)의 소스를 전원전압(VDD)이 일측에 인가된 코일(L4)의 타측에 접속하고, 상기 피모스트랜지스터(P11)의 드레인을 엔모스트랜지스터(N11)의 드레인에 접속하며, 상기 엔모스트랜지스터(N11)의 소스에 일측이 접지된 코일(L2)이 접속되고, 상기 엔모스트랜지스터(N11) 및 피모스트랜지스터(P11)의 게이트에 교류전원이 커패시터(Cin) 및 코일(L1)을 통해 인가되도록 구성한 것을 특징으로 한다.The present invention for achieving the above object is a first amplification unit for reducing and amplifying the noise index of the input signal, a gain control unit for adjusting the gain of the amplified signal of the first amplification unit, the gain control unit A low noise amplifier comprising a second amplifier for amplifying an output signal again, and a current generator for operating as a current source of the first and second amplifiers and the gain control unit, wherein the first amplifier is a PMOS transistor P11. A source is connected to the other side of the coil L4 to which the power supply voltage VDD is applied to one side, and the drain of the PMOS transistor P11 is connected to the drain of the NMOS transistor N11, and the NMOS transistor N11. A coil L2 having one side grounded to the source of the C1 is connected, and an AC power is applied to the gates of the NMOS transistor P11 and the PMOS transistor P11 through a capacitor Cin and a coil L1. Characteristic It is done.

이하, 본 발명에 의한 저잡음증폭기에 대한 작용 및 효과를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, the operation and effect of the low noise amplifier according to the present invention will be described in detail with reference to the accompanying drawings.

도2는 본 발명 저잡음증폭기의 구성을 보인 회로도로서, 이에 도시한 바와같이 신호를 입력받아 그 신호의 잡음지수(NOISE FACTOR)를 감소시킴과 아울러 증폭하는 제1 증폭부(20)와; 상기 제1 증폭부(20)의 증폭신호를 입력받아 그 증폭신호의 게인을 조절하는 게인조절부(21)와; 상기 게인조절부(21)로부터 신호를 입력받아 이를 다시 증폭하는 제2 증폭부(22)와; 상기 제1,제2 증폭부(22)와 게인조절부(21)의 전류소스로 동작하는 전류발생부(23)로 구성한다.FIG. 2 is a circuit diagram showing the configuration of the low noise amplifier of the present invention, and as shown therein, a first amplifying unit 20 which receives a signal and reduces and amplifies a noise index of the signal; A gain adjusting unit 21 for receiving an amplified signal of the first amplifying unit 20 and adjusting gain of the amplified signal; A second amplifier 22 which receives a signal from the gain controller 21 and amplifies it again; The first and second amplifiers 22 and the gain control unit 21 is composed of a current generator 23 that operates as a current source.

상기 제1 증폭부(20)는 피모스트랜지스터(P11)의 소스를 일측에 전원전압(VDD)이 인가된 코일(L4)을 접속하고, 상기 피모스트랜지스터(P11)의 드레인을 일측이 접지(VSS)된 코일(L2)이 소스에 접속된 엔모스트랜지스터(N11)의 드레인을 접속하며, 상기 엔모스트랜지스터(N11) 및 피모스트랜지스터(P11)의 게이트에 교류전원을 커패시터(Cin) 및 코일(L1)을 통해 인가받도록 구성한다.The first amplifier 20 connects the source of the PMOS transistor P11 to a coil L4 to which a power supply voltage VDD is applied, and the drain of the PMOS transistor P11 is grounded. The VSS coil L2 connects the drain of the NMOS transistor N11 connected to the source, and the AC power is supplied to the gates of the NMOS transistor N11 and the PMOS transistor P11. Configure to be authorized through (L1).

상기 게인조절부(21)는 제어전압(VAGC)을 게이트에 인가받는 엔모스트랜지스터(N12)의 드레인에 상기 제1 증폭부(20)의 증폭신호가 인가되고, 이 증폭신호가 게이트에 인가되고 소스가 코일(L3)을 통해 접지(VSS)된 엔모스트랜지스터(N13)의 드레인에 상기 엔모스트랜지스터(N12)의 소스를 접속하여, 그 접속점에서 신호가 발생되도록 구성하며, 이와같이 구성한 본 발명 저잡음증폭기의 일실시예의 동작을 설명하면 다음과 같다.The gain adjusting unit 21 receives an amplification signal of the first amplifying unit 20 to the drain of the NMOS transistor N12 to which the control voltage VAGC is applied to the gate, and the amplifying signal is applied to the gate. The source of the NMOS transistor N12 is connected to the drain of the NMOS transistor N13 whose source is grounded (VSS) through the coil L3, so that a signal is generated at the connection point. Referring to the operation of one embodiment of the amplifier as follows.

먼저, 제1 증폭부(20)의 커패시터(Cin)에 입력되는 알에프신호는 제1,제2 코일(L1),(L2)에 의해 50

Figure pat00024
입력임피던스로 매칭된다.First, the RF signal input to the capacitor Cin of the first amplifying unit 20 is 50 by the first and second coils L1 and L2.
Figure pat00024
Matches input impedance.

이때, 제1 증폭부(20)의 엔모스트랜지스터(N11)의 드레인에 흐르는 전류를 줄이고

Figure pat00025
값을 크게하여 잡음지수(NOISE FACTOR)를 감소한다.At this time, the current flowing in the drain of the NMOS transistor N11 of the first amplifier 20 is reduced.
Figure pat00025
Increase the value to decrease the noise factor.

여기서, 저잡음증폭기의 잡음지수(NOISE FACTOR)는 증폭기의 이득에 반비례하는데, 이를 수식으로 표현하면 다음과 같다.Here, the noise figure of the low noise amplifier (NOISE FACTOR) is inversely proportional to the gain of the amplifier, which is expressed as follows.

Figure pat00026
Figure pat00026

즉, 엔모스트랜지스터(N) 1개를 이용하였을 때 이득이

Figure pat00027
이라면 엔모스트랜지스터(N)의 W/L을 반으로 줄이면 드레인에 흐르는 전류는 반으로 줄어들지만
Figure pat00028
은 거의 2배가 되므로 잡음지수(NOISE FACTOR)를 줄일수 있다.That is, when one NMOS transistor N is used, the gain
Figure pat00027
If you reduce the W / L of the NMOS transistor by half, the current flowing in the drain is reduced by half.
Figure pat00028
Is nearly doubled, thus reducing the noise factor.

따라서, 알에프 입력신호는 커피시터(Cin) 및 코일(L1)을 통해 엔모스트랜지스터(N11)의 게이트에 인가되어 이 입력신호의 변화는 상기 엔모스트랜지스터(N11)의 게이트신호의 변화로 이어지며, 이에따라 상기 엔모스트랜지스터(N11)의 드레인에 인가된 전압을 변화시킨다.Therefore, the RF input signal is applied to the gate of the NMOS transistor N11 through the coffee sheet Cin and the coil L1, and the change of the input signal leads to the change of the gate signal of the NMOS transistor N11. Accordingly, the voltage applied to the drain of the NMOS transistor N11 is changed.

이후, 상기 엔모스트랜지스터(N11)의 드레인측 출력성분의 변화는 게인조절부(21)의 엔모스트랜지스터(N13) 게이트에 인가되어 이 엔모스트랜지스터(N13)의 드레인측 출력신호를 변화시킨다.Subsequently, a change in the drain side output component of the nMOS transistor N11 is applied to the gate of the NMOS transistor N13 of the gain control unit 21 to change the drain side output signal of the NMOS transistor N13.

이때, 상기 엔모스트랜지스터(N13)의 드레인측 출력신호의 변화는 제어전압(VAGC)에 따라 포화(Saturation)된 엔모스트랜지스터(N12)에 의해 상기 엔모스트랜지스터(N11)로 피이드백되며, 이에따라 상기 제어전압(VAGC)을 가변하여 피이드백되는 신호량을 변화시켜서 상기 엔모스트랜지스터(N11)의 드레인측에서 발생하는 알에프 신호성분의 증폭도를 조절한다.At this time, the change of the drain-side output signal of the NMOS transistor N13 is fed back to the NMOS transistor N11 by the NMOS transistor N12 saturated according to the control voltage VAGC. The amplification degree of the RF signal component generated at the drain side of the NMOS transistor N11 is adjusted by varying the amount of signal fed back by varying the control voltage VAGC.

이후, 상기 게인조절부(21)의 엔모스트랜지스터(N13)로부터 출력되는 신호는 제2 증폭부(22)의 엔모스트랜지스터(N14) 게이트에 인가되며, 이 신호는 상기 엔모스트랜지스터(N14)의 증폭도에 따라 증폭된 신호로 출력된다.Subsequently, a signal output from the NMOS transistor N13 of the gain adjusting unit 21 is applied to the NMOS transistor N14 gate of the second amplifier 22, and the signal is applied to the NMOS transistor N14. The signal is amplified according to the amplification degree of.

이때, 전류발생부(23)의 엔모스트랜지스터(N15) 및 피모스트랜지스터(P12~P14)는 전류미러로 작용하여 안정된 전류를 흘러준다.At this time, the NMOS transistor N15 and the PMOS transistors P12 to P14 of the current generator 23 act as a current mirror to flow a stable current.

이상에서 상세히 설명한 바와같이 본 발명은 집적도를 향상시켜 칩의 크기를 줄일 수 있고, 저전력으로 잡음지수를 개선할 수 있으며, 또한 이득조절이 가능한 효과가 있다.As described in detail above, the present invention can reduce the size of the chip by improving the integration degree, improve the noise figure with low power, and gain control.

Claims (2)

입력신호의 잡음지수를 감소시킴과 아울러 증폭하는 제1 증폭부와, 상기 제1 증폭부의 증폭신호의 게인을 조절하는 게인조절부와, 상기 게인조절부의 출력신호를 다시 증폭하는 제2 증폭부와, 상기 제1,제2 증폭부와 게인조절부의 전류소스로 동작하는 전류발생부로 구성된 저잡음 증폭기에 있어서, 상기 제1 증폭기는 피모스트랜지스터(P11)의 소스를 전원전압(VDD)이 일측에 인가된 코일(L4)의 타측에 접속하고, 상기 피모스트랜지스터(P11)의 드레인을 엔모스트랜지스터(N11)의 드레인에 접속하며, 상기 엔모스트랜지스터(N11)의 소스에 일측이 접지된 코일(L2)이 접속되고, 상기 엔모스트랜지스터(N11) 및 피모스트랜지스터(P11)의 게이트에 교류전원이 커패시터(Cin) 및 코일(L1)을 통해 인가되도록 구성한 것을 특징으로 하는 저잡음증폭기.A first amplifier for reducing and amplifying the noise index of the input signal, a gain controller for controlling gain of the amplified signal of the first amplifier, a second amplifier for amplifying the output signal of the gain controller; A low noise amplifier comprising a current generator that operates as a current source of the first and second amplifiers and a gain control unit, wherein the first amplifier applies a source of the PMOS transistor P11 to one side of the power supply voltage VDD. The other end of the coil L4, the drain of the PMOS transistor P11 is connected to the drain of the NMOS transistor N11, and the coil L2 having one side grounded to the source of the enMOS transistor N11. ) Is connected, and the AC power is applied to the gate of the NMOS transistor (N11) and the PMOS transistor (P11) through a capacitor (Cin) and a coil (L1). 제1 항에 있어서, 게인조절부는 제어전압(VAGC)을 게이트에 인가받는 엔모스트랜지스터(N12)의 드레인에 상기 제1 증폭부의 증폭신호가 인가되고, 이 증폭신호가 게이트에 인가되고 소스가 코일(L3)을 통해 접지(VSS)된 엔모스트랜지스터(N13)의 드레인에 상기 엔모스트랜지스터(N12)의 소스를 접속하여, 그 접속점에서 신호가 발생되도록 구성한 것을 특징으로 하는 저잡음증폭기.The amplification signal of the first amplification unit is applied to the drain of the NMOS transistor N12 that receives the control voltage VAGC to the gate, the amplification signal is applied to the gate, and the source is coiled. And a source of the MOS transistor (N12) connected to a drain of the NMOS transistor (N13) grounded through (L3), so that a signal is generated at the connection point thereof.
KR1019970064554A 1997-11-29 1997-11-29 Low noise amplifier KR100253360B1 (en)

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US10238266B2 (en) 2003-06-17 2019-03-26 Whirlpool Corporation Dishwasher

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10238266B2 (en) 2003-06-17 2019-03-26 Whirlpool Corporation Dishwasher

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