KR100250982B1 - Mpeg-2 system multiplexer - Google Patents

Abstract

PURPOSE: An MPEG-2 system multiplexing apparatus is provided to multiplex two programs at the same time and to be directly connected with a personal computer by embedding PCI I/O bus. CONSTITUTION: The first and second rate control parts(10,20) take charge of interface with a video and audio encoder, and an additional data generator. A parameter generating part(30) stores various parameters for operation of a multiplexing apparatus and is changeable by a user through the outside and a PC. A multiplex control part(40) receives various data from an element having data interface for generating data and a control signal required for generating a stream to be outputted. A CRC process part(50) searches errors of transmitting data. A transport stream data generating part(60) generates bit stream having the size of 188 bytes by using video and audio buffer data, user and network information buffer data generated from the first and second rate control part, and various coding information generated from the parameter generating part(30) and the multiplex control part(40), and inserts CRC data into transport stream data generated by interfacing with the CRC process part(50). A transport stream data output rate control part(80) controls output rate for outputting the stream generated at the transport stream data generating part(60). A transport stream data output buffer(70) receives and stores the stream transformed at the transport stream data generating part(60) and outputs data having regular rate according to the control of the output rate control part(80). An interface part(90) takes charge of interface with the PC and the other control devices for receiving control data, parameter data, and user data of the multiplexing apparatus.

Description

MPEG-2 system

The present invention relates to an MPEG-2 system multiplexing device, which is capable of multiplexing a plurality of programs simultaneously and directly connecting a personal computer with a built-in PCI I / O bus. (DTV), high-definition television (HDTV), video-on-demand (VOD) system, video conferencing codec system and broadband ISDN terminal codec system is applicable to all systems using the MPEG codec system.

There is no specific implementation of the multiplexing device in the current image processing system, and in particular, there is no circuit for multiplexing two or more programs.

In addition, until now, the multiplexing device has been developed to be used in a transmission system, etc., but at present, there is no multiplexing device applicable to the most common computer.

The present invention proposes to control and transmit various information by adopting the PCI bus which is the main bus of the computer.

In view of the conventional requirements as described above, the present invention allows a PCI bus to be directly embedded in a motherboard for control and various data processing in a PC-like environment, and does not use a PCI bus. In this case, it is an object of the present invention to provide a multiplexing device capable of accommodating both PCI I / O and a general host bus by allowing the external device to be controlled through a separate module.

1 is an overall block diagram of a multiplexing device implemented by the present invention.

FIG. 2 is a detailed block diagram of the rate controller of FIG. 1; FIG.

3 is a detailed block diagram of a synchronization signal generator of FIG. 1;

4 is a detailed block diagram of the PCI I / O interface unit of FIG.

<Description of Symbols for Major Parts of Drawings>

10, 20: rate control unit 11: rate control signal generator

12: DTS / PTS processing unit 13: Pipo

30: parameter generator 31: synchronization signal generator

31a to 31f: counter 40: multiplexed control unit

50: CRC processing unit 60: transport stream data generation unit

70: transport stream data output buffer

80: transport stream data output rate control unit

In order to achieve the above object, a multiplexing device configuration implemented in the present invention includes a rate control unit in charge of an interface with a video, audio encoder, and additional data generating device;

A parameter generating unit for storing various parameters for the operation of the multiplexing device and allowing a user to change parameter information through an external device and a PC;

A multiplexing control unit for generating data and control signals required for generating a stream for receiving and outputting various data from means having a data interface;

A cyclic redundancy circuit (CRC) processor for error retrieval of transmission data;

A transport stream data generator for generating a bit stream to be transmitted using data in the rate controller, user and network information buffer data, and various coding information generated by the parameter generator and the multiplexing controller;

A transport stream data output rate control unit controlling an output rate for outputting the stream generated by the transport stream data generation unit;

A transport stream data output buffer for receiving and storing a stream converted by the transport stream data generation unit through the transport stream data output rate control unit and outputting data having a constant rate under the control of the output rate control unit;

It is characterized in that it comprises an interface unit that takes charge of the interface with the PC and other control devices to receive the control data, parameter data and user data of the multiplexing device.

The above objects, features, and advantages will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The multiplexer circuit of the present invention is designed based on the ISO / IEC 13818-1 system unit, and has a variety of information such as video and audio data and user data in a single bitstream form of the syntax of the ISO / IEC 13818-1 system unit. Create according to.

Here, the data input through the first input unit is composed of video, audio and user data, and interfaces with the video and audio encoder device to receive the data.

At this time, the rate control between the encoder device and the interface is required. In the present invention, the chip is designed to perform a mast / slave function, and the program data and various information can be inserted using a PCI bus. Design to control the function of the multiplexing device.

1 is an overall block diagram of a multiplexing device implemented by the present invention, comprising: first and second rate control units 10 and 20 for interfacing with video, audio encoders and additional data generating devices;

A parameter generator 30 which stores various parameters for the operation of the multiplexing device and which can be changed by a user through an external device and a PC;

A multiplexing control section 40 for generating data and control signals required for generating a stream for receiving and outputting various data from means having a data interface;

A cyclic redundancy circuit (hereinafter referred to as CRC) processing unit 50 for error retrieval of transmission data;

188 bytes using various coding information generated by the video and audio buffer data, the user and network information buffer data (NIT), the parameter generator 30 and the multiplexing controller 40 in the rate controllers 10 and 20. A transport stream data generation unit (60) for generating a bit stream having a size and inserting CRC data into transport stream data generated by interfacing with the CRC processing unit (50);

A transport stream data output rate controller (80) for controlling an output rate to output a stream generated by the transport stream data generator;

After receiving and storing the stream converted by the transport stream data generation unit 60 through the transport stream data output rate control unit 80, outputting data having a constant rate under the control of the output rate control unit 80. A transport stream data output buffer 70;

It is configured to include an interface unit 90 in charge of the interface with the PC and other control device to receive the control data, parameter data and user data of the multiplexing device.

Hereinafter, the structure and operation of each component will be described in detail.

Each rate control unit (10, 20) includes a rate control signal generator (11) for generating a control signal for rate control with reference to the parameter value stored in the parameter generator (30) as shown in FIG.

A decoding start point (hereinafter referred to as a DTS) signal and a display start point (hereinafter referred to as a PTS) for establishing synchronization when decoding compressed video and audio stream data input according to the control signal output from the rate control signal generator 11. A DTS / PTS processor 12 which generates a signal;

It includes a PIPO 13 for storing the video, audio and additional data input through the rate control signal generator 11, this configuration is also the same as the second rate controller 20.

Similarly, the configuration of the transport stream data output rate control unit 80 has the same configuration except that the decoding start point DTS signal and the display start point PTS are not generated in the configuration of the rate control unit 10.

The rate control unit 10 as described above is used to generate transport stream data such as a buffer state, compressed data, and a header information insertion position for multiplexing in the multiplexing control unit 40 and the transport stream data generating unit 60 in the multiplexing circuit. It serves to pass various data.

The parameter value stored in the parameter generator 30 is a value input by the user through the interface unit 90 as described above, and can be customized at any time.

The stored parameter values are referred to when the multiplexing control unit 40 and the transport stream data generating unit 60 generate the multiplexed bitstream data.

The parameter generator 30 is roughly divided into control and reference parameter values. The reference register file includes the rate controllers 10 and 20, the multiplexing controller 40, and the transport stream data generator 60. ) Stores the reference parameter values required by.

The control register consists of two 16-bit sizes (not shown), and the information stored in this register file is always monitored by the host, which is output through the PCI bus at the request of the host.

In addition, a synchronization signal generator 31 is included in the parameter generator 30. The multiplexing circuit is provided to a program to achieve random access and system synchronization of a decoder as defined in the ISO / IEC 13818-1 system part standard. Special data for the PSI bitstream data and PCR data for the clock information of the multiplexing circuit should be transmitted at periodic time intervals.

In addition, periodic transmission of EMM and ECM information, which is information about scrambling, is also required.

The synchronization signal generator 31 transmits the generation time point of the periodic transport data to the controller, and as shown in FIG. 3, the synchronization signal generator 31 receives various parameter values PSI_init_value-load to P2PCR_init_value. The counters are counted through the counters 31a to 31g to output the flag PSI_start_flag to P2PCR_start_flag values to the multiplexing control unit 40.

And the parameter value can be defined by the user using the PCI can change the generation cycle.

The multiplexing control unit 40 receives data from each unit in the multiplexing device and processes the following.

-Determine the packet number (PID: Packet ID) according to the priority.

Manage PID version and continuity.

Determine the PID head, adaptation field, Payload Parameter and data.

Determine the structure of Packet Elementary Stream (PES) data.

Determine the size of stuffing, pointer, section, and adaptation field.

Determine the type of user data over PCI I / O.

The CRC processing unit 50 generates a code using a polynomial such as Equation 1 below to generate a CRC code.

<Equation 1>

x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1

The interface unit 90 includes a PCI I / O interface unit 91 for receiving a parameter value input through a PC as shown in FIG. 4;

A PCI controller 92 for receiving a parameter value input from another controller other than the PC;

A plurality of multiplexers 93 for selectively outputting various parameter values input through the interface units 91 and 92;

A pipette 94 for NIT for storing NIT data;

User pipo 95 for storing user data; And

And a status register 96 for storing the states of the respective PIPOs 94 and 95.

The interface unit 90 configured as described above may select a PCI I / O bus and a general data bus using an external port for inputting control register information.

Host data (data input into control, reference, and multiplexed stream data input from a personal computer) includes multiplexing device control and parameter data and EMM, ECM, NIT, and other user data.

The host checks whether the current data interface is possible by referring to the control register existing in the parameter generator 30 in the EMM, ECM, NIT, and other user data interfaces, and first assigns to the control register what information is transmitted.

In each of the buffers, the NIT pipeo 94 is required to be specially designed because the NIT data of the PSI information is information for generating periodic transport stream data, unlike other host data. 95) interfaces all host data except NIT data.

In the operation process of the multiplexing apparatus of the present invention configured as described above, when data is input from the encoder apparatus through each rate control unit 10, 20, the multiplexing control unit 40 stores various parameters stored in the parameter generating unit 30. Reference is made to the data and control signals required to generate the input data into the stream.

Then, the data is input to the transport stream data generator 60 and converted into an output stream under the control of the control signal, and the converted transport stream data is temporarily stored in the transport stream data output buffer 70 and then In order to output a constant rate, data is output at the request of the transport stream data output rate control unit 80.

As described above, when data is inputted in the transport stream data output buffer 70 at a predetermined rate, the data is transmitted to the outside through the control of the transport stream data output rate control unit 80.

As described in detail above, the present invention is an implementation of the system part of ISO / IEC 13818-1 MPEG, which can multiplex two programs at the same time, and has a built-in PCI I / O bus, so it can be directly connected to a personal computer. Entails.

In addition, a preferred embodiment of the present invention is disclosed for the purpose of illustration, those skilled in the art will be able to make various modifications, changes, additions, etc. within the spirit and scope of the present invention, such modifications and modifications belong to the following claims You will have to look.

Claims (7)

A rate control unit for interfacing with the video, audio encoder and additional data generating device; A parameter generating unit for storing various parameters for the operation of the multiplexing device and allowing a user to change parameter information through an external device and a PC; A multiplexing control unit for generating data and control signals required for generating a stream for receiving and outputting various data from means having a data interface; A cyclic redundancy circuit (CRC) processor for error retrieval of transmission data; A transport stream data generator for generating a bit stream to be transmitted using data in the rate controller, user and network information buffer data, and various coding information generated by the parameter generator and the multiplexing controller; A transport stream data output rate control unit controlling an output rate for outputting the stream generated by the transport stream data generation unit; A transport stream data output buffer for receiving and storing a stream converted by the transport stream data generation unit through the transport stream data output rate control unit and outputting data having a constant rate under the control of the output rate control unit; An MPEG-2 system multiplexing device, comprising: an interface unit for interfacing with a PC and another control device to receive control data, parameter data, and user data of the multiplexing device. The method of claim 1, The rate controller may include a rate control signal generator for generating a control signal for rate control by referring to parameter values stored in the parameter generator; A DTS / PTS processor for generating a decoding start point (DTS) signal and a display start point (PTS) signal for establishing synchronization when decoding the compressed video and audio stream data input according to the control signal output from the rate control signal generator; , A first rate controller configured to include a pipo for storing video, audio, and additional data input through the rate control signal generator; And a second rate controller configured to have the same configuration as that of the first rate controller, so that a plurality of encoders can be interfaced in one multiplexer. The method of claim 1, The parameter generator comprises: a reference register for storing reference parameter values required by the rate controller, the multiplexing controller, and the transport stream data generator; A control register that monitors information output by the host in response to a request of the host; And An MPEG-2 system multiplexing device comprising a synchronization signal generator for transmitting a generation time point of periodic transport data to a control unit. The method of claim 1, The multiplexing control unit receives data from each unit to determine a packet number (PID) according to priority; Manage PID version, continuity; Determine PID heads, adaptation fields, payload parameters and data; Determine a structure of packet asset stream (PES) data; Determine the size of the stuffing, pointer, section, adaptive field; An MPEG 2 (MPEG-2) system multiplexing device, characterized in that it determines the type of user data via PCI I / O. The method of claim 1, And a transport stream data generation unit interfaces with the CRC processing unit to insert and transmit CRC data in the generated transport stream data. The method of claim 1, The transport stream data output rate controller may include a rate control signal generator 11 which generates a control signal for rate control by referring to parameter values stored in the parameter generator; A DTS / PTS processor for generating a decoding start point (DTS) signal and a display starting point (PTS) signal for establishing synchronization when decoding video and audio signals using the control signal output from the rate control signal generator 11; And a PIPO for storing video, audio, and additional data input through the rate control signal generator (11). The method of claim 1, A PCI I / O interface unit for receiving a parameter value input through the interface unit PC; A PCI controller for receiving a parameter value input from another communication device other than the PC; A plurality of muxes for selectively outputting various parameter values input through each interface unit; A pipette for NIT for storing NIT data; User pipo for storing user data; And And a status register for storing the states of the respective PIPOs, which can be used for both a transmission system and a PC.

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