KR100244638B1 - Frost monitoring device of phase shift detector - Google Patents

Abstract

A phase difference detector image detection and monitoring circuit comprising: a reference signal divider for dividing a reference signal, a differential and a synchronous signal generator for differentiating a divided signal output from the reference signal divider to generate a synchronization signal, and the reference signal A first waveform shaping unit for waveform shaping the reference signal output from the voltage dividing unit, a toggle signal generator for generating a toggle signal in response to the output signal of the waveform shaping unit, and comparing the toggle signal with the reference signal to form an image A reference signal imaging detector for outputting a signal, a reference signal imaging alarm unit for receiving an alarm for an imaging presence signal from the reference signal imaging detection unit, and a reference signal for counting and displaying an imaging presence signal from the reference signal imaging detection unit. An imaging coefficient and display unit, a measurement signal divider for dividing the measurement signal, and a measurement signal divider A second waveform shaping unit for waveform shaping a measurement signal, an integration circuit for integrating the output signal of the second waveform shaping unit, a sample end holding unit for receiving a sample and holding the signal output from the integrating circuit, and the sample; A third waveform shaping unit configured to waveform-shape the signal output from the end holding unit, a measurement signal imaging detector which receives a toggle signal of the toggle signal generating unit and a signal of the third waveform shaping unit and outputs an imaging presence signal, and the measurement The measurement signal phase detection alarm unit receives an imaging phase presence signal from the signal phase detection unit and alarms the signal, and the reference signal phase coefficient and display unit receives and counts the phase loss signal from the measurement signal phase detection unit. By monitoring the number of missing phases and the number of missing phases of the measurement signal, it is possible to quickly identify the cause of failure of the equipment. This period can be shortened to improve the safety of the facility.

Description

Phase detection circuit of phase difference detector

1 is a circuit diagram of an imaging monitoring circuit according to the present invention.

2 is a circuit diagram of a reference signal divider, a differential circuit, and a synchronization signal generator according to the present invention.

3 is a circuit diagram of a first waveform shaping section and a toggle signal generating section according to the present invention.

4 is a circuit diagram of a reference signal imaging detection unit and an imaging alarm unit according to the present invention.

5 is a circuit diagram of a measurement signal divider and a second waveform shaping unit according to the present invention.

6 is a circuit diagram of an integration circuit and a sample and holding unit according to the present invention.

7 is a circuit diagram of a third waveform shaping unit and a measurement signal imaging detection unit according to the present invention.

8 is a circuit diagram of an imaging coefficient unit and an imaging frequency display unit according to the present invention.

9 is a timing chart of an imaging monitoring circuit according to the present invention.

* Explanation of symbols for main parts of the drawings

1: reference signal divider 2: differential circuit

3: synchronization signal generator 4: first waveform shaping unit

5: toggle signal generator 6: reference signal imaging detector

7: imaging alarm unit 8: imaging coefficient unit

9: Number of times of phase display 10: Measurement signal divider

11 second waveform shaping unit 12 integrating circuit

13 sample and holding unit 14 third waveform shaping unit

15: measurement signal imaging alarm unit 16: measurement signal imaging alarm unit

17: Measurement signal missing phase display unit 18: Measurement signal missing phase display unit

The present invention relates to an image detection and monitoring circuit of a phase difference detector, and more particularly, to an image detection and monitoring circuit of a phase difference detector for monitoring phase loss of a reference signal and a measurement signal due to noise of a position detector using a phase difference widely used in various measurement systems. It is about.

Continuous processing facilities such as steel mills carry out rolling and plating processes while transferring workpieces at high speeds under high temperature conditions. In this case, loops are formed for the purpose of tension control and the size of the workpieces It measures and acts as a reference for speed control of the front and rear ends of the process. If the size of the loop is incorrectly measured, breakage or distortion of the workpiece will have a decisive effect on productivity and quality, and in some cases, it will lead to equipment accidents such as breakage of rolling rolls. Therefore, the reliability and precision of the position detector is very important in the continuous process equipment.

In the case of steelworks, the sensor for measuring the position of the object under test (loop in the wire rod process) cannot be used because the object is hot at 700 ℃ or higher, and a telemetry method using infrared light is used. In general, the sensor used in the hot process uses HMD (HOT METAL DETECTOR) to detect the position by detecting the infrared radiation emitted by the hot workpiece.

The basic principle of HMD is to place an 8-16-sided rotating mirror at a distance of 2-6M from the HOT PRODUCT, install an infrared sensor sensitive to specific wavelengths such as cas in front of the rotating mirror, and then rotate the mirror at a constant speed. Reflects the emitted light and detects its position from a change in the resistance of the infrared sensor. For more accurate detection, a time difference (or phase difference) of a measurement signal generated from a reference signal synchronized with the rotational speed of the mirror and an energy peak value with respect to the wavelength of light of the infrared sensor is used and converted into a distance.

At this time, the place where MHD is installed is an environment with poor visibility due to high temperature and high humidity with heat energy and dust emitted from HOT PRODUCT. If the front surface of the mirror such as dust and water vapor generated during the operation is blocked, the infrared sensor will not operate, so the position detection will be impossible, and the speed control of the continuous process will cause trouble, resulting in material defects. Since this phenomenon occurs in milliseconds, there is a problem that the operator cannot monitor at all times and cannot determine whether or not it occurs after a failure period.

The present invention was made to solve such a problem,

It is an object of the present invention to stably operate a continuous process control system by stably and accurately detecting whether a detector that measures a position using a phase difference (or time difference) and whether or not a phase is missing is detected quickly and accurately. SUMMARY OF THE INVENTION An object of the present invention is to provide an image detection and monitoring circuit of a phase difference detector that can shorten the cause of equipment failure and shorten the troubleshooting time.

In order to achieve the above object, the apparatus according to the present invention is an image detection and monitoring circuit of a phase difference detector, comprising: a reference signal divider for dividing a reference signal and a divided signal output from the reference arc divider to differentiate a synchronization signal; A differential waveform and a synchronizing signal generator for generating a waveform, a first waveform shaping portion for waveform shaping the reference signal output from the reference signal divider, a toggle signal generator for generating a toggle signal in response to the output signal of the waveform shaping portion; A reference signal imaging detector for outputting a presence / absence signal by comparing the toggle signal with the reference signal, a reference signal imaging alarm unit for receiving an imaging signal from the reference signal imaging detection unit, and alarming the signal; Reference signal for counting and displaying phase-out signal An arc voltage dividing unit, a second waveform shaping unit for waveform shaping the measurement signal output from the measuring signal divider, an integrating circuit for integrating the output signal of the second waveform shaping unit, and a signal output from the integrating circuit A holding unit for receiving the sample and holding, a third waveform shaping unit for waveform shaping the signal output from the sample and holding unit, a toggle signal generating unit's toggle signal and the third waveform shaping unit's signal, A measurement signal imaging detection unit for outputting a measurement signal imaging detection unit, a measurement signal imaging alarm unit for alarming upon receiving an imaging presence signal from the measurement signal imaging detection unit, and a measurement signal imaging determination unit for receiving and alarming an imaging presence signal from the measurement signal imaging detection unit; And a reference signal imaging coefficient and display unit configured to receive and count an imaging signal from the measurement signal imaging detector. The.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the configuration of an image detection circuit of a phase difference detector according to the present invention. Square wave reference signals of several μ to several mSEC before and after 48V are lowered to 5V level suitable for operating as logic elements.They are divided in the violating reference signal divider (1), and then start at the rising edge through the differential circuit (2). The synchronization signal generator 3 generates a synchronization signal having one cycle up to the next rising edge of the reference signal. At this time, the pulse generated from the differential circuit 2 is waveform-formed by the first waveform shaping section 4, and the toggle signal generation section 5 generates a toggle signal, and the reference signal imaging detection section 6 detects the reference signal imaging exclusive. It is used as an input for the argument gate (EOR GATE) (EOR ₁ ). The reference signal imaging detection unit 6 compares the toggle signal with the reference signal, and sends an imaging presence signal to the reference signal imaging alarm unit 7 and the reference signal imaging coefficient unit 8 at the end of the toggle signal cycle. (8) counts the imaging pulses and displays the number in the reference signal imaging frequency display section 9 in binary. If necessary, the operator resets the reset switch SW1 in the reset part and continues the phase monitoring.

The measurement signal is divided into 5V levels by the voltage dividing circuit of the measurement signal dividing unit 10 in the same manner as the reference signal, and then made into a short wave by the second waveform shaping unit 11 and then integrated in the integrating circuit 12. After sampling & holding in the sample and holding section 13, the third waveform shaping section 14 is again waveform-formed to a 5V level suitable for use as a logic element input and input to the image detection section 15. The image detection unit 15 compares the pulse signal, the toggle signal, and the exclusive logic sum (EOR) operation of the integral value of the measurement signal to determine the presence of an image. When a phase is missing, a pulse is sent to the phase alarm unit 16 to warn of a single phase loss and sent to the phase count unit 17 and the phase count display unit 18 to display the number of phases in binary. The S and measurement signal integrator and the sampling & holding unit 13 of the image detection unit 15 are reset and discharged by a reference signal start pulse generated at the rising edge of the reference signal.

The detailed operation rate circuit diagram will be described in detail as follows.

The output signal of the instrument consists of a reference signal (RS) and a measurement signal (MS), and is a large wave having a constant period and amplitude. The period is 2 to 8 µS and the amplitude is 24V. DUTY DYCLE in one cycle has 40 to 60%. The measurement signal of the measuring instrument has the same amplitude and period as the reference signal, and is delayed by a time difference ΔT based on the rising edge of the reference signal within the range of one cycle or less of the reference signal depending on the position of the object under test. Since the distance measurement of the measured object is proportional to the phase difference (ie, time difference) ΔT, the distance is calculated by calculating this ΔT.

An object of the present invention is to measure the phase of the instantaneous measurement signal due to the dust, water vapor, other foreign matter grazing, etc. during the instantaneous phase loss and measurement of the instantaneous reference signal due to instantaneous power failure, external noise, etc. Count. 2 shows a circuit diagram of a reference signal divider, a differential circuit and a synchronization signal generator according to the present invention. The reference signal divides the 24 V reference signal by the voltage divider R1 and R2 to facilitate signal processing by the logic device, and insulates the photodiode and the phototransistor PD1 and PT1 to transfer the signal. When the + part of the reference signal is input to the phototransistor, a voltage is generated at the resistor R3, and a pulse is generated by the differential circuits C1 and R4. At this time, the diode D1 blocks the current from flowing backward. The differential pulse is inverted by an inverting amplifier consisting of resistors (R5, R6, R7, R8) and transistors (Q1, Q2) and fed to capacitors (C2, C3) and resistors (R10, R11, R12) and operational amplifiers (A1). The synchronizing signal generating section 3 generates a synchronizing signal having a + potential which is insufficient by 70% of the time constants C3 and R11 in the original reference signal period. This synchronization signal has a delay time of 0.7 × C3 × R11 in the reference signal in synchronization with the rising edge of the reference signal and has the same period as the reference signal.

3 shows a circuit diagram of a first waveform shaping section and a toggle signal generating section according to the present invention.

A start pulse of the reference signal is generated in synchronization with the rising edge of the reference signal using the differential pulse resistors R13-R22 and the operational amplifier A2 shown in the preceding stage of the resistor R5 of the inverting amplifier. The reference signal start pulse is amplified by the operational amplifier A ₂ and clamped 5V to make it suitable for use in logic devices. The reference signal start pulse is an odd period of the reference signal by the JK flip-flop, and a toggle signal delayed by one period is generated after one cycle. 4 is a circuit diagram of a reference signal imaging detection unit and an imaging alarm unit according to the present invention. The image detection and toggle signal generator 5 includes two EOR logic elements EOR1 and EOR2 and two NOT GATE BF1 and BF2 SR flip-flops SR1. In EOR1, the reference signal start signal and the synchronization signal are computed as exclusive fits. If the toggle signal delayed by one cycle of the reference signal and the reference signal start signal are both '1', '0' is outputted, and if one is '0', Output 1 '. EOR2 outputs an exclusive fit of the toggle signal delayed by one cycle from the original reference signal and the signal inverted the toggle signal. That is, it is always '1' except for the time constant (0.7 x C1 x R4) at the time of outputting the reference signal. NOT GATE BF2 securely outputs the synchronization signal. The imaging output signal output part SR1 outputs Q, Q 'in synchronization with the cycle of the toggle signal to set the EOR1 signal and reset it to BF2. The phase generator EOR1 becomes '1' and outputs '1' to Q at the falling edge at the end of 1 cycle and if there is no phase, Q always keeps '0'. Enters a display portion consisting of R25 and transistor Q3 light emitting diode PD2. If the imaging signal is '1', the light emitting diode PD2 shines during the reference signal period. In addition, the imaging signal is counted by the clock of the binary counter composed of JK flip-flops (JK2-JK5), and the binary state is composed of resistors (R71-R87), transistors (Q10-Q17), and light emitting diodes (PD5-PD8). It enters the display and is displayed in binary number as many times as the number of missing phases. The counter can be reset by pressing the switch SW of the reset section composed of the resistors R67-R70 transistors Q8-Q9 and the switch SW.

5 is a circuit diagram of the measurement signal divider and the second waveform shaping unit according to the present invention. The measurement signal of the instrument is divided by the resistors R26 and R27, and the waveform is passed through the photodiode and the phototransistor PD3 and PT3. It is delivered to a fixed circuit. The second waveform shaping unit 11 is composed of resistors R29-R40, diodes D5 and D6, and operational amplifiers A3, and is biased with resistors R31 and R32 and signals for noise cancellation with resistors R36. Set the level and clip to 5V appropriate for the logic device input with diodes (D5, D6).

6, a circuit diagram of the integrating circuit and the sample and holding unit is shown. The measurement signal output from the second waveform shaping section 11 is integrated in the integrating circuit 12 composed of the resistors R41-R43 and the capacitor C3 operational amplifier A4. The measurement signal is held in a sampling circuit composed of resistors R45 and R46 and operational amplifier A5 and a holding circuit composed of resistors R49, R47 and R48 and capacitor C5 and operational amplifier A6. 7 shows a circuit diagram of the third waveform shaping unit and the measurement signal imaging detection unit. The waveform of the peak value of the integral value of the measurement signal is again shaped by the resistors R54-R63 and the operational amplifier A7. The reason for this is to increase the reliability of the device by integrating all signal voltages including the noise and clipping by the integral value of the noise component to eliminate the noise. The pulse of the detected measurement signal is exclusively calculated with the signal of the logic device EOR4 and transferred to the flip-flop SR2. The input signal of the logic element EOR3 represents '0' when there is no signal and the toggle signal is always '1', so the exclusive sum represents '1'. Logic element SR2 outputs an imaging signal at one cycle of falling edge. The logic element SR2 is reset by the measurement signal start signal every cycle. The measurement signal start signal also resets the integrator A4 and the sampling retainer. The image detection signal is represented by a display circuit diagram connected to the resistors R64-R66, the transistor Q7, and the light emitting diode PD4. 8 shows an imaging coefficient unit and an imaging number display unit according to the present invention. The binary output is performed by a display circuit composed of flip-flops JK2-JK5, resistors R71-R87, and transistors Q11-Q17, and is reset by the reset switch SW1.

As described above, the present invention generates a reference signal for distance and position measurement, generates a measurement signal delayed by the time difference ΔT by the detection physical quantity, and constantly monitors and counts the missing and the number of phases of phase loss of the reference signal and the measurement signal of the detector. Therefore, it is possible to quickly identify the cause of the failure of the equipment, shorten the recovery period of the failure and monitor the performance of the position detector, thereby improving the stability of the equipment. In addition, it is possible to prevent quality deterioration due to controlled hunting due to image formation in hot rolling and wire rod rolling processes. Especially. It has a detection function for the instantaneous imaging failure of the position detector.

Claims (2)

In the phase detection and monitoring circuit of the phase difference detector, A reference signal divider for dividing the reference signal; A differential and synchronization signal generator for generating a synchronization signal by differentiating the divided signal output from the reference signal divider; A first waveform shaping unit configured to waveform-shape the reference signal output from the reference signal dividing unit, a toggle signal generation unit receiving the output signal of the waveform shaping unit and generating a toggle signal; A reference signal imaging detection unit for comparing the toggle signal with the reference signal and outputting an imaging presence signal; A reference signal missing alarm unit for receiving an alarm for an open / close signal from the reference signal missing detector; A reference signal imaging coefficient and display unit for counting and displaying an imaging presence signal from the reference signal imaging detector; A measurement signal divider for dividing the measurement signal; A second waveform shaping unit configured to waveform-shape the measuring signal output from the measuring signal divider; An integrating circuit for integrating the output signal of the second waveform shaping unit; A sample and holding unit configured to receive a signal output from the integrating circuit and to hold the sample and; A third waveform shaping unit and a signal output from the additive sample and holding unit; A measurement signal imaging detector for receiving a toggle signal from the toggle signal generator and a signal from the third waveform shaping unit and outputting an imaging presence signal; A measurement signal imaging alarm unit for receiving an alarm of an imaging presence signal from the measurement signal imaging detection unit; An image detection detection and monitoring circuit of a phase difference detector, comprising: a reference signal imaging coefficient and a display unit for receiving and counting an imaging presence signal from the measurement signal imaging detection unit; The method of claim 1, The reference signal phase detection unit calculates the reference signal and the synchronization signal with an exclusive logical summation operation unit, and applies them to the S input terminal of the SR flip-flop. The synchronization signal and the toggle signal are ORed logically to perform OR operation of the SR flip-flop. An image detection and monitoring circuit of a phase difference detector, characterized in that a signal inputted as a clock signal and the signal inverted to a NOT gate is applied to an R input terminal of an RS flip-flop to calculate an imaging presence signal.