KR100236828B1 - Apparatus and method of digital trunk test in time division exchanger - Google Patents

Abstract

The present invention relates to a time division electronic switch (TDX-1B) digital trunk line test apparatus (BERT) and a control method thereof. The present invention relates to a bit pattern that is generated by generating an arbitrary digital bit pattern for a trunk line of an electronic switch in a telephone network. By measuring the performance of the network, comparing and analyzing the bit error rate and error occurrence time to measure the call quality of the corresponding relay line, and using the online reservation test function, the digital relay lines can be operated and managed more efficiently. It's about technology.

Description

Time Division Electronic Switchgear Digital Trunk Line Tester and Control Method thereof

The present invention relates to a time division electronic switch (hereinafter referred to as TDX-1B) digital trunk line tester (Bit Error Rate Tester: hereinafter referred to as BERT) and a control method thereof. Measures the performance of the returned bit pattern by generating the digital bit pattern, and compares and analyzes the bit error rate and error occurrence time to measure the call quality of the corresponding trunk line, as well as using the online reservation test function. The present invention relates to a time division electronic switch (TDX-1B) BERT capable of more efficiently operating and managing relay lines and a control method thereof.

The trunk line of the electronic exchange consists of PCM multiplexing primary group.

The first group PCM multiplexed transmission method is the North American method (NA) which transmits control signals and subscriber information through 24 channel timeslots recommended by the ITU, and the European method which transmits control signal and subscriber information via 32 channel timeslots. Classified as (CEFT), most of the electronic exchanges that make up the telephone network now accept both North American and European transport.

Although the inter-office relay lines of the electronic exchanger in operation are operated in a digital manner, the call quality for these relay lines has a contradiction of being measured at an audible or analog tone level by an analog test apparatus.

In addition, the subscriber's desire for high-speed data communication has exploded, and the telephone network in operation is rapidly evolving.

For example, a common line signaling method with a high transmission rate of 64 kb / s is newly introduced and operated in the TDX-1B telephone exchange, but is used in T1 (NA) or E1 (CEPT) relay lines used as signaling and communication channels. Since there is no medium capable of measuring bit error rate (BER) by digital method, it is impossible to provide reliable high-quality relay line resources required for high-speed data communication.

In the present invention, in consideration of the conventional inconvenience as described above, by automatically recognizing the type of T1 or E1 relay line constituting the trunk line of the TDX-1B electronic exchanger, and generates 64,000 bit patterns per second, The purpose of the present invention is to provide a BERT for cumulative statistics processing of bit error rate, error occurrence time, block error rate per 1,000 bits by measuring the performance of the returned bit pattern after sending the bit pattern to the electronic exchange through the relay line.

1 is a block diagram of a TDX-1B including a digital trunk line test apparatus according to the present invention.

2 is a block diagram illustrating the internal configuration of a digital trunk line test apparatus according to the present invention.

3 is a block diagram showing the interworking relationship between the digital trunk line test apparatus and the trunk line test control board (ATCB) according to the present invention.

4 is a flowchart illustrating a control process of the digital trunk line test apparatus of the present invention.

* Explanation of symbols for main parts of the drawings

100: analog subscriber matching module (SIM) 10: analog subscriber circuit (ALC)

20: subscriber line control processor (SLP) 30: subscriber line concentrator (DLC)

40: analog repeater test unit (ATTU)

41: analog tone test board (ATTB)

42: trunk line test control board (ATCB) 43: bit test board (ABTB)

431: D bus matching unit 432: central control unit

433: bit pattern timeslot switching unit 434: bit pattern generation unit

435: DLC matching unit

436: Sync signal monitor and Gint pattern clock section

437: bit error detection and counting unit 438: delay time measuring unit

439: control signal generator 44: test back-board (TTBB)

200: switch network (SWCD)

300: switching number translation processor (SNP)

400: trunk line concentrator (TLC) 500: trunk line processor (TLP)

600: digital transmission trunk line (DCTC)

700: Operation and Maintenance Processor (OMP) 800: Alarm Matching Processor (SAIP)

900: alarm device (ALMD)

In order to achieve the above object, the BERT provided by the present invention includes an analog subscriber matching module (SIM) having an analog trunk line test unit (ATTU) for performing a trunk line test.

To measure the call quality of the corresponding relay line in the exchange, and to use the online reservation test function to more efficiently manage and manage the clustered digital relay lines;

An analog tone test board (ATTB) for tone level testing by a specific analog frequency for the trunk line;

A relay line test control board (ATCB) for controlling the relay line test operation;

Bit test board (ABTB) for trunk line testing; And

It characterized in that it comprises a test back board (TTBB) for matching with the ABTB.

In addition, the method of the present invention for controlling the BERT is configured as described above, the initialization process (S1) is performed when the ABTB reset or power on / off;

A monitoring step (S2) of periodically checking a synchronization signal following the initialization step (S1) or extracting a header of a bit pattern;

If an interrupt (MTO) is generated from the ATTP built into the ATCB after the monitoring process (S2), determining a communication type received from the ATTP to perform a BER test normally (S3);

If it is determined that the communication type is the test execution type, the process ends after performing a normal BER test process (S4); And

If the determination result is that the communication type is a type for determining what error has occurred in the processor embedded in the ABTB, after performing a watch-dog process for checking the processor status (S5) It is characterized by controlling.

The above objects, features, and advantages will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a method of mounting a BERT implemented by the present invention to a TDX-1B and matching the block diagram. Referring to the overall block diagram, a plurality of analog subscriber interface modules (hereinafter referred to as SIMs) are described. and;

A switch network (hereinafter referred to as SWCD) 200 which is a group switch for switching timeslots assigned to bit patterns generated in the plurality of SIMs 100;

A switching number translation processor (SNP) 300 connected to the SWCD 200;

A trunk line concentrator 400 for connecting the relay lines switched through the SWCD 200;

A trunk line processor (hereinafter referred to as TLP) 500;

A digital carrier trunk circuit (hereinafter referred to as DCTC) 600 for transmitting a bit pattern on the relay line through the TLC 400 to a power station connected to one side;

An Operation and Maintenance Processor (hereinafter referred to as OMP) 700 that provides an online scheduled test function for BER testing; And

And an Alarm Match Processor (SAIP) 800 that collects and processes hardware alarm sources.

At this time, the BERT implemented in the present invention is mounted in one SIM among the plurality of analog subscriber matching modules 100 mounted in the TDX-1B, and operated to test all the modules. Looking at it, an analog subscriber circuit (Analog Line Circuit: hereinafter referred to as ALC) (10) connected to the subscriber's telephone line;

A subscriber line processor (SLP00) 20 connected to the ALC 11;

A subscriber line concentrator (hereinafter referred to as DLC) 30 for condensing digital lines; And

An analog trunk line test unit (hereinafter referred to as ATTU) 40 which performs a trunk line test;

An analog tone test board (hereinafter referred to as ATTB) 41 for tone level test by a specific analog frequency for the relay line;

A trunk line test control board (ATCB) 42 for controlling the trunk line test operation;

A bit test board (hereinafter referred to as ABTB) 43 for trunk line testing; And

A test trunk board (TTBB) 44 for registration of the ABTB 43 is included.

In this case, the TTBB 44 has a modified part for matching with the ABTB 43 of the present invention in the existing TTBB (not shown in the drawing), and can first mount the ABTB (B3) in addition to the existing slot. One more slot, and an interface change for controlling the mounted ABTB 43, and the like.

As shown in FIG. 2, the ABTB 43 matches a D-bus that matches the ATTP (not shown) and the ABTB 43, which are the D group processors included in the ATCB 42, through the D bus. A part 431;

A central control unit 432 for receiving BER test information inputted through the D bus matching unit 431, analyzing the information, and controlling each unit of the ABTB 43;

A bit pattern timeslot switch section 433 for allocating 4 or 28 timeslots of the 32 timeslots of the 31st subhighway in the exchange to the test channel;

A bit pattern generator for generating a test bit pattern by dividing the T1 (NA) or E1 (CEPT) relay line according to the DCTC 600 which is a relay line board, and generating a bit pattern such as a fixed bit pattern or a pseudo random bit pattern. 434);

A DLC matching unit 435 that matches a time slot number 28 of a time slot of a sub highway 31 of a sub highway in the exchange with a bit pattern test channel, and matches a time slot 4 with its own looping test test channel;

While monitoring the 8KHz synchronization signal received through the DLC matching unit 435, supply a clock of 2.048MHz for generating a bit pattern, and also check the phase of the clock at 39.04μsec period DLC matching unit 435 A synchronization signal monitor and bit pattern clock unit 436 which writes to the central control unit 432 by writing to the DPRAM (not shown in the figure) included therein;

The bit pattern generated by the bit pattern generator 434 is compared to the pattern returned after being transmitted to the power station to detect bit errors, decomposes the number of generated bit errors into one block per 1,000 bits, and also generates them per second. A bit error detection and counting unit 437 for counting the number of 64,000 bits to be counted and counting the BER test time until the generated bit pattern is transmitted to the power station and returned;

Delay time measurement, which indicates the number of frame slips (FS) of the synchronization signal and monitors whether the requested BER test is terminated in case of an abnormal case in which the header of the bit pattern generated for one second cannot be extracted or the looping test is not performed. Part 438; And

And a control signal generator 439 for generating various control signals required for starting, terminating the BER test, and the like.

In addition, when a test request is made in the BER test information received from the D bus matching unit 431, the test is started by an interrupt generated by writing to the 52FEH address in the DPRAM in the D bus matching unit 431. It is updated in 1 second increments.

The fixed bit pattern of the two bit patterns generated by the bit pattern generator 434 generates a bit pattern where 0 and 1 intersect, and the pseudorandom bit pattern has a maximum bit pattern length of 2,047 (E-11 -1). Generate random bit patterns. Up to 2,047 bits are generated by feeding back to the first stage from the outputs of the ninth and eleventh stages using 11-speed shift registers.

In addition, since the ABTB 43 is installed in the SIM 100, the bit pattern generator 434 is double-converted (A-μ-A or μ-A-μ law).

Therefore, when the pseudo random bit pattern is sent to the A-μ-A law, the bit error occurring in the 0, 2, 4, 8, 10, 12, and 14 octets is ignored, and the μ-A-μ law is ignored. When converted to, the bit error occurring in the pattern of the 26th, 28th, 30th, 32th, 45th and 47th octet is ignored.

Referring to the operation of the trunk line test apparatus of the present invention configured as described above, the ATTU installed in the existing SIM is composed of only ATTB, ATCB, and TTBB shown in FIG. Likewise, the TTBB 44, which is the backboard of the ATTU 40, was changed to match with the ABTB 43 added in the present invention.

In this case, the ABTB 43 performs inter-processor communication (IPC) with the ATCB 42 mounted with ATTP, which is a D-group processor that controls the ATTU 40 via the D-bus.

The ATTU 40 is fixed to the SIM 100 and is connected to the subscriber switch DLC 10 through a subhighway cable used as an internal telephone exchange.

At this time, the 31st subhighway of the internal communication path is used, and the ABTB 43 of 32 channels of the 31st subhighway is allocated 4 timeslots (channels) for its own looping, and 28 timeslots (for the country test). Channel).

Indeed, the ABTB 43, which is a digital trunk line test apparatus, is started with a BER test by an OMP 700, which is a T-group processor in charge of operation management of the TDX-1B. That is, when a BER test is required, the test information element is processed into an IPC and transmitted to the ATCB 42 included in the ATTU 40. The ATCB 42 stores and analyzes the contents of the received IPC. 43) to generate an arbitrary bit pattern.

The generated bit patterns are switched by the SWCD 200, which is a group switch, through the time slots of the subhighway mentioned above, and then, through the DCTC 600, which is a relay calculation to be tested by the TLP00 500, which is a relay line processor. Send a bit pattern.

On the other hand, since the bit pattern returned from the game proceeds in the reverse order to the previous process, description thereof is omitted.

In addition, OMP 700 provides an online scheduled test function for the BER test. This function allows the operator to perform BER test method, pattern type, test time, etc. on a relay line or a clustered relay line by route without being limited by the test time. If you enter parameter, it is reserved and managed in 'JOB table'.

Up to 32 reservations can be made, and the registered reservation can be canceled in whole or in part.

3 is a block diagram showing the interworking relationship between the ABTB 43 and the ATCB 42 in which the ATTP, which is the D-group processor of the ATTU 40, is mounted. From the OMP 700 in which the ATTP of the ATCB 42 is an upper processor, FIG. Upon receiving the BER test information, ATTP generates an interrupt INTO to the ABTB 43 to request the test.

In this case, the test information includes a test type, a test time, a bit pattern type, and the like.

The test types are divided into normal mode (normal), self mode (self-host), and watch mode (Watch-Dog), and the test time is in units of 1 second from 10 seconds to 120 seconds. Is entered.

In addition, the bit pattern types are classified into fixed or pseudo random bit patterns.

After receiving the test request from the ATCB 42, the ABTB 43 transmits the generated bit pattern to the DLC 30 and then monitors the synchronization signal including the test result returned through the DLC 30. Generates an interrupt INT1 to the ATTP of the ATCB 42 to report the result of the execution.

The information included in the execution result is composed of the number of bit errors, the number of block errors per 1000 bits, the clock status, the test termination status, and the watch-dog response.

In addition, the types of alarms for the ATCB 42 are classified into two types, such as a function failure and a board hernia, and after receiving the reception result from the ATCB 42, if these alarms occur according to the alarm information, this alarm is generated. The information is transmitted to an alarm device 900 which is a device for collecting and processing a hardware alarm source.

Then, the alarm information of the ATCB 42 collected by the ALMD 900 is reported to the alarm matching processor 800 and is converted into a visible and audible alarm.

4 is a flowchart illustrating a control method for the ABTB 43 described above, and includes: an initialization process S1 performed when the ABTB B3 is reset or the power is turned on / off;

A monitoring step (S2) of periodically checking a synchronization signal following the initialization step (S1) or extracting a header of a bit pattern;

If an interrupt INT0 is generated from the ATTP built into the ATCB 42 after the monitoring process S2, in order to perform the BER test normally, the communication type Comty received from the ATTP is determined (S3). and;

If it is determined that the communication type is 'AAH', ending the normal BER test process and then terminating (S4); And

In the case where the communication type is '33H', in order to know what error has occurred in the processor embedded in the ABTB 43, a process of performing a watch-dog process for checking the processor state and then terminating ( S5) is performed.

As described above, the TDX-1B digital trunk line test apparatus produced as a result of the present invention is matched to ATTU, which is a national trunk line analog test apparatus of the TDX-1B electronic exchanger, and functions as a hardware in the same series of TDX-1A electronic exchanger. Easy to attach without modification

In addition, it is possible to respond to BER test requests from heterogeneous large-scale electronic exchanges and satisfy the BER test conditions for the communication equipment recommended by the ITU at 64kb / s.

In addition, the bit error rate measurement range for a digital trunk line at 64 kb / s is measured when more than 10E-3 (64 bits) bit error per second or 10E-6 (4 bits) per minute bit error occurs. It is possible to calculate the cumulative bit error for the returned bit pattern.

As described in detail above, the present invention can more efficiently operate and manage relay line resources of an electronic exchange provided for high-speed digital communication such as packets, as well as a pulse code modulation (PCM) relay line of a primary group speed in operation. There is an advantage in that the actual call quality can be measured by the digital method.

In addition, a preferred embodiment of the present invention is disclosed for the purpose of illustration, those skilled in the art will be able to make various modifications, changes, additions, etc. within the spirit and scope of the present invention, such modifications and modifications belong to the following claims You will have to look.

Claims (10)

In a time-division electronic exchange including an analog subscriber matching module (SIM) having an analog repeater test unit (ATTU) that performs a repeater test, the call quality of the corresponding repeater in the exchange is measured and grouped using an online reservation test function. To manage and manage digital relays more efficiently; An analog tone test board (ATTB) for tone level testing by a specific analog frequency for the trunk line; A relay line test control board (ATCB) for controlling the relay line test operation; Bit test board (ABTB) for trunk line testing; And a test back-board (TTBB) for matching with the ABTB. TDX-1B digital trunk line test device (BERT), characterized in that it comprises a. The apparatus of claim 1, wherein the ABTB comprises: a D bus matching unit responsible for matching ATTP and ABTB, which is a D-group processor included in the ATCB; A central control unit for receiving the BER test information input through the D bus matching unit, analyzing the information, and controlling each unit of the ABTB; A bit pattern timeslot switch section for allocating a test channel among a plurality of timeslots of subhighways in the exchange; A bit pattern generator configured to generate a test bit pattern by dividing the T1 or E1 relay line according to the DCTC which is a relay line board, and generating a bit pattern such as a fixed bit pattern or a pseudo random bit pattern; A DLC matching unit for matching one of the timeslots of a particular subhighway among the subhighways in the exchange with a bit pattern test channel, and matching the other timeslot with its own looping test test channel; Synchronization for monitoring the synchronization signal received through the DLC matching unit, supplying a clock for generating a bit pattern, and checking the phase of the clock, writing it to the DPRAM included in the DLC matching unit, and reporting it to the central controller. A signal monitor and bit pattern block portion; The bit pattern generated by the bit pattern generator is compared to the pattern returned after being transmitted to the power station to detect bit errors, decompose the number of bit errors generated into one block per 1,000 bits, and also generate 64,000 bits generated per second. A bit error detection and counting unit for counting the number and counting the BER test time and the like until the generated bit pattern is transmitted to the power station and returned; Delay time measurement, which indicates the number of frame slips (FS) of the synchronization signal, and monitors whether the requested BER test is terminated in case of an abnormal case in which the header of the bit pattern generated for the second unit cannot be extracted or the looping test is not performed. part; And a control signal generator for generating various control signals necessary for starting, terminating, and BER testing. 12. The TDX-1B digital trunk line test apparatus BERT. The method according to claim 2, wherein when a test request is made in the BER test information received by the D bus matching unit, the test is started by an interrupt generated by writing to a specific address in the DPRAM in the D bus matching unit, and the test result is in seconds. Time Division Electronic Switcher (TDX-1B) Digital Trunk Line Tester (BERT). 3. The TDX-1B digital relay line of claim 2, wherein the bit pattern timeslot switch unit allocates times 4 or 28 of the 32 timeslots of the 31st sub highway to the test channel. 4. Test device (BERT). The fixed bit pattern generated by the bit pattern generator is a bit pattern in which 0 and 1 cross each other. The pseudorandom bit pattern is generated by generating the maximum random bit pattern that is set and then feeding this bit back to the first stage from the output of the N-2nd and Nth stages using the N (natural number) stage shift register. Characterized by Time Division Electronic Switcher (TDX-1B) Digital Trunk Line Tester (BERT). The time division electronic component of claim 2, wherein the DLC matching unit matches a time slot number 28 of the time slots of the 31 subhighway with a bit pattern test channel, and matches a time slot 4 with its own looping test test channel. Switchboard (TDX-1B) Digital Trunk Line Tester (BERT). The TDX-1B digital divider according to claim 1, wherein the TTBB has one expansion slot for mounting the ABTB, and is configured by changing an interface portion for controlling the mounted ABTB. Trunk Line Test Device (BERT). A method for controlling a digital trunk line test apparatus (BERT) of claim 1, comprising: an initialization step (S1) performed when resetting the ABTB or turning the power on / off; A monitoring step (S2) of periodically checking a synchronization signal following the initialization step (S1) or extracting a header of a bit pattern; If an interrupt INT0 is generated from the ATTP built into the ATCB after the monitoring process S2, determining a communication type received from the ATTP to perform a BER test normally (S3); If it is determined that the communication type is the test execution type, the process ends after performing a normal BER test process (S4); And if the communication type is a type for determining whether an error has occurred in a processor embedded in the ABTB, performing a watch-dog process for checking a processor state and ending the process (S5). Time-switched electronic switch (TDX-1B) digital trunk line test device (BERT) control method characterized in that the control. 10. The method of claim 8, wherein performing the test procedure comprises: upon receiving BER test information from an operational and maintenance processor, generate an interrupt at ATTP in the ATCB to request a test; If the test request is received, the ABTB generates the bit pattern, transmits it to the DLC, and reports the execution result returned through the DLC to the ATTP by generating an interrupt; If an alarm is generated in the ATCB according to the alarm information among the reported performance results, transmit the alarm information to the ALMD; And the ALMD reports the information to an alarm matching processor and converts the information into a visible and audible alarm to complete the test. The method of claim 9, wherein the test information transmitted during the test process includes a test type, a test time, a bit pattern type, and the like; The test type is divided into a normal mode, a self mode, and a watch-dog mode, and the test time is inputted in units of seconds from minimum 10 seconds to maximum 120 seconds (TDX-1B). ) Digital trunk line tester (BERT) control method.

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