KR100235497B1 - Manufacturing method of semiconductor chip bump - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor chip bump, wherein a dam having a predetermined shape is formed of an insulating glass material so that a bonding pad is exposed on a semiconductor substrate in a wafer state, and then a distributor is disposed on the bonding pad exposed by the dam. After the conductive epoxy is doped, the semiconductor substrate is heat-treated to solidify the bumps, and the semiconductor substrate is diced and separated into individual semiconductor chips. It was made to adhere. Therefore, since the manufacturing method of the semiconductor chip bump is simple, productivity is high, and since a bump is not formed in the chip | chip which generate | occur | produced in the wafer state, manufacturing cost of a bump can be reduced.

In addition, since the dam formed of an insulating glass material can adjust the height and shape relatively freely, it is possible to prevent the occurrence of defects during the tap package process due to the shape of the bump, and to bond the metal according to the bonding pad or the metal wiring of the tab package. It can be easily replaced by replacing with conductive epoxy of a material having excellent properties, thereby improving the reliability of the tab package.

Description

Manufacturing method of semiconductor chip bump

1 is a plan view of a typical tab package.

2A to 2C are manufacturing process diagrams of one embodiment of a semiconductor chip bump according to the prior art.

3A and 3C are manufacturing process diagrams of another embodiment of a semiconductor chip bump according to the prior art.

4A and 4B are manufacturing process diagrams of an embodiment of a semiconductor chip bump according to the present invention.

5 is an exploded cross-sectional view of a tab package on which a semiconductor chip having bumps formed by the manufacturing method according to the present invention is mounted.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip bump and a manufacturing method, and more particularly, a bump used for inner lead bonding of a tape automated bond (TAB) package is formed by a dotting method using a dispenser. The present invention relates to a method for manufacturing a semiconductor chip bump that can improve reliability.

In general, a semiconductor chip is sealed in a package and mounted on a printed circuit board (hereinafter, referred to as a PCB). In the basic type of such a semiconductor package, a semiconductor chip is mounted on a die pad, which is a rectangular heat dissipating metal plate, and leads formed around the die pad are connected by bonding pads and bonding wires of the semiconductor chip. The package body surrounding and protecting the semiconductor chip and the wire is formed of an epoxy molding compound.

Such occasional encapsulated semiconductor packages have been studied and executed by Thin Quad Flat Package (hereinafter referred to as QFP), Small Outline Package (hereinafter referred to as SOP) and tab package. Of these, the method of QFP and SOP can be manufactured using existing package manufacturing processes, for example, die bonding, wire bonding and molding.

However, in the tab package, a thin film metal wire serving as a lead frame and a wire is formed on an insulating film, and a semiconductor chip is mounted on one side of the metal wire. In this case, a bump made of a conductive material is formed on the bonding pad, which is an input / output terminal of the semiconductor chip, which is a type of surface mount package technology bonded to the metal wire.

Therefore, this technology is completely different from the conventional method of using a bonding wire, and was initially applied to low pins and small chips, such as a clock and a calculator, but recently, a liquid crystal display (LCD) The scope of application is expanding to the fields of application such as driver, ASIC, MICOM, da-pin-large memory devices and notebook computers.

1 is a plan view of a general tab package.

The tape carrier on which the semiconductor chip 11 is mounted is formed in the base film 12 made of an insulating material, the device hole 13 formed in the center of the base film 12, and the lower portion of the base film 12. In the metal wiring 16, the slot 17 formed so that one axis of the metal wiring 16 may be exposed at predetermined intervals from the device hole 13, and the outside of the slot 17. It consists of the through-holes 18 formed.

Looking at each part of the tape carrier in detail, the base film 12 is formed of one insulating material selected from polyimide, polyester, polyether sulfone (PES), polyparanic acid (PPA), etc. The device holes 13 are punched out slightly larger than the size of the semiconductor chip 11 to be mounted, and are formed in a rectangular shape. In addition, the metal wires 16 are formed of an inner lead 14 and an outer lead 15, and a copper (Cu) thin film having a thickness of 18 μm to 35 μm is formed by photo etching, and the slot 17 is punched. Alternatively, the base film 12 may be removed by about 1 to 2 mm in width by a method such as chemical angle. Ends of the inner leads 14 are exposed to the periphery of the device hole 13, and one side of the outer leads 15 is exposed to the slot 17. The through hole 18 is used to transport the tab package 10 in an alignment and automated process during mounting of the tab package 10.

The semiconductor chip 11 is mounted at the ends of the inner leads 14 exposed to the periphery of the device hole 13. The semiconductor chip 11 is mounted in a thermo-compression manner with a bump (not shown) formed of a conductive material such as gold (Au) interposed between the inner lead 14 and an inner lead. 14), a protective resin layer (not shown) that covers and protects the bumps and the surfaces of the semiconductor needles 11 is formed of an insulating epoxy or the like.

Although not shown, the tab package 10 is arranged on the wiring of the PCB or LCD to which the solder or conductive epoxy is applied by a transfer device to place the outer lead 15 on the wiring. Then, the outer package 15 of the tab package 10 may be pressed by using a bond tool in which a recess in the shape of the tab package 10 is formed on the lower surface so as to press the tab package 10. After bonding completely with the wiring, the bonding device is separated.

The bump of the semiconductor chip is formed on the pad of the semiconductor chip by an electroplating method or a transfer method, and looks at the manufacturing processes of the conventional semiconductor chip bump in detail.

2A to 2C are manufacturing process diagrams of an embodiment of a semiconductor chip bump according to the prior art, which is a manufacturing method by an electroplating method using a photosensitive film pattern.

In FIG. 2A, a bonding pad 22 made of A1 or an alloy thereof, which is connected to the metal wiring, is formed on the semiconductor substrate 21 on which the circuit and the metal wirings are formed, and on the semiconductor substrate 21. The passivation layer 23 is a B.P.G. (BPSG), Phospho Silicate Glass (hereinafter PSG) so that the bonding pad 22 is exposed. It is formed of an insulating material such as) or US doped (Undoped silicate glass (hereinafter referred to as USG)).

On the bonding pad 22 exposed by the passivation layer 23, the barrier metal layer 24 for adhesion and diffusion prevention with the bonding pad 22 is excellent in workability and adhesiveness. It is formed sequentially from an easy metal, for example a chromium (Cr) and copper (Cu) layer or a gold (Au) and tungsten titanium (Tiw) layer.

In FIG. 2B, the photoresist pattern 25 is formed to have a predetermined thickness, for example, about 10 μm by a general photo process so that the barrier metal layer 24 on the bonding pad 22 is exposed. .

In the general photographic process, a photoresist in which a photoresist and a resin are dissolved in a solvent at a predetermined ratio is uniformly coated on a semiconductor substrate by a spin coating method, and then irradiated with light selectively through a pattern mask. The process forms a pattern. At this time, in the developing step, after forming the photoresist pattern by selectively removing the exposed part or the non-exposed part with a weakly alkaline developer having an aqueous solution containing TAH. Tetra Methy 1 Ammonium Hydroxide (TMAH) as a main raw material, The semiconductor substrate is heat-treated to solidify the photoresist pattern.

In FIG. 2C, the semiconductor substrate 21 is immersed in a gold (Au) electrolytic solution, and a predetermined height, for example, about 10 μm, is formed on the barrier metal layer 24 exposed by the photosensitive film pattern 25. After the bumps 26 are formed by Au electroplating, the photosensitive film pattern 25 is removed.

The method of forming the bumps 26 by the electroplating method has the advantage of high productivity, but the process of manufacturing the bumps is required because the photolithography process has to be performed several times to form the barrier metal layer 24 and the bumps 26. It is complicated and the material of the bump cannot be changed depending on the material of the barrier metal layer 24 or the inner lead, so there is a problem of poor contactability.

In order to solve the above problems, a bump manufacturing method using a transfer method using a metal mask is used.

3A to 3B are manufacturing process diagrams of another embodiment of the bump according to the prior art, which is a bump manufacturing method by a transfer method.

In FIG. 3A, the barrier metal layer 34 is formed on the bonding pad 32 exposed by the passivation layer 33 on the semiconductor substrate 31.

In FIG. 3B, after aligning the metal mask 35 of the pattern in which the pump part is opened on the upper part of the metal wiring 39 formed on the base film 37, the upper part of the metal mask 35 is arranged. Conductive epoxy is sprayed to form bumps 36 of a predetermined height on the inner leads of the metallization 39.

In the bump manufacturing method using the transfer method, since bumps are formed on all semiconductor chips regardless of whether each semiconductor chip is defective in a wafer state, productivity is good but manufacturing cost increases.

In order to solve the above problem, Japanese Patent Laid-Open Publication No. Hei 3-18030 mounts a semiconductor substrate on which an bonding pad is exposed on an XY table, and then, liquid conductive epoxy is doped onto the bonding pad with a nozzle, and heat treatment is performed. A method of solidifying a conductive epoxy to form a bump is disclosed.

This method is simple, and the bumps can be selectively formed only on good semiconductor chips, so that the productivity is high and the manufacturing cost can be reduced, but since the bumps are formed of liquid epoxy, it is difficult to keep the shape of the pump constant. There is a problem in that it is difficult to form the bump height to some extent.

In addition, the method of forming the bump by the electroplating method has the advantage of high productivity, but the manufacturing process of the bump is complicated, there is a problem in that the material of the bump can not be changed depending on the material of the barrier metal layer or the inner lead inferior contact.

In addition, the bumps should have a height, for example, 20 μm or more, in order to prevent contact between the semiconductor substrate and the inner leads during the bonding process with the inner leads of the tab package. Since the height and shape of the bumps are determined by the open portion of the photoresist pattern. However, the photoresist has a problem in that it is difficult to form the bumps more than a certain height because it is difficult to form a thicker or more uniformly open portion due to the material of the resin or the like.

Since the present invention is to solve the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor chip bump that can simplify the manufacturing process, improve the reliability of the tab package by forming a high bump.

Another object of the present invention is to provide a method for manufacturing a semiconductor chip bump that can reduce manufacturing costs by not forming a bump selectively on a semiconductor chip in which a defect occurs in a wafer state.

The semiconductor chip bump manufacturing method according to the present invention for achieving the above object is a step of forming an insulating layer having a predetermined thickness on the entire surface of the semiconductor substrate on which metal wiring and bonding pads are formed, Forming a dam around the bonding pad by removing the insulating layer so as to be exposed, filling the inside of the exposed dam around the pad with conductive epoxy discharged by a distributor, and heat treating the semiconductor substrate. It is a point which comprises the process of removing and solidifying the organic substance in the said conductive epoxy, and forming a bump.

EMBODIMENT OF THE INVENTION Hereinafter, one preferred embodiment of the manufacturing method of the semiconductor chip bump which concerns on this invention is described in detail with reference to an accompanying drawing.

4A and 4B are manufacturing process diagrams of a semiconductor chip bump according to the present invention.

In FIG. 4A, a BPSG is formed on the entire surface of the semiconductor substrate 41 in a wafer state in which a passivation layer 43 for protecting a circuit and a bonding pad 42 through which the passivation layer 43 is removed are exposed. And insulating glass materials such as PSG and USG, for example, by applying a spin coating method so as to have a thickness of 10 μm or more, and then exposing the bonding pads 42 by a conventional photolithography method to expose the surroundings of the bonding pads 42. The dam 45 is formed. At this time, the bonding pad 42 is a terminal formed of aluminum (A1) or an alloy thereof and connected to the outside.

In FIG. 4B, after the semiconductor substrate 41 is aligned and mounted on the XY table 40, the conductive epoxy 47 is distributed on the bonding pads 42 exposed by the dam 45. Dotting to 48 forms bump 46, and the dispenser 48 moves to the next bonding pad 42 to continue dotting repeatedly. Then, the semiconductor substrate 41 is heated and heated in a furnace to remove organic matter in the bumps 46 and solidified, and then the dam 45 is removed.

At this time, the dam 45 prevents the conductive epoxy 47 from flowing down and diffusion, and the conductive epoxy 47 includes a paste including a conductive material such as solder, silver (Ag), or gold (Au). )to be. The distributor 48 is composed of a metal tube 49 for supplying the conductive epoxy 47 and a needle 50 for discharging the conductive epoxy 47 onto the bonding pad 42 by air pressure. It operates by recognizing the coordinate on 40.

In addition, the height and shape of the bump 46 are affected by the height and shape of the dam 45, the injection amount of the conductive epoxy 47, the inner diameter of the needle 50, and the discharge pressure of the distributor 48. In addition, the injection amount of the conductive epoxy 47 is affected by the viscosity of the conductive epoxy 47 and the injection air pressure, and further installs a plurality of distributors 48 to operate simultaneously to improve the work efficiency.

5 is an exploded cross-sectional view of a tab package in which a semiconductor chip having bumps is mounted by a manufacturing method according to the present invention.

The semiconductor chip is exposed to an internal lead exposed by a device hole of a tape carrier on which a metal thin film adhered by an adhesive layer 68 on an insulating base film 67 is etched to form a metal wiring 69. After aligning on the bump 66 of 61, the semiconductor wire 61 is mounted by thermocompression bonding the metal wiring 69 and the bump 66 with a bonding apparatus.

As described above, according to the manufacturing method of the semiconductor chip bump according to the present invention, after forming a dam of insulating glass material around the bonding pad of the semiconductor substrate in the wafer state, the distributor on the bonding pad exposed by the dam The semiconductor substrate is heat-treated, and then the semiconductor substrate is heat-treated to solidify the epoxy to form bumps. Therefore, the bump manufacturing method is simple and the productivity is high. It is effective to reduce the manufacturing cost.

In addition, since the dam formed of an insulating glass material can adjust the height and shape relatively freely, it is possible to prevent the occurrence of defects during the tap package process due to the shape of the bumps, and to adhere according to the material of the metal wiring of the bonding pad or the tab package. Since it can be easily changed by replacing with a conductive epoxy of a material having excellent properties, there is an effect of improving the reliability of the tab package.

Claims (7)

A semiconductor chip bump manufacturing method comprising: forming an insulating layer having a predetermined thickness on an entire surface of a semiconductor substrate on which metal wirings and bonding pads are formed; Removing the insulating layer to expose the bonding pads and forming a dam around the bonding pads; A step of filling up the conductive epoxy roll discharged by a distributor through the inside of the dam around the exposed bonding pad; Heat-treating the semiconductor engine to remove the organic matter in the conductive epoxy and to solidify the semiconductor engine, thereby forming a bump. The method of claim 1, wherein the insulating layer has a thickness of 10 μm or more. The method for manufacturing a semiconductor chip bump according to claim 1 or 2, wherein the insulating layer is made of one insulating glass material arbitrarily selected from the group consisting of BPSG, PSG, and USG. The method of claim 1, wherein the distributor operates by recognizing coordinates on an X-Y table. The method of manufacturing a semiconductor chip bump according to claim 1, wherein a plurality of distributors are provided. The method of manufacturing a semiconductor chip bump according to claim 1, wherein the distributor comprises a metal tube and a needle for receiving and doping the conductive epoxy to inject the conductive epoxy by pneumatic pressure. The method of manufacturing a semiconductor chip pump according to claim 1 or 2, wherein the conductive epoxy comprises one conductive material arbitrarily selected from the group consisting of solder, gold (Au) and silver (Ag).