KR100232159B1 - Method for forming channel profile of semiconductor device - Google Patents

Abstract

The present invention relates to a method for forming a channel profile of a semiconductor device, and to improve the transconductance and the short channel effect of the device by implanting Ge together with the channel ion implantation to accumulate channel dopants in the ion damage region.

Method of forming a channel profile of a semiconductor device according to the present invention comprises the steps of preparing a semiconductor substrate; Isolating a field region and an active region from the semiconductor substrate; Forming a pad insulating film on the semiconductor substrate in the active region; Implanting impurities and Ge into the pad insulating layer to form an impurity region and a Ge region on the semiconductor substrate; And annealing the impurity region and the Ge region.

Description

Channel Profile Formation Method of Semiconductor Device

1 (a) to 1 (e) are channel profile forming process diagrams of a conventional semiconductor device.

2 (a) to 2 (b) are channel profiles before and after annealing in forming a channel profile of a conventional semiconductor device.

3 (a) to 3 (e) is a channel profile forming process according to the present invention.

4 (a) to 4 (b) are channel profiles before and after annealing at the time of forming a channel profile according to the present invention.

* Explanation of symbols for main parts of the drawings

11: semiconductor substrate 12: field oxide film

13 pad oxide film 14 first impurity region

15: second impurity region

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular, transconductance of a device by forming a channel depth profile in the form of a super steep retrograde (SSR) by implanting Ge together during channel ion implantation. And a channel profile forming method of a semiconductor device capable of improving short channel effects.

A method of forming a channel profile of a conventional semiconductor device will be described in detail with reference to the accompanying drawings.

1 (a) to 1 (e) are channel profile forming process diagrams of a conventional semiconductor device.

As shown in FIG. 1 (a), in the method of forming a channel profile of a conventional semiconductor device, a semiconductor substrate 1 is first prepared, and a field region and an active region are activated on the semiconductor substrate 1 by a local oxidation process (LOCOS). A field oxide film 2 defining a region is formed.

Subsequently, as illustrated in FIG. 1B, an oxide film SiO ₂ is deposited on the semiconductor substrate 2 in the active region by chemical vapor deposition to form a pad insulating film 3.

Then, as shown in FIG. 1 (c), a first impurity region 4 is formed in the semiconductor substrate 1 of the active region by ion implantation of B or BF ₂ on the pad insulating layer 3.

Subsequently, as shown in FIG. 1 (d), In (Indium) is ion-implanted again on the pad insulating layer 3 to form a second impurity region 5 in the semiconductor substrate 1 of the active region. .

Then, as shown in FIG. 1 (e), after the ion implantation process, the semiconductor substrate 1 is maintained at a temperature of about 800 to 900 ° C. for annealing under Ar or N ₂ atmosphere for about 5 to 20 minutes. do.

At this time, after the annealing, the first impurity region 4 hardly moves toward the second impurity region 5.

2 (a) to 2 (b) show a channel profile showing a change in channel ion concentration according to a depth of a substrate during channel ion implantation during a conventional semiconductor device manufacturing process.

Since indium (In) is a heavier atom than boron when boron and indium are implanted during the manufacturing process of a conventional semiconductor device, the second impurity region 5 is A sharp profile is formed near the surface of the semiconductor substrate 1. In addition, the second impurity region 5 into which boron is implanted forms a profile widely distributed over a deep region of the semiconductor substrate 1.

On the other hand, it can be seen that the pores of the first impurity region 4 and the second impurity region 5 hardly change after the annealing process.

As described above, the channel profile forming method of the conventional semiconductor device has the following problems.

First, in the conventional method of forming a channel profile of a semiconductor device, since indium (In) is added to boron (B), which is a channel dopant, it is applicable only to an NMOS device.

Second, in the conventional method of forming a channel profile of a semiconductor device, since the impurity region into which boron is implanted is widely distributed in a deep region of the semiconductor substrate to form an SSR (Super Steep Letrograde) shape, it is not effective to improve the short channel effect.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. A method of forming a channel profile of a semiconductor device capable of improving the transconductance and short channel effect of a device by allowing channel dopants to accumulate in a damaged region during ion implantation. The purpose is to provide.

Method of forming a channel profile of a semiconductor device according to the present invention for achieving the above object comprises the steps of preparing a semiconductor substrate; Isolating a field region and an active region from the semiconductor substrate; Forming a pad insulating film on the semiconductor substrate in the active region; Implanting impurity and Ge into the pad insulating layer to form an impurity region and a Ge region on the semiconductor substrate; And annealing the impurity region and the Ge region.

A method of forming a channel profile of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

3 (a) to 3 (e) are channel profile forming process diagrams of a semiconductor device according to the present invention.

As shown in FIG. 3 (a), in the method of forming a channel profile of a semiconductor device according to the present invention, a semiconductor substrate 11 is first prepared, and a field is formed on the semiconductor substrate 11 by a local oxidation process (LOCOS). A field oxide film 12 is formed to isolate the region from the active region.

Subsequently, as shown in FIG. 3 (b), an oxide film (SiO ₂ ) is deposited on the semiconductor substrate 11 in the active region by chemical vapor deposition to form a pad insulating film 13.

Then, as shown in FIG. 3 (c), B or BF ₂ is deposited on the pad insulating layer 13 at an amount of about 1 X ^{10 12} to 1 X ^{10 13} cm ^-2 by using ion implantation energy of about 20 to 60 KeV. Ion implantation forms a first impurity region 14 in the semiconductor substrate 11 of the active region.

In this case, phosphorus (P) is used in the case of PMOS instead of B or BF ₂ .

In the case of ion implantation of P, P is ion implanted in an amount of about 1 X ^{10 12} to 1 X ^{10 13} cm ^-2 dose using ion implantation energy of a liquid of 50 to 150 KeV.

Subsequently, as shown in FIG. 3 (d), Ge is ion-implanted on the pad insulating layer 13 at an amount of 1 X ^{10 14} to 3 X ^{10 15} cm ^-2 dose using about 20 to 100 KeV ion implantation energy. A second impurity region, that is, a Ge region 15, is formed in the semiconductor substrate 11 in the active region.

Here, B or BF ₂ and Ge may be ion-implanted in reverse order.

In this case, the second impurity region 15 is distributed close and shallow from the surface of the semiconductor substrate 11, and the first impurity region 14 is distributed to the deep region of the semiconductor substrate 11.

Then, as shown in FIG. 3 (e), after the ion implantation process, the semiconductor substrate 11 is maintained at a temperature of about 800 to 900 ° C. to anneal for about 5 to 20 minutes in an Ar or N ₂ atmosphere. do.

At this time, it can be seen that the first impurity region 14 slightly moves toward the second impurity region 15 after the annealing.

4 (a) to 4 (b) show a channel profile showing a change in channel ion concentration according to a substrate depth during channel ion implantation during a manufacturing process of a semiconductor device according to the present invention.

In the case of implanting the channel ions during the fabrication process of the semiconductor device according to the present invention, for example, Ge ions at the time of BF ₂ ion implantation, as shown in FIG. The first impurity region 14 forms a wide profile from the surface of the semiconductor substrate 11 to a deep region close to and sharp.

At this time, ion implantation damage occurs in the second impurity region 15, that is, in the tail region of the Ge region profile.

In addition, the solubility of the channel dopant B or P increases in the tail region.

Therefore, as shown in FIG. 3 (e), when an annealing process is performed, channel dopants are accumulated near the tail region that is damaged during ion implantation.

At this time, since Ge is electrically neutral in Si, the first impurity region 14 is sharp in the tail region of the second impurity region 15 as shown in FIG. 4 (b). It will form a profile.

That is, Ge does not act as a channel dopant and only B acts as a channel dopant.

As described above, the channel profile forming method of the semiconductor device according to the present invention has the following characteristics.

First, in the method for forming a channel profile of a semiconductor device according to the present invention, BF ₂ or P can be used as a channel dopant, and thus it can be applied to NMOS or PMOS semiconductor devices.

Second, in the method of forming a profile of a semiconductor device according to the present invention, the transconductance of the device is formed by forming an SSR (Super Steep Retrograde) channel profile by an ion implantation process without using a separate process such as epitaxial. ) And short channel effects can be improved.

Claims (6)

Preparing a semiconductor substrate; Forming a field oxide layer on the semiconductor substrate to define a field region and an active region; Forming a pad insulating film on the semiconductor substrate in the active region; Implanting impurities and Ge into the pad insulating layer to form an impurity region and a Ge region on the semiconductor substrate; And annealing the impurity region and the Ge region. 2. The method of claim 1, wherein the impurity uses any one of B and P. 3. The method of claim 2, wherein when using B as the impurity, about 20 to 60 KeV ion implantation energy and 1 X ^{10 12} to 1 X ^{10 13} cm ^-2 dose are used. The method of claim 2, wherein when P is used as the impurity, about 50 to 150 Kev ion implantation energy and about 1 X ^{10 12} to 1 X ^{10 13} cm ^-2 dose are used. The method of claim 1, wherein the Ge uses about 20 to about 100 KeV ion implantation energy and about 1 S10 ¹⁴ to 3 S10 ¹⁵ cm ^-2 dose. And the impurity and Ge ion implantation orders are interchanged with each other.