KR100230387B1 - Apparatus for controlling graphic transparency - Google Patents

Abstract

The present invention relates to a graphics transparency processing apparatus, and more particularly, to a graphic transparency processing apparatus which includes a graphic register for storing graphic data including transparency data, color data, and position data, a graphic interpolator for inputting an output of the graphic register, The position data and the transparency data output from the graphic interpolator are input and dithered, and if the dither value of the position data is smaller than the transparency data, the output is enabled, A Dither Logic that disables output if the dither value of the dither logic is greater than the transparency data and a Dither logic that inputs the output of the dither logic and the graph interpolator, Color data and location data And a frame buffer controller for outputting color data and position data transmitted from the graphic interpolator when the output of the dither logic is disabled, thereby simplifying the hardware implementation of the graphics transparency processing apparatus, It speeds up.

Description

[0001] Apparatus for controlling graphic transparency [

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a graphics transparency processing apparatus, and more particularly, to a graphics transparency processing apparatus using a stipple masking in a computer.

The development of computers made it possible to draw pictures on computers. Computers have been able to draw pictures such as photographs of real objects using special hardware and efficient programs. The work of drawing a life-like picture has become a general trend for computer graphics functions in the last few years. In addition, many people have been concentrating on how to construct various pictures as a computer, considering the idea that a camera could represent images that could not be images with computers until now. So now we have reached a level where graphics can be shown in three dimensions. One of the methods for three-dimensionally displaying graphics on a computer monitor is stipple masking. Stypic masking refers to drawing a part of an object using a specific pattern without drawing the entire object when an object is displayed on a monitor. The specific pattern used at this time is usually in the form of a mesh. If the pattern to be applied is '0101', the object and background color are alternately displayed on the screen. In this case, the object that you are drawing now seems to be a translucent object.

One of the techniques of 3D graphics is to express transparent (or translucent) objects, called alpha blending. Alpha Blending is a way to read the background color of an object before it is drawn, mix it proportionally with the current object color, and output it back to the screen. This method has the advantage of excellent image quality, but it has a disadvantage that its performance is reduced because it has to read the background color. Therefore, in an application that emphasizes performance rather than image quality, alpha blending is used instead of alphablending with the above-mentioned sty- chasing masking.

1 is a block diagram of a conventional computer graphics transparency processing apparatus. The block diagram shown in Fig. 1 shows that graphics are performed with stipple masking. 1, a graphic register 13, a graphic interpolator 15, and a frame buffer controller 17 are connected to a PCI (Peripheral Component Interface) bus 11, And a frame buffer 19 are sequentially connected. A mask register 20 is separately connected between the PCI bus 11 and the frame buffer controller 17.

A process of stipple masking of a computer graphic will be described with reference to FIG. When RGB data as color data and xy data as position data are input from the PCI bus 11 to the graphic register 13, the graphic register 13 temporarily stores the RGB and xy data. The RGB and xy data stored in the graphic register 13 are transferred to the graphic interpolator 15 by an external command. The graphic interpolator 15 interpolates the RGB and xy data. The interpolated RGB and xy data are transmitted to the frame buffer controller 17. In this state, the mask register 20 is compared with the mask pattern input from the PCI bus 11, and the RGB and xy data stored in the frame buffer controller 17 are output to the frame buffer 19 It is decided whether or not to say. If the mask pattern of the mask register 20 is '0101', when the mask pattern is '1', the RGB and xy data stored in the frame buffer controller 17 are transferred from the frame buffer controller 17 to the frame buffer When the mask pattern is '0', the RGB and xy data stored in the frame buffer controller 17 are not output to the frame buffer 19.

However, in order to display various objects, the mask pattern stored in the mask register 20 must be changed to be different each time an object to be displayed is changed. This is because, according to FIG. 1, only one pattern is applied when an object is drawn. Therefore, since many types of mask patterns are used when drawing various objects, it takes a long time to transfer graphics from the PCI bus 11 to the frame buffer 19.

As described above, according to the conventional staple masking, it takes a lot of time to draw various objects. Also, the hardware of the mask register 20 becomes larger as the amount of the graphic data increases. As a result, the area occupied by the graphics transparency processing apparatus increases when the semiconductor chip is manufactured, so that the semiconductor chip becomes large, thereby increasing the manufacturing cost of the semiconductor chip.

An object of the present invention is to provide a computer graphics transparency processing apparatus having a short graphic execution time and simple hardware implementation.

1 is a block diagram of a conventional computer graphics transparency processing apparatus.

2 is a schematic block diagram of a general computer shown to explain a graphics transparency processing apparatus;

3 is a block diagram of a computer graphics transparency processing apparatus according to the present invention;

4 is a flowchart illustrating a method of processing transparency of a computer graphic according to the present invention.

According to an aspect of the present invention,

A graphics interpolator for inputting an output of the graphic register and executing interpolation of the graphic data, a graphics interpolator for interpolating the position data and transparency output from the graphic interpolator, Dither logic for inputting data, dithering the position data, enabling output if the dithering value of the position data is less than the transparency data, and disabling output if the dithering value of the position data is greater than the transparency data, and And outputs the color data and the position data transmitted from the graphic interpolator when the output of the dither logic and the graphic interpolator are enabled. When the output of the dither logic is disabled, From And a frame buffer controller which does not output the color data and the position data.

Preferably, the graphics transparency processor is used in a computer and integrated into a semiconductor chip.

According to the present invention, the graphic execution time is shortened and the area of the semiconductor chip is reduced.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a schematic block diagram of a general computer shown to explain a graphics transparency processing apparatus. 2, there is a central processing unit (CPU) 21 for operating a graphics transparency processing apparatus, and a PCI bus 23 and a graphic transparency processing unit (not shown) are connected to the output end of the central processing unit 21 25 and a monitor 27 are sequentially connected. In order to perform a graphics function through the graphic transparency processing unit 25, graphic data is input from the PCI bus 23 to the graphic transparency processing unit 25 by an instruction of the central processing unit 21 do. Then, the transparency processor 25 performs a graphic function using the graphic data, and then outputs the result to the monitor 27 to display the graphic on the monitor 27.

FIG. 3 is a block diagram of a computer graphics transparency processing apparatus according to the present invention, and is a graphics transparency processing apparatus using stipple masking. 3 is a block diagram of an apparatus for processing computer graphics transparency. 3, a graphics register 31, a graphic interpolator 33, a dither logic 35, a frame buffer controller 37, and a frame buffer 39 are connected to the PCI bus 23 Are sequentially connected.

The graphic register 31 temporarily stores graphic data RGBAxy composed of transparency data A (Alpha), color data RGB (Red, Green, Blue) and position data xy received from the PCI bus 23.

The graphic interpolator 33 interpolates the RGBAxy received from the graphic register 31 and outputs the interpolated RGBAxy. The interpolation method is applied not only to the color but also to the position and transparency. The quality of the picture quality of the computer screen is determined according to the suitability of the interpolation method.

The dither logic 35 receives A and xy of RGBAxy output from the graphic interpolator 33 to control the transparency of xy. The dither function used in the dither logic 35 will be described. It is assumed that xy is configured as 4 bits and its contents are as shown in Table 1 below.

[Table 1]

In Table 1, a method of obtaining each 1-bit value of the dither value of each cell is expressed by Equation 1 below.

[Equation 1] d [0] = y [1]

d [1] = x [1] [y] [1]

d [2] = y [0]

d [3] = x [0] y [0]

The dither value of A can be obtained using Equation (1) as follows.

d [0] = 0,

d [1] = x [1]? y [1] = 0? 0 = 0

d [2] = y [0] = 0

d [3] = x [0]? y [0] = 0? 0 = 0

Therefore, the dither value d [3: 0] of A is '0000'.

A method of obtaining the dither value of B using the above Equation 1 is as follows.

d [0] = 0,

d [1] = x [1]? y [1] = 1? 0 = 1

d [2] = y [0] = 0

d [3] = x [0]? y [0] = 0? 0 = 0

Therefore, the dither value d [3: 0] of B is '0010'.

A method of obtaining the dither value of E using Equation (1) is as follows.

d [0] = y [1] = 1,

d [1] = x [1] y [1] = 0 1 = 1

d [2] = y [0] = 0

d [3] = x [0]? y [0] = 0? 0 = 0

Therefore, the dither value d [3: 0] of E is '0011'.

The values of the cells obtained using Equation (1) are also shown in Table 2 below.

[Table 2]

Table 1 and Table 2 correspond to each other. In order to compare the value of each cell of Table 2 with the transparency, the following conditional statement is used.

If stipple mask = 1 (d [3: 0] < A [7: 4]

Otherwise, stipple mask = 0 '

Here, A [7: 4] represents the value of the upper 4 bits among 8 bits of transparency as the value of transparency. According to the above conditional, if the dither value of each cell is smaller than the value of the upper 4 bits of transparency, the output of the dither logic 35 is enabled, that is, becomes logic '1' If the value of the upper 4 bits is larger than the value of the upper 4 bits, the output of the dither logic 35 is disabled. That is, it becomes logic '0'. If the output of the dither logic 35 is logic '0', the color of the object is not transmitted. So this part shows the background color that was left before, so the object looks transparent. If the output of the dither logic 35 is logical '1', the object of this part appears opaque because the color of the object is transferred to the frame buffer 39.

The frame buffer controller 37 outputs the RGBxy to the frame buffer 39 when the output of the dither logic 35 is enabled and outputs the RGBxy when the output of the dither logic 35 is disabled Do not.

The frame buffer 39 stores RGBxy received from the frame buffer controller 37 and periodically outputs the RGBxy to the monitor (27 in FIG. 2).

The block diagram shown in FIG. 3 is used as it is integrated with the semiconductor chip.

4 is a flowchart illustrating a method of processing transparency of a computer graphic according to the present invention. The graphic transparency processing method will be described with reference to FIG. First, graphic data composed of transparency data A transmitted from a PCI bus, RGB (color data), and xy (position data) are interpolated in an interpolator (step 51). Among the graphic data interpolated by the interpolator, A and xy are dithered in the dither logic (operation 53). That is, transparency is determined. When the output of the dither logic is enabled, the color data and the position data are transmitted to the rear end, and when the output of the dither logic is disabled, the color data and the position data are not transmitted to the rear end.

3 and 4, the graphic transparency processor 25 of the present invention has a simpler hardware and a higher processing speed of graphics data than the conventional graphics transparency processor 10.

It is obvious that the present invention is not limited to the above embodiments and that many modifications are possible within the technical scope of the present invention by those skilled in the art.

As described above, according to the present invention, the hardware of the graphics transparency processing apparatus is simplified and the processing speed of the graphic data is increased.

Claims (3)

A graphic register for storing graphic data including transparency data, color data, and position data; A graphic interpolator for inputting an output of the graphic register and interpolating the graphic data; Wherein the position data and the transparency data output from the graphic interpolator are input and the position data is dithered. If the dither value of the position data is smaller than the transparency data, the output is enabled, and the dither value of the position data is converted into the transparency data Dither logic to disable output if greater; And And outputs the color data and the position data transmitted from the graphic interpolator when the output of the dither logic and the graphic interpolator are enabled. When the output of the dither logic is disabled, And a frame buffer controller which does not output color data and position data transmitted from the frame buffer controller. The apparatus of claim 1, wherein the graphics transparency processing device is used in a computer. The apparatus of claim 1, wherein the graphic transparency processor is incorporated in a semiconductor chip.