KR100228361B1 - Raster corrected vertical deflection circuit - Google Patents

Abstract

The two windings W2a and W2b of the flyback transformer T1 in the horizontal deflection circuit are inductively coupled in opposite polarity to the source of the horizontal frequency retrace pulse 12. The winding has a joint junction coupled to ground. The circuits L1, C1, L2, C2 excited by the retrace pulse generate a modulated current of opposite polarity. The transfer of each current is controlled by switch circuits 18 and 20 comprising semiconductor switches Q1 and Q2 and two diodes D1-D4. The switch circuit is coupled to one junction with each other, which junction is coupled to an energy storage capacitance C3. One of the diodes delivers a positive portion of each current through an energy storage capacitance and the other diode delivers a negative portion of each current through a semiconductor switch. Each semiconductor switch is a current discharge path. The energy storage capacitance is responsive to a current that generates a vertical deflection voltage in phase with the horizontal frequency current to drive the vertical deflection current in the vertical deflection yoke LV. The vertical deflection current is related to the amplitude difference between the bipolar currents. The up-and-down pincushion correction current in phase with the horizontal deflection current is generated by integrating the vertical deflection voltage V1 in the vertical deflection yoke. The upper and lower pincushion transformers T2 are secondary windings W4 forming part of a horizontal frequency resonant circuit coupled in series to the vertical deflection yoke LV and primary windings capacitively coupled to the energy storage capacitance C3. Has

Description

Switching vertical deflection system

1 is a partial block diagram of a switchable vertical deflection circuit in accordance with the inventive arrangements.

2 (a) to 2 (f) are waveform diagrams useful for explaining the operation of the circuit shown in FIG.

3 is an exemplary vertical deflection circuit diagram in accordance with the inventive arrangements.

* Explanation of symbols for main parts of the drawings

10: switching vertical deflection system 14: control circuit

18,20: switching network

The present invention relates to the field of vertical deflection circuits. In particular, it relates to the field of switched vertical deflection circuits.

A new generation of color television imager-yoke combinations may require top-bottom pincushion correction. Another need may be a DC coupling between the vertical deflection amplifier and the deflection yoke, for example when forming an AA-BB display free of flicker. In the AA-BB display, since each field is scanned twice in succession at twice the normal scan frequency, a DC coupled vertical deflection circuit that generates a vertically modulated horizontal frequency waveform applied to a simple up-down pincushion correction circuit. Is preferred.

Some of these characteristics suggest that switchable vertical deflection circuits may be appropriate. In any case, this switchable vertical deflection circuit may have the following disadvantages.

The first type of switchable vertical circuit is a synchronous switchable vertical deflection circuit, often referred to as SSVD, which uses two thyristors, which are modulated at the time of the horizontal retrace period. Is turned on. The use of high speed thyristors can require very expensive and complex control circuits. Examples of SSVD circuits are shown in the following U.S. Patent Nos. 4,041,354, 4,079,293, 4,096,415, 4,117,380, and 4,338,549.

The second type of switchable vertical circuit is a switch mode vertical deflection circuit, often referred to as SMVD, which uses two switching transistors, which are turned on at the time of modulation during the horizontal trace period. This produces strong phase modulation of the horizontal frequency waveform and therefore cannot be used for up-down raster correction. Examples of SMVD circuits are shown in US Pat. No. 4,174,493.

A third type of switchable vertical circuit is a single switch vertical deflection circuit using a transistor switch or a thyristor having an antiparallel diode. The phase changes from horizontal retrace to horizontal trace, from top to bottom. Examples of this third kind of switchable vertical circuit are described in the following U.S. Patent Nos. 4,296,360, 4,544,864, and US Patent Application No. 515,901. Thus, up-down raster correction cannot be obtained.

Furthermore, another disadvantage is that the three types of circuits described above require a tube protection circuit that shuts down the receiver when one drive signal of each switch deviates to prevent the tube from being damaged from DC overcurrent.

The device of the present invention converts the horizontal energy directly into a vertical deflection current to provide a new switchable vertical deflection system, where the horizontal tooth voltage modulated vertically across the vertical deflection yoke can provide up-down pincushion correction. have. The primary and secondary windings are inductively coupled in opposite polarity from the horizontal deflection circuit to the source of the horizontal frequency retrace pulse. The windings may form part of a horizontal flyback transformer in a horizontal deflection system operating at a horizontal frequency. The circuit excited by the retrace pulse produces a modulated current of opposite polarity. This modulation current generating circuit includes a switching network for directing portions having the positive and negative values of the current to different paths. The negatively charged portion of the current is coupled to ground through a switch along the discharge path. The modulated amount of the polarized portion of the current is transferred through the energy storage medium along the charge path. The energy storage device responds to the current and generates a vertical deflection voltage in phase with the current to drive the vertical deflection current in the vertical deflection yoke. The vertical deflection voltage reflects the pure average charge generated by charging with current in the opposite direction. The net average charge is determined by subtracting the portion that is priced as the polarity of one current from the portion that is priced as the polarity of other currents. The vertical deflection voltage is not easy to phase modulate in the prior art switchable vertical system. Thus, the up-and-down pincushion correction current in phase with the horizontal deflection circuit is generated by integrating the vertical deflection voltage in the vertical deflection yoke. A horizontal frequency waveform of the correct phase is provided for the up-down raster correction, and other correction circuitry.

The apparatus also provides a switchable vertical deflection system that can provide improved up-down pincushion correction by using a pincushion transformer. The pincushion transformer has a primary winding capacitively coupled to the energy storage device and a secondary winding that forms part of a horizontal frequency resonant circuit coupled in series to the vertical deflection yoke.

The device eliminates the need to shut down the receiver to avoid damaging the tube from DC overcurrent when one drive signal of the switch in the switchable vertical deflection system deviates. In the prior art switchable vertical deflection system, the winding of the flyback transformer is DC coupled in series with an inductor which is DC coupled to the switch or switching network and the energy storage device. In the switched vertical deflection system shown here, each inductor can be AC coupled to each switch or switching network and energy storage device by a capacitor.

The device provides a number of advantageous topological features that contribute to improved operation of the switchable vertical deflection system. The windings of the flyback transformer coupled to the source of the horizontal retrace pulse are coupled together at the first junction, where the first junction is coupled to ground. The windings can be separated and are actually the same winding. Alternatively, the windings may actually be the other half of the center tapped winding, in which case the center tap is coupled to ground. The first and second switches, or switching networks, are respectively coupled to the primary and secondary windings and coupled together at the second junction. An energy storage device for generating a vertical deflection voltage is coupled to the second junction. Each energy storage device is coupled to an inductance, which in itself is coupled to each winding. The energy storage device is reversely charged by each current flowing through the windings. The energy storage device is coupled to each switch or switching network and provides access for current modulation control. The energy storage device can be embodied as a capacitor and also provides the AC coupling described above.

Switchable vertical deflection system 10 is shown in FIG. 1. The horizontal deflection circuit 12 as known in the prior art is coupled to the winding W1 of the flyback transformer T1. The horizontal deflection circuit may operate at the horizontal scan frequency f _H , for a typical interlaced scan. For example, the scan at f _H may correspond to a frequency of approximately 15,750 Hz for the NTSC interlaced standard approach. The horizontal deflection circuit 12 may also operate at multiples thereof, eg 2f _H , for sequential scanning. Scanning frequencies f _H and 2f _H have different values for the PAL and SECAM standards.

Flyback transformer T1 has another winding W2 inductively coupled to winding W1. Winding W2 has center tab 16 coupled to ground. The center tap 16 defines two windings, or portions of the windings W2a and W2b that are opposite in polarity with respect to each other. Thus, the positive retrace pulse is generated by the winding W2a and the negative retrace pulse is generated by the winding W2b. Windings W2a and W2b receive energy from the horizontal deflection system by retrace pulses. This energy is useful for the switched vertical deflection system 10 which generates a vertical deflection current in the vertical deflection yoke.

In short, as will be explained in more detail below, the flyback transformer T1 is connected to the vertical deflection yoke by currents i1 and i2 along respective conductive paths between the respective windings W2a and W2b and the storage capacitor C3. Supply energy from the horizontal deflection system. Current i3, which is the difference between currents i1 and i2, charges storage capacitor C3 at a horizontal frequency. Storage capacitor C3 generates a vertical deflection voltage V1. Capacitor C3 discharges to deflection yoke LV to generate vertical deflection current i4. The feedback loop comprising resistor R3 linearizes and stabilizes the deflection circuit. The control circuit 14 generates a base drive signal for the switching transistors Q1 and Q2.

Each conductive path for currents i1 and i2 includes a respective storage coil or inductor L1 and L2, a respective coupling capacitor or energy storage device C1 and C2, and a respective diode D2 and D3. Diodes D2 and D3 are polarized for conduction of the horizontal retrace current.

Diodes D1 and D2 and transistor Q1 form a switching network 18 or first switch operatively associated with current i1. Diodes D3 and D4 and transistor Q2 operatively form a switching network 20 or second switch associated with current i2. Diodes D1 and D4 are also used to isolate transistors Q1 and Q2 from the reverse voltage present at the collector during horizontal retrace. Switching networks 18 and 20 are responsive to control circuit 14, the operation of which is described in more detail with reference to FIG.

When transistor Q1 is not conducting, capacitor C1 charges negatively at the junction of diodes D1 and D2 in response to a bipolar retrace pulse on winding W2a. When transistor Q2 is not conducting, capacitor C2 charges positively at the junction of diodes D3 and D4 in response to a negative retrace pulse on winding W2b. Capacitors C1 and C2 charge up to the peak horizontal retrace voltage applied by windings W2a and W2b, respectively. When transistors Q1 and Q2 are not conductive, current i3 does not flow, and capacitor C3 does not receive any charge. The vertical deflection current i4 in the vertical deflection yoke LV remains at zero.

Bipolar currents i1 and i2 are controlled by the discharge amount of capacitors C1 and C2, respectively. The discharge amounts of the capacitors C1 and C2 are controlled by modulating the conduction time of the transistors Q1 and Q2, respectively. As described below, the transistors Q1 and Q2 are switched on at the time of change in the period t5-t6 of FIGS. 2 (a) to 2 (f). Transistors Q1 and Q2 are turned off during the horizontal retrace period when diodes D1 and D4 are reverse biased by the horizontal retrace pulse.

In summary, at the start of the vertical trace, transistor Q1 is turned on at time t5 and transistor Q2 is turned on at time t6. This causes a large bipolar current i1 to flow to time t4 'and a small bipolar current i2 to flow to time t3'. The flow of currents i1 and i2 is due to the energy stored during horizontal retrace in coils L1 and L2, respectively. The time point when transistor Q1 is turned on is gradually delayed from time t5 to time t6 during the vertical trace. During the same period, the time point at which transistor Q2 is turned on progresses progressively from time t6 to time t5. This decreases the amplitude of the current i1 and increases the amplitude of the current i2, as shown on the right side of FIG. 2 (b).

Yoke current is obtained when capacitors C1 and C2 are discharged by transistors Q1 and Q2, respectively. Bipolar yoke current is obtained when transistor Q1 is saturated. The bipolar retrace voltage generates a charging current flowing to ground through the inductor L1, the capacitor C1, the diode D2, and the capacitor C3, thereby generating a bipolar voltage across the capacitor C3. When the charge current drops to zero during the first half of the horizontal trace period, the charge or voltage across capacitor C1 reverse biases diode D2 and causes diode D1 to be forward biased. Capacitor C1 starts to discharge diode D1 and saturated transistor Q1 for the remaining half of the horizontal trace time.

The negative yoke current is obtained when transistor Q2 is saturated. The negative retrace voltage generates a charging current flowing from the capacitor C3, the diode D3, the capacitor C2, and the inductor L2 from ground, thereby generating a negative voltage across the capacitor C3. When the charge current drops to zero during the first half of the horizontal trace period, the charge or voltage across capacitor C2 causes the diode D3 to be reverse biased and the diode D4 forward biased. Capacitor C2 begins to discharge through diode D4 and saturated transistor Q1 for the remaining half of the horizontal trace time.

Thus, the magnitude and polarity of the deflection current i4 is determined by the amount of discharge current flowing through the transistors Q1 and Q2. Transistors Q1 and Q2 can operate in a switching scheme, ie even in the A class, providing a current sink or current source. Bipolar transistors Q1 and Q2 as shown in FIG. 1 may be replaced by any other device that provides a controllable discharge path. In the following description, transistors Q1 and Q2 operate in a switching manner to minimize waste.

Numerous waveforms useful for describing the operation of the switched vertical deflection system 10 are shown in various parts of FIGS. 2 (a) to 2 (f). The left side of each part of Figs. 2 (a) to 2 (f) shows a horizontal frequency waveform, and the right side shows a corresponding vertical frequency waveform. The time axis of the vertical frequency waveform is displayed for the top, middle, and bottom of the display or field. The vertical retrace period is between the bottom of the field and the top of the next consecutive field. FIG. 2 (a) only shows the horizontal frequency litlace pulse. Figure 2 (b) shows separate vertical frequency waveforms for currents i1 and i2 shown together at the horizontal frequency. The upper part of the vertical frequency waveform for the currents i1 and i2 represents the portion that is bipolarly valued of the currents i1 and i2 flowing through the diodes D2 and D3, respectively. The lower part of the vertical frequency waveform for currents i1 and i2 represents the negatively valued portion of currents i1 and i2 flowing through transistors Q1 and Q2, respectively. FIG. 2 (c) shows the current i3. FIG. 2 (d) shows the voltage V1. FIG. 2 (e) shows the voltage V2. FIG. 2 (f) shows only the vertical frequency current i4.

In operation, the deflection current i4 begins to flow from bipolar freck amplitude at the beginning or top of the vertical trace. At the top, transistor Q1 switches to saturation at time t5, substantially discharging (C1). As a result, a large amplitude charging current i1 flows through the diode D2. The horizontal retrace energy stored in the coil L1 causes the bipolar current i1 to flow t4 '. Transistor Q2 is turned on at t6, which generates small discharge current i2, and eventually small discharge current i2 flows through diode D3 to time t3 '. The vertical deflection yoke is driven by a current i3 subtracted from the positively priced portion of the current i1 by the subtracted portion of the current i2. The current i3, which is the waveform shown in FIG. 2 (c), charges the capacitor C3 which generates the waveform voltage V1 shown in FIG. 2 (d). The voltage V1 increases until the amplitude of the current i3 is smaller than the amplitude of the deflection current i4. The deflection current i4, which is the waveform shown in FIG. 2 (f), is obtained by discharging the capacitor C3 through the vertical deflection yoke LV and the current sampling resistor Rs. The deflection yoke LV integrates the horizontal frequency voltage across the capacitor C3 to substantially the vertical frequency current of the sawtooth wave. Due to the large inductance of the deflection winding, the discharge current cannot follow the horizontal frequency voltage, which is almost triangular across capacitor C3. As a result, the current i4 flowing through the deflection winding occurs as an average of the voltage across the capacitor C3. Therefore, the deflection winding acts as a current sink and discharges capacitor C3. The vertical retrace period is determined by the parallel resonant frequency of the capacitor C3 and the deflection winding. The sawtooth voltage V1 integrated by the high inductance of the deflection yoke LV generates at least some parabolic up-down raster correction current. A deflection current sample across the sampling resistor Rs is fed back to the control circuit 14 to linearize the operation of the deflection circuit.

During the first half of the vertical trace, ie from top to center, the turn-on time of transistor Q1 is gradually slowed from t5 to time t6. During the same period, the turn-on time of transistor Q2 progresses gradually from time t6 to time t5. The amplitude of the current i3 subtracting the positively charged portion of the current i2 from the positively charged portion of the current i1 also decreases gradually. As a result, the amplitudes of voltage V1 and current i4 also decrease gradually. The amplitude of the polarized portion of the currents i1 and i2 is equal to the center of the vertical trace. As a result, the current i3, the voltage V1 and the current i4 are zero. Current i1 flows through diode D2 and transistor Q1, and current i2 flows through diode D3 and transistor Q2.

For the remaining half of the vertical trace, transistor Q1 continues to turn on and gradually slows from time t5 to time t6. Transistor Q2 continues to turn on and gradually progresses from time t6 to time t5. This also gradually decreases the current i1 and gradually increases the current i2. As a result, the current i3, the voltage V1 and the current i4 gradually increase in the negative direction.

When the turn-on time of transistor Q1 is rapidly moved from time point t6 to t5, the vertical retrace begins and transistor Q2 remains in the cut off state. This causes a half cycle of retrace resonance between the vertical deflection yoke LV and the capacitor C3, causing a fast and lossless reversal of the deflection current i4. When the vertical deflection current i4 changes quickly in that direction, as shown on the right side of the waveform 2 (d) diagram showing the voltage V1, a retrace voltage pulse having a large amplitude and a narrow interval is generated. As described above, the turn-on times of transistors Q1 and Q2 are modulated for a period from time t5 to t6 to obtain a modulated current i3 that begins to flow in the center of the horizontal retrace and ends at time t4 '. Transistors Q1 and Q2 are turned off so that diodes D1 and D4 do not conduct in half of the retrace period.

The circuit requires some overlap of currents i1 and i2 to prevent distortion or discontinuity of the deflection current. This is illustrated by the vertical frequency waveforms of currents i1 and i2. The overlap current is largest at the center of the vertical trace when current i3 is zero. The overlap current decreases from the center to the top and bottom. The overlap current can be determined by subtracting current i3 from current i1 for the first half of the trace and subtracting i3 from current i2 for the second half of the trace.

Since the current i3 is formed by the difference in the portion of the bipolar values of the currents i1 and i2, the duration of the envelope is not modulated. For this reason, the horizontal tooth voltage V1 becomes in phase with the horizontal retrace pulse, and the peak of the voltage V1 appears at the time t4 when the current i3 decreases to zero. This drives the upper-lower pincushion correction circuit 22 as shown in FIG. 1 by the voltage V1. Pincushion transformer T2 couples its primary winding W3 to capacitor C3 via capacitor C4, which secondary winding W4 forms a line frequency resonant circuit with capacitor C5, and deflection The sinusoidal voltage V2 modulated in the vertical direction shown in FIG. 2 (e) is generated below the yoke LV. This voltage V2 generates a cosine wave (90 degree phase shifted) raster correction current required for raster correction in the vertical deflection yoke LV. In other words, the sawtooth voltage V1 of the horizontal frequency is applied to the primary winding W3 of the transformer T2 via the capacitor C4. Secondary winding W4 forms a horizontal frequency resonant circuit with capacitor C5 to generate a modulated sine wave voltage V2 to generate a modulated sine wave voltage V2, which is subjected to up-down raster correction. Inject the required cosine wave current into the yoke winding. Zero-crossing of the horizontal frequency envelope of voltage V2 is not modulated. Also, the zero crossing is always at the center of the horizontal retrace period. Voltage V1, in phase with the horizontal frequency waveform, can be used in other circuits to correct for dynamic convergence, mustache and wing distortion.

The vertically shaped yoke LV is DC coupled to the switching transistors Q1 and Q2 and the control circuit 14. For this reason, this circuit is used for a receiver having a feature that requires dynamic raster movement other than the AA-BB display. In addition, the winding W2 of the flyback transformer is AC coupled to the vertical deflection circuit by the capacitors C1 and C2. This AC coupling allows the operation of the deflection circuit without the image tube protection circuit. The member of the base drive of one or both of the transistors Q1 and Q2 does not generate a DC overcurrent in the vertical deflection yoke LV which may damage the image tube.

The value of capacitor C3 is matched to the inductance of the vertical deflection yoke LV to form an accurate vertical retrace time. In addition, the voltage V1 needs to decrease to almost ground voltage at time t1 '. The average horizontal retrace voltage or trace voltage of the winding portions W2a and W2b should be twice the required peak voltage of the vertical biasing yoke LV. The values of the inductors L1 and L2 and the capacitors C1 and C2 are equal. Each component value is selected such that the amplitude and waveform required for the currents i1 and i2 are obtained.

3 shows a schematic diagram of a more complete circuit for a switchable vertical deflection circuit 10 adapted to operate using an A68 EAUOOXO1-type video color 110 degree SP image tube. Various operation waveforms are similar to those shown in FIGS. 2 (a) to 2 (f). The peak-to-peak values of current and voltage can be seen directly from the recorded waveform.

The control circuit uses a quad voltage comparator U1. Each output transistor Q1, Q2 is driven by two comparators U1a, U1b, or U1c, U1d connected in parallel to obtain proper base drive. The non-linear horizontal ramp voltage V3 is generated by the network 24 comprising the resistor R14 and the capacitors C11 and C12. In this network 24, the negative retrace pulse from the winding W2b is input. In addition, the non-linear horizontal ramp voltage V4 is generated by the network 26 including the resistor R16 and the capacitors C13 and C14. In this network 26, the bipolar retrace pulse from the winding W2a is input. Voltage waveforms V3 and V4 are shown on the right side of FIG. The voltage divider formed by the resistor R12 and the adjustable resistor R13 is for center adjustment.

The vertical sawtooth input current i5 is combined with the vertical feedback current i6 at the junction of resistors R3 and R4 to generate a vertical drive voltage V5. This vertical drive voltage V5 is compared with the respective ramp voltages V3 and V4 to generate a modulated transistor switching pulse during the period t5-t6. Nonlinearity of the horizontal frequency ramp voltages V3 and V4 prevents instability during vertical retrace, in particular during the sharp negative peak of voltage V5. Without the nonlinearity shown, transistor Q1 may turn on too early to cause some ringing at the top of the raster.

The overlapping operation of the output stage described above with reference to FIGS. 1 and 2 (a) to 2 (f) is obtained by the overlap of the horizontal ramp voltages V3 and V4, which is apparent from the example of FIG. Overlap is controlled by circuitry 24, where resistor R15 and diode D7 charge capacitor C12 negatively, reducing the natural overlap of lamp voltages V3 and V4. That is, the network 24 sets the DC level of the lamp voltage V3.

The peak collector voltage of transistors Q1 and Q2 is approximately 70 volts during the vertical trace. During vertical retrace, capacitor C2 is clamped by diode D3 to the retrace voltage of the vertical deflection yoke, so the collector voltage of transistor Q2 increases to approximately 150 volts. In transistor Q2, Zener diodes D5 are connected in parallel for protection during retrace. This zener diode D5 limits the collector voltage of transistor Q2 to approximately 120 volts. The peak-to-peak value of the pincushion correction current of the deflection yoke LV is approximately 100 Hz, which corresponds to approximately 14% pincushion distortion.

The load on the flyback transformer T1 is symmetrical compared to other switchable vertical deflection circuits. This prevents horizontal raster distortion in the left-right direction. DC power is not needed. AC coupling between the flyback transformer and deflection circuit provided by capacitors C1 and C2 acts to protect the image tube from excess yoke current in the absence of the base drive of transistors Q1 and Q2. This circuit can be applied to different yoke impedances by changing the component values. In addition, by omitting transformer T2 and its related components, an operation without up-down raster correction can be realized. By DC coupling of the yoke, a 2f _H , 100 Hz field sequential (AA-BB) operation is possible, and in this 2f _H , 100 Hz operation, it is necessary to change a component that determines the frequency.

Claims (30)

Means W2a and W2b that are energized by the horizontal frequency pulse source 12 to generate respective charge and discharge currents; Means (Q1, Q2) for modulating the currents into currents with zero values substantially coincident with the center of the horizontal retrace period; Vertical deflection yoke LV; And in response to the modulated current drive a vertical deflection current i4 in the vertical deflection yoke and substantially equal to the center of the zero-crossing and horizontal trace periods substantially coincident with the center of the horizontal retrace period. In the switchable vertical deflection system having an energy storage means C3 for generating a vertical deflection voltage V1, the maximum value coinciding with is obtained by integrating the horizontal deflection voltage V1 so as to integrate the vertical deflection yoke LV. Switchable vertical deflection system, characterized in that the up-and-down pincushion correction current is generated. 2. The switchable vertical deflection system of claim 1, wherein the charge and discharge currents are bipolar currents having a zero crossing point substantially coincident with the center of the horizontal retrace period. The switchable vertical deflection system of claim 1, wherein the vertical deflection current is related to an amplitude difference between the bipolar portion of the charging current and the bipolar portion of the discharge current. 2. The switched vertical deflection system according to claim 1, wherein the horizontal frequency pulse source (12) is AC coupled to the modulation means (Q1, Q2). 2. The switchable vertical deflection system according to claim 1, wherein the modulation means (Q1, Q2) switch the flow of current flowing through the energy storage means (C3) in the negative portion of the charge and discharge currents. 3. . 2. The switchable vertical deflection system of claim 1, wherein the modulating means directs the positive and negative portions of the charge and discharge currents in different paths. 2. The secondary winding (W4) according to claim 1, wherein the primary winding (W3) is capacitively coupled to the energy storage means (C3), and is part of a horizontal frequency resonant circuit coupled in series to the vertical deflection yoke (LV). Switchable vertical deflection system, characterized in that it comprises a transformer (T2) with. Transformer windings W2a and W2b of opposite polarity coupled to source 12 of a first deflection current, inductances L1 and L2 coupled to the transformer windings, respectively, and coupled to the inductances and the winding 10. A deflection system having respective energy storage means (C1, C2) which are charged oppositely by respective currents flowing through them, comprising: other energy storage means (C3) coupled to each of said energy storage means (C1, C2); A deflection yoke (LV) for conducting a second deflection current driven by said other energy storage means (C3); Respective switching means coupled to the respective energy storage means C1 and C2 for controlling respective conductive paths between the respective energy storage means and the other energy storage means C3 to transfer respective amounts of energy ( Q1, Q2); And control means (14) for controlling said respective switching means. 9. Deflection system according to claim 8, wherein the windings (W2a, W2b) are coupled at a junction and the junction is coupled to ground. 9. Deflection system according to claim 8, characterized in that the windings (W2a, W2b) are different parts of the substantially center-tapped winding, the center tap (16) being coupled to ground. 9. Deflection system according to claim 8, wherein the respective inductances consist of inductors (L1, L2) coupled to respective said windings. 9. The apparatus of claim 8, wherein each switching means comprises: switches (Q1, Q2) responsive to said control means (14); First diodes (D1, D4) coupled to the switches (Q1, Q2) and the respective energy storage means (C1, C2); And second diodes D2 and D3 coupled to the respective energy storage means C1 and C2, the first diodes D1 and D4, and the other energy storage means C3. Deflection system. 10. The method of claim 9, wherein the respective inductances and the respective energy storage means are composed of inductors L1, L2 and capacitors C1, C2 coupled to the respective windings W2a, W2b. Deflection system. 14. The apparatus of claim 13, wherein each switching means comprises: switches (Q1, Q2) responsive to said control means (14); First diodes (D1, D4) coupled to the switches (Q1, Q2) and the respective energy storage means (C1, C2); And a second diode (D2, D3) coupled to said respective energy storage means, said first diode (D1, D4), and said other energy storage means (C3). Coupled to a transformer coupled to a horizontal frequency pulse source 12 to generate a first current i1 and a second current i2, respectively, to generate a composite current i3 from the first and second currents. First and second switching means (Q1, Q2) having respective outputs coupled together at the first junctions (D2, D3); Means (C3) coupled to said first junction and generating a vertical deflection control voltage (V1) for driving a vertical deflection current (i4) in response to said combined current; A vertical deflection yoke (LV) driven by the vertical deflection current; And control means (14) for controlling said first and second switching means to modulate said first and second currents. 16. The switchable vertical deflection system of claim 15, wherein the horizontal frequency pulse source comprises a flyback transformer (T1) consisting of primary and secondary windings (W2a, W2b) each having a ground terminal. A flyback transformer T1 having a vertical deflection yoke LV and primary and secondary windings W2a and W2b coupled to a horizontal deflection current source 12, the primary and secondary windings respectively; 13. A switchable vertical deflection system having a ground terminal, comprising: first and second switching means (Q1, Q2) coupled to the primary and secondary windings, respectively, to modulate energized current by the horizontal deflection current; Means for generating a vertical deflection control voltage V1 for driving a vertical deflection current in the vertical deflection yoke LV in response to the modulated current coupled to the first and second switching means Q1, Q2. (C3); And control means (14) for controlling said first and second switching means. 18. The switched vertical deflection system according to claim 17, wherein the current (i1, i2) energized by the horizontal deflection current is a bipolar current of opposite polarity. In a switchable vertical deflection system comprising means (W2a, W2b) that are energized by a horizontal frequency pulse source (12) to generate first and second currents (i1, i2), vertical deflection control during a horizontal retrace period. Means (Q1, Q2) operable only during a horizontal trace period to modulate the first and second currents to start the generation of current i3; Vertical deflection yoke LV; And means (C3) for generating a vertical deflection voltage (V1) for driving a vertical deflection current (i4) in said vertical deflection yoke in response to said vertical deflection control current. . 20. The method of claim 19, wherein the time to start the generation of the vertical deflection control current is substantially coincident with the zero crossing point of the first and second currents i1 and i2 and the center of the horizontal retrace period. Switchable vertical deflection system. 20. A switchable vertical deflection system according to claim 19, wherein the first and second currents (i1, i2) are bipolar currents. 20. A switchable vertical deflection system according to claim 19, wherein said first and second current generating means (W2a, W2b) are AC coupled to said modulation means (Q1, Q2). A switchable vertical deflection system comprising a horizontal frequency pulse source (12), comprising: means (W2a, W2b) energized by the horizontal frequency pulse to generate bipolar currents (i1, i2); Means (Q1, Q2) for modulating the bipolar current; Vertical deflection yoke LV; And an energy storage means (C3) for generating a vertical deflection voltage (V1) for driving a vertical deflection current (i4) in said vertical deflection yoke in response to said modulated current. system. 24. The switching method according to claim 23, wherein the vertical deflection control current i3 always starts at a time substantially coincident with the zero crossing point of the bipolar currents i1 and i2 and the center of the horizontal retrace period. Vertical deflection system. 24. The switchable vertical deflection system according to claim 23, wherein the modulation means (Q1, Q2) are operable only during the horizontal trace period. 24. A switchable vertical deflection system according to claim 23, wherein the bipolar current generating means (W2a, W2b) are AC coupled to the modulating means (Q1, Q2). Switchable vertical deflection system comprising primary and secondary windings W2a, W2b inductively coupled to the retrace pulse source W1 from the horizontal deflection circuit 12 with opposite polarity, producing currents of opposite polarity. Each means (D1, D2, D3, D4) for directing portions of the positive and negative values of the currents to different paths; Vertical deflection yoke LV; And energy storage means C3 for generating a vertical deflection voltage V1 for driving a vertical deflection current i4 in a vertical deflection yoke in response to the currents, the portion of the bipolar value of the currents being And a portion of said negative value of said electric currents is passed through said energy storage means and is discharged. Switchable vertical deflection system comprising primary and secondary windings W2a, W2b inductively coupled to the retrace pulse source W1 from the horizontal deflection circuit 12 with opposite polarity, producing currents of opposite polarity. Energy storage means (C3); Respective means (D1, D2, D3, D4) for directing portions of the positive and negative values of the currents to different paths; And a vertical deflection yoke (LV), each means for directing comprising: current discharge paths (D3, D4, Q2); First means (Q1, D1) for transferring the positive portion of the current through the energy storage means and blocking the negative portion of the current from flowing to the energy storage means; And second means (Q2, D4) for transferring a negative portion of the current through the current discharge path and blocking the positive portion of the current from flowing in the current discharge path, wherein the energy storage means includes: In response to the bipolar portion of the current, generating a vertical deflection voltage (V1) for driving a vertical deflection current (i4) in the vertical deflection yoke. Switchable vertical deflection system comprising primary and secondary windings W2a, W2b inductively coupled to the retrace pulse source W1 from the horizontal deflection circuit 12 with opposite polarity, producing currents of opposite polarity. Energy storage means C3: coupled between two sources of ground potential and a first semiconductor switch Q2 defining a first discharge path of four similar polarity diodes D1, D2, D3, D4 A series circuit having a second semiconductor switch (Q1) defining a second discharge path and directing the positive and negative portions of said current to different paths; And a vertical deflection yoke LV, wherein the energy storage means generates a vertical deflection voltage V1 for driving a vertical deflection current in the vertical deflection yoke in response to the current, wherein the bipolar portion of the current And wherein said negative portion of said current is transmitted through said discharge path. In a deflection system comprising primary and secondary windings (W2a, W2b) of a transformer coupled to a first deflection current source (12), coupling to the primary and secondary windings, respectively, the primary and secondary windings First and second energy storage means C1 and C2 that are charged oppositely by the first and second currents i1 and i2 flowing through the first and second currents; Modulating the first current, the first switch Q1, the first energy storage means and the first diode D1 coupled to the switch, the first energy storage means, the first diode, and a junction portion. Modulation means consisting of a combined second diode D2; Modulating the second current, the second switch Q2, a third diode D4 coupled to the switch and the second energy storage means, the second energy storage means, the third diode, and a junction portion. Modulation means consisting of a combined fourth diode D3; Control voltage generating means (C3) coupled to the junction to generate a control voltage (V1) related to the first modulated current and the second modulated current; A deflection yoke LV for generating a deflection current i4 driven by the control voltage generating means; And means (14) for controlling said first and second current modulation means.

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