KR100227641B1 - Method for forming gate oxide film of semiconductor - Google Patents
Method for forming gate oxide film of semiconductor Download PDFInfo
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- KR100227641B1 KR100227641B1 KR1019960074943A KR19960074943A KR100227641B1 KR 100227641 B1 KR100227641 B1 KR 100227641B1 KR 1019960074943 A KR1019960074943 A KR 1019960074943A KR 19960074943 A KR19960074943 A KR 19960074943A KR 100227641 B1 KR100227641 B1 KR 100227641B1
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- oxide film
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 238000000137 annealing Methods 0.000 claims abstract description 13
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910001873 dinitrogen Inorganic materials 0.000 claims abstract description 4
- 230000003647 oxidation Effects 0.000 claims description 16
- 238000007254 oxidation reaction Methods 0.000 claims description 16
- 238000004140 cleaning Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 5
- 229910001882 dioxygen Inorganic materials 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000011109 contamination Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Formation Of Insulating Films (AREA)
Abstract
본 발명은 반도체 소자 제조 방법에 관한 것으로, 산화 초기 웨이퍼 표면에 존재하는 자연 산화막을 고온 질소 가스로 어닐링하여 자연 산화막의 성장을 최소화하는 동시에 성장된 자연 산화막의 결합을 회복하고 열산화막화 시키기 때문에 게이트 산화막의 품질이 향상될 수 있으며 향후 고집적 소자의 게이트 산화막 형성시 적용할 수 있는 반도체 소자의 게이트 산화막 형성 방법이 제시된다.The present invention relates to a method for fabricating a semiconductor device, and the method of annealing a natural oxide film present on the wafer surface with a high temperature nitrogen gas minimizes the growth of the natural oxide film while simultaneously recovering the bonding of the grown natural oxide film and thermally oxidizing the gate. A method of forming a gate oxide film of a semiconductor device, which may improve quality of an oxide film and may be applied to forming a gate oxide film of a highly integrated device in the future, is disclosed.
Description
본 발명은 반도체 소자 제조 방법에 관한 것으로, 반도체 소자의 제조 공정에서 차세대 고집적 소자의 얇은 게이트(Thin Gate) 산화막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a thin gate oxide film of a next generation high integration device in a semiconductor device manufacturing process.
종래 게이트 산화막 형성 공정에서의 문제점을 제1도를 참조하여 설명하면 다음과 같다. 제1도는 종래의 게이트 산화막 형성 방법을 설명하기 하기 위한 단면도이다. 반도체 소자 제조 공정에 따라 소정의 공정이 완료된 웨이퍼(11)에 게이트 산화막 형성 공정을 수행하기 위한 전 단계로서 케미칼 용액을 사용하여 웨이퍼(11) 표면에 존재하는 오염과 자연 산화막 등을 제거한다. 이어서 산화로에 웨이퍼(11)를 로딩하여 산화 공정을 진행한다. 산화로에 웨이퍼 로딩시 600800의 온도 범위에서 질소 또는 질소와 산소의 혼합가스 분위기하에서 로딩하며, 이 때 자연 산화막(12)이 로딩 조건에 따라 13정도 성장하게 되고 후속 습식(wet) 또는 건식(dry) 산화막 형성을 실시하므로써 게이트 산화막(13)이 형성된다. 이러한 방법에 의해 생성된 산화막의 경우 산화 공정 초기에 형성된 자연 산화막(12)에 존재하는 미반응 실리콘 원자의 결함과 표면의 거칠기등이 후속 열산화후에도 그대로 남아 전체적 게이트 산화막의 신뢰성을 저하시킨다. 특히 게이트 산화막의 두께가 10이하로 내려가는 64M DRAM급 이상의 고집적 소자에서는 자연 산화막의 영향이 더욱더 심각하게 대두된다.The problem in the conventional gate oxide film forming process will now be described with reference to FIG. 1 is a cross-sectional view for explaining a conventional gate oxide film forming method. As a preliminary step for performing a gate oxide film forming process on the wafer 11 where a predetermined process is completed according to a semiconductor device manufacturing process, a chemical solution is used to remove contamination and a natural oxide film existing on the surface of the wafer 11. Subsequently, the wafer 11 is loaded in an oxidation furnace to proceed with an oxidation process. 600 for wafer loading into an oxidizer 800 It is loaded in a nitrogen or a mixed gas atmosphere of nitrogen and oxygen in the temperature range of 1, wherein the natural oxide film 12 is 1 depending on the loading conditions 3 The gate oxide film 13 is formed by growing to a degree and performing subsequent wet or dry oxide film formation. In the case of the oxide film produced by this method, defects of unreacted silicon atoms and roughness of the surface existing in the natural oxide film 12 formed at the beginning of the oxidation process remain after the subsequent thermal oxidation, thereby lowering the reliability of the overall gate oxide film. Especially the thickness of the gate oxide film is 10 In the case of highly integrated devices of more than 64M DRAM level, the effect of the natural oxide film becomes more serious.
따라서, 본 발명은 게이트 산화막 성장시 실리콘 표면에 존재하는 자연 산화막의 품질을 개선하여 전체적인 게이트 산화막의 신뢰성을 향상시키는 방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method of improving the reliability of the gate oxide film by improving the quality of the native oxide film present on the silicon surface during the gate oxide film growth.
상술한 목적을 달성하기 위한 본 발명은 소정의 반도체 소자 제조 공정이 완료된 기판에 세정 공정을 실시하여 게이트 산화막이 성장될 영역에 잔류한 자연 산화막을 제거하는 단계와, 상기 기판을 저온의 질소 분위기인 산화로에 로딩하는 단계와, 상기 로딩 후 산화로의 온도를 올려 고온에서 어닐링을 실시하는 단계와, 상기 어닐링을 실시한 후 산화로의 온도를 산화 온도로 낮추어 게이트 산화막을 성장시키는 단계로 이루어진 것을 특징으로 한다.The present invention for achieving the above object is a step of removing a natural oxide film remaining in the region where the gate oxide film is to be grown by performing a cleaning process on a substrate having a predetermined semiconductor device manufacturing process, and the substrate is a low temperature nitrogen atmosphere Loading into an oxidation furnace, annealing at a high temperature after raising the temperature of the oxidation furnace after loading, and growing a gate oxide film by lowering the temperature of the oxidation furnace to an oxidation temperature after performing the annealing. It is done.
제1도는 종래의 게이트 산화막 형성 방법을 설명하기 위한 단면도.1 is a cross-sectional view illustrating a conventional method for forming a gate oxide film.
제2도는 본 발명에 따른 게이트 산화막 형성 방법을 설명하기 위한 단면도.2 is a cross-sectional view for explaining a gate oxide film forming method according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
11, 21 : 웨이퍼 12 : 결함 자연 산화막11, 21: wafer 12: defect natural oxide film
22 : 무결함 자연 산화막 13, 23 : 게이트 산화막22: flawless natural oxide film 13, 23: gate oxide film
본 발명은 게이트 산화막 성장시 자연 산화막의 품질을 향상시키고 전체적으로 게이트 산화막의 품질을 향상시키는 방법이다. 자연 산화막의 두께가 보통 약 3정도로 볼 때 게이트 산화막에서 자연 산화막이 차지하는 비율은 10은 64M DRAM급 게이트 산화막 두께를 기준으로 약 30%에 달하는 등 향후 게이트 산화막 두께가 점점 더 감소하는 추세를 고려하면 자연 산화막의 제어가 매우 중요한 문제로 대두된다.The present invention is a method of improving the quality of the natural oxide film and the quality of the gate oxide film as a whole during the growth of the gate oxide film. Natural oxide film thickness is usually about 3 As a result, the ratio of natural oxides to gate oxides is 10. Considering the trend of decreasing gate oxide thickness in the future, which is about 30% based on the 64M DRAM gate oxide thickness, the control of the natural oxide layer becomes a very important issue.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제2도는 본 발명에 따른 게이트 산화막 형성 방법을 설명하기 위한 단면도이다. 도시된 바와 같이 게이트 산화막을 성장시키기 위한 전단계로서 통상적인 반도체 소자 제조 공정이 완료된 웨이퍼(21) 표면에 존재하는 산화막을 제거하기 위해 세정을 실시한다. 이 때 세정후 게이트 산화막(23)이 성장될 영역에 산화막이 없어야 하므로 산화막 식각 용액인 HF등의 용액으로 산화막을 완전히 제거한다. 세정후 산화로에 웨이퍼 로딩시 자연 산화막(22)의 성장을 최소화하기 위해 로딩 온도를 600이하의 저온으로 질소 가스 분위기하에서 로딩한다. 로딩 후 성장된 자연 산화막의 품질을 향상시키기 위해 승온율을 530의 비율로 빨리 올려 산화로의 온도를 900정도의 고온에서 질소와 소량의 산소 가스로 어닐링하여 자연 산화막(22)내에 존재하는 미결합된 실리콘 본드와 표면 거칠기 및 기타 결정성 결함을 회복시키고 자연 산화막(22)을 열산화막과 같은 구조로 만든다. 이때, 어닐링시의 온도는 8001000의 고온에서 질소 가스와 산소 가스를 사용하여 실시하며 질소 가스는 1030, 산소 가스는 0.11로 사용하고 어닐링 시간은 10분에서 1시간정도 실시한다. 이어서 온도를 산화 온도로 낮추어서 산소 또는 산소와 수소의 혼합가스를 사용하여 게이트 산화막(23)을 성장시키면 실리콘과 산화막 사이의 계면에 결합이 없는 산화막을 얻을 수 있다.2 is a cross-sectional view for explaining a gate oxide film forming method according to the present invention. As shown in the drawing, cleaning is performed to remove the oxide film existing on the surface of the wafer 21 where the conventional semiconductor device manufacturing process is completed as a preliminary step for growing the gate oxide film. At this time, since there should be no oxide film in the region where the gate oxide film 23 will be grown after cleaning, the oxide film is completely removed by a solution such as HF, which is an oxide film etching solution. The loading temperature is 600 to minimize the growth of the native oxide film 22 during wafer loading into the oxidation furnace after cleaning. It loads in nitrogen gas atmosphere at the following low temperature. Increase the temperature increase rate to improve the quality of the grown natural oxide film after loading 30 Quickly raise the temperature of the oxidation furnace to 900 Annealing with nitrogen and a small amount of oxygen gas at high temperature to recover unbonded silicon bond, surface roughness and other crystalline defects present in the native oxide film 22, and make the native oxide film 22 have a thermal oxide film-like structure. . At this time, the temperature during annealing is 800 1000 Using nitrogen gas and oxygen gas at high temperature of 10 30 Oxygen gas is 0.1 One The annealing time is 10 minutes to 1 hour. Subsequently, by lowering the temperature to the oxidation temperature and growing the gate oxide film 23 using oxygen or a mixed gas of oxygen and hydrogen, an oxide film having no bond at the interface between the silicon and the oxide film can be obtained.
상술한 바와 같이 본 발명에 의하면 자연 산화막의 성장을 최소화하는 동시에 성장된 자연 산화막의 결합을 회복하고 열산화막화 시키기 때문에 게이트 산화막의 품질이 향상될 수 있으며 향후 고집적 소자의 게이트 산화막 형성시 적용할 수 있는 효과가 있다.As described above, according to the present invention, the quality of the gate oxide film can be improved since the growth of the natural oxide film is minimized and the bonding of the grown natural oxide film is restored and thermally oxidized, and can be applied in the future formation of the gate oxide film of the highly integrated device. It has an effect.
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960074943A KR100227641B1 (en) | 1996-12-28 | 1996-12-28 | Method for forming gate oxide film of semiconductor |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019960074943A KR100227641B1 (en) | 1996-12-28 | 1996-12-28 | Method for forming gate oxide film of semiconductor |
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| Publication Number | Publication Date |
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| KR19980055707A KR19980055707A (en) | 1998-09-25 |
| KR100227641B1 true KR100227641B1 (en) | 1999-11-01 |
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| KR1019960074943A KR100227641B1 (en) | 1996-12-28 | 1996-12-28 | Method for forming gate oxide film of semiconductor |
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