KR100223693B1 - Am radio receiver - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AM radio receiver using a super heterodyne system, comprising: a high frequency amplifier circuit having a high frequency amplifier and a double modulation unit, a mixer circuit, a local oscillator circuit, an intermediate frequency amplifier circuit, a PLL circuit, and an A / D. The voltage detected at the signal intensity output terminal, which is applied to an AM radio receiver including a control circuit having a converter and a D / A converter and a demodulation circuit, and is provided inside the intermediate frequency amplification circuit, is an A / D converter which is a control circuit. Is input to the variable capacitance diode of the double-tuning unit, and accordingly the tuning frequency in the double-tuning unit changes according to the signal intensity of the signal-intensity output terminal and the signal intensity of the output signal from the intermediate frequency amplification circuit is always maximized. It is characterized by.

Description

AM radio receiver

1 is a block diagram of an embodiment of an AM radio receiver according to the present invention;

2 (a) is a diagram showing the frequency characteristics of the double-tuning section;

2 (b) is a view showing the voltage change of the variable capacitance diode (D1, D2),

2 (c) is a diagram showing the frequency characteristics of the signal intensity output terminal of the intermediate frequency amplifier circuit,

3 is a flowchart showing the operation of the control circuit;

4 (a) is a diagram showing the frequency characteristics of the double-tuning section;

4 (b) is a view showing a voltage change of the variable capacitance diodes (D1, D2),

4 (c) is a diagram showing the frequency characteristics of the signal intensity output terminal of the intermediate frequency amplifier circuit,

5 is a flowchart showing the operation of the control circuit in the case of searching for a peak point only for a predetermined time;

6 is a flowchart showing the operation of the control circuit in the case of searching for a peak point after the length of the antenna is determined;

7 is a diagram showing a relationship between an S level (modulated signal level) indicating a signal intensity input from an antenna and an N level (level during no modulation) indicating a noise intensity and a signal intensity output voltage of an intermediate frequency amplifying circuit;

8 is a flowchart showing the operation of the control circuit in the case of searching for a peak point only when the signal intensity input from the antenna is equal to or less than a predetermined value;

9 is a block diagram of a conventional AM radio receiver.

* Explanation of symbols for main parts of the drawings

1: high frequency amplification circuit 2 antenna

3: control circuit 4: mixer circuit

5: local oscillation circuit 6: intermediate frequency amplification circuit

7 demodulation circuit 11 high frequency amplifier

12: double-tuning part 31: PLL circuit

32: A / D converter 33: D / A converter

The present invention relates to an AM radio receiver using a super heterodyne scheme.

The method of demodulating a signal input through the antenna once into a low frequency signal is generally called a superheterodyne method.

Since superheterodyne can reduce interference and noise, it has been widely used as a reception method of an AM radio receiver.

In addition, an AM radio receiver has been proposed in which a PLL (Phase Locked Loop) circuit is installed inside a superheterodyne AM radio receiver to suppress fluctuations in reception frequency (for example, JP-A-3). 292011, '91 -'92 Sanyo Semiconductor Semiconductor Data Books P144-159).

9 is a block diagram of a conventional AM radio receiver using a superheterodyne scheme and a PLL circuit. In FIG. 9, 1 is a high frequency amplifying circuit for amplifying a signal input from the antenna 2, and has a high frequency amplifying section 11 and a double tuning section 12. As shown in FIG. The high frequency amplifier 11 has a field effect transistor (hereinafter referred to as FET) Q1 and amplifies the signal input from the antenna 2 to a predetermined level. The double-tuning section 12 has coils T1 and T2, capacitors C1 and C2, and variable capacitance diodes D1 and D2. One tuning circuit is formed by the coil T1, the capacitor C1, and the variable capacitor diode D1, and the other tuning circuit is formed by the coil T2, the capacitor C2, and the variable capacitor diode D2. do. Thus, by providing two tuning circuits inside the double tuning unit 12, only a predetermined frequency component can be selected and output.

A predetermined voltage is input to the variable capacitor diodes D1 and D2 of each tuning circuit from the control circuit 3A through the resistor R1, and the capacitances of the variable capacitor diodes D1 and D2 change according to the voltage, and the tuning frequency is also adjusted. Change.

4 '' is a mixer circuit which performs frequency conversion and converts the output of the high frequency amplification circuit 1 into a low frequency signal. Specifically, the frequency difference fC-fL (hereinafter, referred to as an intermediate frequency signal) between the tuning frequency fC in the double tuning unit 12 and the frequency fL of the local oscillation signal from the local oscillation circuit 5 is referred to. To convert.

The local oscillation circuit 5 has an oscillation circuit 51, a coil T3, a variable capacitance diode D3, and a capacitor C3, and the local oscillation signal oscillated in the oscillation circuit 51 is sent to the mixer circuit 4. At the same time, it is sent to the PLL circuit 31 inside the control circuit 3A.

The PLL circuit 31 supplies a voltage corresponding to the frequency of the local oscillation signal to one end a of the variable capacitance diode D3 through the resistor R2. In other words, as the feedback is applied by the PLL circuit 31 in accordance with the frequency of the local oscillation signal, the variation of the frequency of the local oscillation signal is suppressed.

6 is an intermediate frequency amplifier circuit for selectively amplifying only intermediate frequency signal components, and 7 is a demodulation circuit for converting a signal amplified by the intermediate frequency amplifier circuit 6 into an audio signal before modulation.

The conventional AM radio receiver shown in FIG. 9 has the following advantages.

(1) Since the PLL circuit 31 is provided inside the control circuit 3A, the frequency variation of the local oscillation signal output from the local oscillation circuit 5 can be suppressed.

(2) Since the output of the PLL circuit 31 is also input to the double tuning section 12 inside the high frequency amplifying circuit 1, the fluctuation of the tuning frequency in the double tuning section 12 can be suppressed.

On the other hand, the conventional first radio receiver shown in FIG. 9 has the following drawbacks.

Since the control circuit 3A does not control the outputs of the mixer circuit 4 and the intermediate frequency amplification circuit 6, the characteristics of the components constituting the mixer circuit 4 or the intermediate frequency amplification circuit 6 are changed due to temperature change. If it changes, the output of the intermediate frequency amplification circuit 6 may fluctuate, the reception sensitivity may become unstable, and the noise may also increase.

It is therefore an object of the present invention to provide an AM radio receiver in which the signal strength of the output signal from the intermediate frequency amplifier circuit is always maximized.

In order to achieve the above object, the present invention provides a high frequency amplification circuit for tuning a signal received from an antenna to a first frequency, a mixer circuit for converting a first frequency to a second frequency, and an intermediate frequency for amplifying by tuning to a second frequency. It is applied to an AM radio receiver having an amplification circuit and a demodulation circuit for converting an output signal from the intermediate frequency amplification circuit into an audio signal before modulation, so that the AM radio signal has a maximum signal strength of the output signal from the intermediate frequency amplification circuit. And control means for varying the first frequency based on the signal level at a predetermined location within the receiver.

The AM radio receiver according to claim 1 constitutes a high frequency amplifying circuit so as to have a high frequency amplifying section for amplifying a signal received from an antenna and a double-tuning section for tuning to a first frequency and outputting a signal of an output signal from an intermediate frequency amplifying circuit. The control means is configured to change the first frequency based on the signal level of a predetermined place inside the intermediate frequency amplifying circuit so as to maximize the intensity.

Further, the AM radio receiver according to claim 1 configures the control means to search for the frequency which is the signal intensity of the output signal from the intermediate frequency amplification circuit by repeatedly changing the first frequency, and the control means makes the first frequency. And a time measuring means for measuring the elapsed time after the start of the change, and if the measured time exceeds the predetermined time, the control means is configured to select a frequency satisfying the predetermined condition as the first frequency.

In the invention described in claim 4, the AM radio receiver according to claim 1 selects a frequency when the signal intensity becomes maximum within a predetermined time as the first frequency when the measured time exceeds a predetermined time. To configure the control means.

In the invention described in claim 5, in the AM radio receiver according to claim 1, the control means is configured to select a predetermined frequency as the first frequency when the measured time exceeds a predetermined time.

In the invention described in claim 6, in the AM radio receiver according to claim 1, the control means is configured to select a previously selected frequency as the first frequency when the measured time exceeds a predetermined time.

The invention as recited in claim 7 relates to the AM radio receiver according to claim 1, wherein the first frequency is repeatedly changed to search for a frequency at which the signal intensity of the output signal from the intermediate frequency amplification circuit is maximized. And means for instructing the control means to instruct the start of the search according to the control means, and configure the control means to start the search when the start of the search is instructed according to the indicating means.

The invention according to claim 8, wherein the AM radio receiver according to claim 1 is provided with a signal strength detecting means for detecting a signal strength of a received radio wave received at an antenna, and the detected signal strength is low. Only to configure the control means for changing the first frequency.

In this way, in the invention described in claim 1, the signal strength of the output signal from the intermediate frequency amplification circuit is increased by throttling the first frequency based on the signal level of a predetermined place inside the AM radio receiver. Maximize

Further, in the invention described in claim 1, the signal intensity of the output signal from the intermediate frequency amplifier circuit is maximized by changing the first frequency based on the signal level of a predetermined place inside the intermediate frequency amplifier circuit. .

In addition, in the invention described in claim 1, a frequency satisfying a predetermined condition in which the elapsed time after the change of the first frequency starts beyond the predetermined time is selected as the first frequency.

In the invention described in claim 4, if the elapsed time after the start of changing the first frequency exceeds a predetermined time, the frequency when the signal intensity is maximized within the predetermined time is selected as the first frequency.

In the invention described in claim 5, the predetermined frequency is selected as the first frequency when the elapsed time after the start of changing the first frequency exceeds a predetermined time.

In the invention described in claim 6, if the elapsed time after the start of changing the first frequency exceeds a predetermined time, the previously selected frequency is selected as the first frequency.

In the invention described in claim 7, the first frequency is changed by the control means only when instructed by the indicating means.

In the invention described in claim 8, the control means changes the first frequency only when the signal strength of the received radio wave received at the antenna is low.

Hereinafter, an embodiment of an AM radio receiver according to the present invention will be described based on FIGS. 1 to 8.

1 is a block diagram of one embodiment of an AM radio receiver according to the present invention,

The same reference numerals are used for components common to those of the conventional AM radio receiver shown in FIG. 9, and the differences will be mainly described below.

3 is a control circuit for controlling the oscillation frequency of the local oscillation circuit 5 and the tuning frequency of the double tuning unit 12. FIG. The control circuit 3 has a PLL circuit 31, an A / D converter 32 and a D / A converter 33.

The local oscillation signal is input to the PLL circuit 31 from the local oscillation circuit 5. The PLL circuit 31 supplies a control voltage according to the frequency of the local oscillation signal to one end a of the variable capacitance diode D3 of the local oscillation circuit 5 through the resistor R2. As a result, the fluctuation of the frequency of the local oscillation signal is suppressed.

In a predetermined place inside the intermediate frequency amplifying circuit 6, a terminal TS (hereinafter referred to as a signal intensity output terminal) for detecting the signal intensity of the output signal of the intermediate frequency amplifying circuit 6 is referred to as a voltage detected by this terminal TS. Signal strength output voltage) is installed. The voltage detected by the signal strength output terminal TS is converted into a digital signal by the A / D converter 32. The control circuit 3 supplies the control voltage according to the digital signal to the ends b of the variable capacitance diodes D1 and D2 of the double-tuning section 12 through the D / A converter 33 and the resistor R1. . In addition, the resistor R1 roughly represents the voltage output from the control circuit 3 (point c in the figure) and the voltage of one end b of the variable capacitance diodes D1 and D2 (hereinafter referred to as a variable capacitance diode voltage). It is set to the equivalent value.

The operation of the present invention will be described below with reference to FIG.

The signal input from the antenna 2 is input to the high frequency amplifying circuit 1, amplified to a predetermined level by the high frequency amplifying unit 11 therein, and then tuned to a predetermined frequency by the double tuning unit 12, and Only signal components are extracted.

The tuning frequency in the double tuning section 12 is determined in accordance with the variable capacitor diode voltage supplied from the control circuit 3.

The frequency characteristic of the double-tuning section 12 is shown in FIG. 2 (a). The curve a1 of FIG. 2 (a) shows the frequency characteristic when the variable capacitance diode voltage shown in FIG. 2 (b) is V1, and the curve a1 has a larger value (hereinafter, peak) when the frequency f1. Point), and the output of the double-tuning section 12 is maximized. Similarly, the curves a2 to a6 respectively represent frequency characteristics when the variable capacitance diode voltage is decreased by ΔA from V1, and the frequencies at which the output signal intensity of the double-tuning modulator 12 is maximum are respectively f2 to f6.

The output from the high frequency amplification circuit 1, i.e., the output of the double-tuning section 12, is input to the mixer circuit 4 and converted to a low frequency. Specifically, a signal (intermediate frequency signal) of the difference frequency fC-fL between the tuning frequency fC in the high frequency amplification circuit 1 and the frequency fL of the local oscillation signal input from the local oscillation circuit 5. Is converted to. The reason for converting to a low frequency signal is that the lower the frequency, the easier it is to select and separate a desired frequency component.

The output of the mixer circuit 4 is input to the intermediate frequency amplifier circuit 6, and only the intermediate frequency (fC-fL) signal components are selectively amplified.

2 (c) shows the frequency characteristics of the signal intensity output terminal voltage inside the intermediate frequency amplifier circuit 6. Curve c1 shows the frequency characteristic when the variable capacitor diode voltage is V1. In this case, the curve c1 becomes the peak point at the frequency f1, and the signal intensity output voltage is maximized. Similarly, the curves c2 to c6 respectively exhibit frequency characteristics when the variable capacitance diode voltage is reduced by V to ΔV, and the frequencies at which the signal intensity output voltage is maximum are respectively f2 to f6.

The reason why the curve of FIG. 2 (c) is sharper than that of FIG. 2 (a) is because the frequency selectivity is improved by the frequency conversion of the mixer circuit 4 to the low frequency signal.

3 is a flowchart for explaining the procedure of changing the variable capacitor diode voltage by the control circuit 3. This flowchart shows a case where a signal of f5 = 900 KHz input from the antenna 2 is received. In this case, as shown in FIG. 2, the signal intensity becomes maximum when the variable capacitance diode voltage V is V = V1-4 x? V. In this case, the frequency characteristic of the double-tuning section 12 is represented by a curve a5, and the frequency characteristic of the signal intensity output terminal is represented by a curve c5.

In the processing of FIG. 3, the control circuit 3 first applies the voltage V1 to the variable capacitance diodes D1 and D2. The initial value of the variable n used to change the variable capacitor diode voltage is set to one.

In step S1 of FIG. 3, the signal intensity output voltage when the variable capacitor diode voltage is V1 is substituted into the variable S, and the flow proceeds to step S2. In FIG. 2, the signal intensity output voltage of the curve c5 when the variable capacitor diode voltage is V1 is SA1, and SA1 is substituted into S. In FIG. In step S2, the voltage V = V1-ΔV is output to the variable capacitance diodes D1 and D2, and the process proceeds to step S3. In step S3, the signal intensity output voltage when the variable capacitance diode voltage V is V = V1-? V is measured, and the process proceeds to step S4. In FIG. 2, the signal intensity output of the curve c5 becomes SA2 when the variable capacitance diode voltage V is V = V1-ΔV.

In step S4, it is determined whether S (= SA1) is SA2 or less. If SA2 or less, the process proceeds to step S5 and SAn + 1 is substituted into the variable S. In FIG. 2, when n = 1, SA1 is smaller than SA2, so that SA2 is substituted into the variable S, and the flow advances to step S6. In step S6, the variable n is added to step 1 to proceed to step S7, and the variable capacitance diode voltage V is shifted to step S8 with V = V1-n x ΔV. Then, the signal intensity output voltage at that time is measured to go to step S9. To fulfill. In FIG. 2, when n = 2, in step S7, V = V1-2 × ΔV and the signal intensity output voltage are SA3.

In step S9, it is determined whether S is SAn + 1 or less. If it is determined that it is SAn + 1 or less, the process returns to step S5. If it is determined that it is larger than SAn + 1, the process ends.

In the case of n = 2 in FIG. 2, since S (= SA2) is smaller than SA3, the process returns to step S5. In step S5, the value of SA3 is substituted into S, n = 3 in step S6, and the variable capacitance diode voltage V is set in V = V1-3 × ΔV in step S7.

In step S8, the signal intensity output voltage SA4 at that time is measured, and when it is determined in step S9 that S (= SA3) is smaller than SA4, the process returns to step S5.

The same process is repeated, and when the variable capacitance diode voltage V is V = V1-5 × ΔV, in step S9, S (= SA5) and SA6 are compared. Since SA6 is smaller, the process proceeds to step S10 and the signal intensity output voltage The processing is terminated by setting the variable capacitance diode voltage (V = V1 = 4 x? V) at this maximum (at SA5) to the variable capacitance diodes D1 and D2. As a result, as shown in Fig. 2 (c), the peak point of the signal strength is selected, and a signal having a frequency of 900 KHz can be received in the most suitable state.

On the other hand, as shown in FIG. 4, if it is determined in step S4 that S (= SA1) is larger than SA2, it transfers to step S11. In step S11, the variable capacitor diode voltage V is shifted to step S12 as V = V1 + n × ΔV. In step S12, the signal intensity output voltage at that time is measured, and the process proceeds to step S13. In FIG. 4, when n = 1, at step S11, V = V1 + 1 × ΔV and the signal intensity output voltage at this time is SB2. In step S13, it is determined whether or not S is SBn + 1 or less. If it is determined that SBn + 1 or less, the flow advances to step S14, and SBn + 1 is substituted into the variable S. In FIG. 4, when n = 1, S (= SA1) is smaller than SB2, and SB2 is substituted into the variable S to return to step S11. The same process is repeated, and when the variable capacitance diode voltage V is V = V + 5 × ΔV, in step S13, S (= SB5) is compared with SB6, and SB6 is smaller, so the process proceeds to step S16 and the signal intensity output voltage is obtained. The process is terminated by setting the variable capacitance diode voltage (V = V1 + 4 x DELTA V) at the time when S becomes maximum (SB5) to the variable capacitance diodes D1 and D2. As a result, the peak point of the signal strength is selected as shown in FIG.

As described above, in the above embodiment, the control circuit 3 changes the variable capacitance diode voltage of the high frequency amplifying circuit 1 so that the signal intensity output voltage of the intermediate frequency amplifying circuit 6 is maximized. Therefore, the signal intensity output voltage of the intermediate frequency amplifier circuit 6 is always maximized even when the output value of the high frequency amplifier circuit 1, the mixer circuit 4 or the intermediate frequency amplifier circuit 6 changes due to temperature change. Controlled.

In the above embodiment, when the signal intensity input from the antenna 2 is significantly small, there is a case where the signal intensity output voltage does not change even if the control circuit 3 changes the variable capacitance diode voltage. For example, if the signal intensity input from the antenna 2 is small, and the curve of FIG. 2 (c) is very gentle, the signal intensity output voltage becomes SA1 = SA2 = ... = SAn even if the variable capacitance diode voltage is changed. There is a risk that the signal intensity output voltage will not be detected where it is at its maximum. In such a case, when the value of n is made large and the variable capacitance diode voltage is greatly changed at V1, the operation of the double-tuning unit 12 may be abnormal.

For this reason, the upper limit value V _max and the lower limit value V _min for varying the variable capacitor diode voltage may be determined, and the variable capacitor diode voltage may be changed only within the range. For example, in FIG. 2 (b), when the variable capacitance diode voltage is increased from V1 to V _max = V1 + n × ΔV and the signal intensity output voltage does not change, V _min = V1-n × ΔV It is good to select the place where the signal intensity output voltage is maximized between V _min and V _max .

In the above embodiment, when tuning a signal having a high frequency among the signals input from the antenna 2, it is necessary to increase the variable capacitance diode voltage as shown in FIG. 2 (b). As the diode voltage increases, the capacitance change of the variable capacitance diode per unit voltage change decreases.

Therefore, when selecting a signal with a high frequency, the difference between V _max and V _min may be increased by increasing the value of ΔV or n.

In the above embodiment, the peak of the coral intensity output voltage is searched by varying the variable capacitance diode voltage by ± ΔV. However, it takes time to find the peak point according to the value of the initial voltage V1 which starts to search. There is a thing. In addition, as described above, when the reception sensitivity of the antenna 2 is poor, the curve of the second (c) diagram becomes smooth, and thus it is difficult to find the peak point. In this case, therefore, the process of finding the peak point may be limited to a predetermined time. If the peak point is not satisfied within a predetermined time, the variable capacitance diode voltage may be determined by any one of the following?

① Select the place where the signal intensity output voltage was maximum within the predetermined time.

(2) The variable capacitance diode voltage, which is a reference for each frequency, is stored in a ROM (not shown) in advance, and if the peak point is not found, the voltage is selected.

(3) Select the selected value again when the previous frequency is received.

5 is a flowchart by the control circuit 3 in the case of limiting the search for the peak point to a predetermined time. In FIG. 5, in step S101, a timer is started and time measurement required for searching for a peak point is started. The following steps S102 to S110 perform the same processing as in FIG. In step S111, it is determined whether the measurement time by the time measuring means has passed a predetermined time. If it is determined that the predetermined time has not elapsed, the process returns to Step S106. On the other hand, if it is determined that the predetermined time has elapsed, the process proceeds to step S112 and the variable capacitance diode voltage is set in accordance with any one of the above 1 to 3 to end the process. Similarly, in step S117, it is determined whether or not the predetermined time has elapsed. When it is determined that the predetermined time period has elapsed, the process proceeds to step S112.

In the AM radio receiver, the reception sensitivity changes depending on the length and angle of the antenna 2 or the installation location of the receiver. Therefore, the reception sensitivity may change while the control circuit 3 is searching for a peak point. In such a case, the control circuit 3 may select an incorrect peak point. For example, when the AM radio receiver of the above embodiment is mounted in a vehicle, the control circuit 3 searches for the peak point according to FIG. 3 while the length of the antenna 2 is automatically or manually changed. Since the reception sensitivity is constantly changing with the length of), the control circuit 3 may select the wrong peak point. In this case, as shown in FIG. 6, the search of the peak point may be started after the length of the antenna 2 is determined.

In the flowchart of FIG. 6, in step S201, it is determined whether the length of the antenna is determined or not, and if it is determined that the length of the antenna remains in step S201 and the length of the antenna is determined, the process proceeds to step S202 and the same processing as in FIG. Is carried out.

In step S201, for example, in a vehicle in which the antenna is automatically extended in response to the ON of the radio tuner, it may be determined whether or not the time until the antenna becomes the maximum length has elapsed.

In the above embodiment, when the reception sensitivity at the antenna 2 is very good, that is, as shown in FIG. 7, the S level (modulation signal level) indicating the strength of the signal component input from the antenna 2 and If the S / N ratio, which is the ratio with the N level (no modulation level) indicating the noise intensity, is sufficiently large, the hearing loss is not obtained even if the tuning frequency in the double-tuning section 12 inside the high frequency amplification circuit 1 is varied. There is a case. For example, in FIG. 7, the S / N ratio reaches the saturation value when the input signal intensity from the antenna 2 is XdBu or more, so that the hearing-sensitivity difference does not change even if the tuning frequency in the double tuning section 12 is out of the optimum value. Not obtained. Therefore, when the input signal strength is large, the search for the peak point may be stopped as shown in the flowchart of FIG.

In the flowchart of FIG. 8, after measuring the signal intensity output voltage SA2 in step S303, in step S304, the signal intensity output voltage SA2 is determined from the antenna 2 as shown in FIG. It is judged whether or not the signal intensity when the input signal strength is XdBu is smaller than the output voltage value, and the process ends when the input signal strength is smaller than the predetermined value. Thereby, it can complete without making unnecessary adjustment that a hearing difference cannot be obtained.

In the above embodiment, the tuning frequency of the double-tuning section 12 inside the high-frequency amplifying circuit 1 is controlled by the voltage of the signal intensity output terminal TS of the intermediate frequency amplifying circuit 6. The output of 6), the output of the mixer circuit 4 or the output of the demodulation circuit 7 may be controlled. The circuit configurations of the high frequency amplifying circuit 1 and the local oscillation circuit 5 shown in FIG. 1 are not limited to the embodiment. In FIG. 1, although the PLL circuit 31, the A / D converter 32, and the D / A converter 33 are provided in the control circuit 3, these may be provided separately.

As described in detail above, according to the present invention, the first frequency tuned by the high frequency amplifying circuit is changed based on the signal level of a predetermined place inside the AM radio receiver so that the signal strength of the output signal from the intermediate frequency amplifying circuit is maximized. As the temperature changes and the time elapses, the signal strength output from the intermediate frequency amplifier circuit is always maximized even if the characteristics of the various components of the AM radio receiver such as the high frequency amplifier circuit, mixer circuit or intermediate frequency amplifier circuit change. You can do

According to the invention described in claims 1, 4, 5, and 6, when the time after the start of changing the first frequency exceeds a predetermined time, a frequency satisfying a predetermined condition is selected as the first frequency. You can shorten the time required.

According to the invention described in claim 7, the search processing of the first frequency is performed only when instructed by the indicating means, so that, for example, the search processing is not performed when the length of the antenna is not determined. Tuning accuracy can be increased.

According to the invention of claim 8, since the first frequency is changed only when the signal strength of the received radio wave is low, the first frequency can be changed only when a difference in auditory sense is obtained.

Claims (6)

A high frequency amplifying circuit for tuning the signal received at the antenna to a first frequency, a mixer circuit for converting the first frequency to a second frequency, an intermediate frequency amplifier circuit for amplifying by tuning to the second frequency, and the intermediate frequency A demodulation circuit for converting an output signal from the amplification circuit into a pre-modulation audio signal and a signal level of a predetermined place inside the intermediate frequency amplifier circuit such that the signal intensity of the output signal from the intermediate frequency amplifier circuit is maximized. And an AM radio receiver having control means for converting said first frequency, said high frequency amplifying circuit having a high frequency amplifying portion for amplifying a signal received from an antenna and a double-tuning portion for tuning to said first frequency. The means repeatedly varies the first frequency so that the signal intensity of the output signal from the intermediate frequency amplifier circuit is maximized. And a time measuring means for measuring the elapsed time after the control means starts to change the first frequency, wherein the control means satisfies a predetermined condition if the measured time exceeds a predetermined time. And selecting a frequency as the first frequency. The AM radio receiver according to claim 1, wherein said control means selects, as said first frequency, a frequency at which signal intensity becomes maximum within said predetermined time when said measured time exceeds a predetermined time. The AM radio receiver according to claim 1, wherein said control means selects a predetermined frequency as said first frequency when said measured time exceeds a predetermined time. The AM radio receiver of claim 1, wherein the control means selects a previously selected frequency as the first frequency when the measured time exceeds a predetermined time. A high frequency amplifying circuit for tuning the signal received at the antenna to a first frequency, a mixer circuit for converting the first frequency to a second frequency, an intermediate frequency amplifier circuit for amplifying by tuning to the second frequency, and the intermediate frequency The demodulation circuit for converting the output signal from the amplifying circuit to the audio signal before modulation and the signal level of a predetermined place inside the intermediate frequency amplifier circuit so as to maximize the signal intensity of the output signal from the intermediate frequency amplifier circuit. 9. An AM radio receiver having control means for changing said first frequency, said high frequency amplifying circuit having a high frequency amplifying portion for amplifying a signal received from an antenna and a double-tuning portion for tuning to said first frequency, said control means. The signal frequency of the output signal from the intermediate frequency amplifier circuit is maximized by repeatedly changing the first frequency. And instructing means for instructing initiation of the search by the control means, wherein the control means initiates the search when the initiation of the search is instructed by the indicating means. AM radio receiver. A high frequency amplifying circuit for tuning the signal received at the antenna to a first frequency, a mixer circuit for converting the first frequency to a second frequency, an intermediate frequency amplifier circuit for amplifying by tuning to the second frequency, and the intermediate frequency A demodulation circuit for converting an output signal from the amplification circuit into a pre-modulation audio signal and a signal level of a predetermined place inside the intermediate frequency amplifier circuit such that the signal intensity of the output signal from the intermediate frequency amplifier circuit is maximized. And an AM radio receiver having control means for changing said first frequency, said high frequency amplifying circuit having a high frequency amplifier for amplifying a signal received from an antenna and a double-tuning section for tuning to said first frequency. Signal strength detecting means for detecting a signal strength of a received radio wave, wherein said control means comprises said detected signal strength; AM radio receiver, characterized in that the first frequency is changed only when the degree is low.