KR100219876B1 - A device for synchronous transmission of page data in the paging system - Google Patents

Abstract

The present invention has been devised to provide a concrete implementation plan of a synchronous call data transmission apparatus involved in using a fast paging protocol developed by a need for a larger channel capacity of a radio calling service.

The transmitter control module of the base station receives the 1 PPS signal, the absolute time information and the clock signal, which are the reference pulse signals from the GPS receiver, and controls the counter from these signals to provide accurate data transmission clock and frame synchronization signals having various data rates. A circuit for generating;

The multiplexing and control logic that receives the data transmission clock and the frame synchronization signal and clocks the FIFO memory in consideration of the current memory state, and the FIFO memory that receives the clock from the multiplexing and control logic and sends data to the pager The circuit is configured to enable continuous transmission of call data in a synchronous manner.

Description

Synchronous call data transmitter of paging system.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fast paging protocol, and more particularly, to a method of transmitting page data of a paging system using a synchronous paging protocol.

A paging system is a system that provides various pager services wirelessly to a pager. The paging system receives call data from a paging terminal for calling a base station for each cell, which is an allocated area, to a pager of a corresponding area. The radio call signal is transmitted.

Each base station must simultaneously transmit call data for a radio call signal, in order to prevent a pager terminal existing in an overlapping area of a base station cell area from receiving the same paging call multiple times.

In the early paging system, the signal transmission time from the paging terminal to each base station was measured and delayed in inverse proportion to the transmission time.

That is, based on the farthest base station, the other base station transmits the radio frequency by delaying the signal by the difference of the propagation time, and the farthest base station transmits the radio frequency without delaying the signal.

At this time, various factors are taken into consideration to measure the signal propagation time. Actually, measurement errors are caused by various causes. For example, errors due to analog-to-digital-to-analog-to-analog conversion, errors due to signal distortion according to a preferred state, and errors due to line changes in the transmission section are examples. Because of this error, simultaneous call data implementation was very difficult and error occurred frequently.

Therefore, a method of receiving a sync pulse signal using a GPS receiver and transmitting call data in synchronization with the pulse from all base stations has been developed.

The GPS receiver is a system used for determining or guiding a moving object using a navigation satellite. The GPS receiver emits a plurality of radio waves to the satellite and calculates a phase difference of the reflected wave.

1 is a view showing the configuration of a conventional general paging system using a GPS receiver.

As shown, the paging terminal 200, which is connected to the E1 / T1 trunk 100, which is a transmission standard of the PSTN network, and receives information for the pager, is also connected to the base stations 500 of each cell through a transmission line to receive information. Send. The GPS receiver 300 is added to a paging terminal and each base station to receive a GPS signal.

The base station 500 includes a GPS receiver, a base station transmitter controller module, and a transmitter for transmitting a signal generated from the control module to a pager.

The call data generated from the paging terminal 200 is transmitted to each base station 500 through a transmission path, and in each base station, all base stations simultaneously transmit the call data to a radio frequency in synchronization with a sync pulse signal generated from the GPS receiver 300. It is converted and transmitted to the pager of the corresponding area.

That is, the paging terminal transmits call data to each base station in synchronization with the 1 PPS (Pulse Per Second) clock signal generated by the GPS receiver. In this way, the call data is converted into radio frequency and the information is finally transmitted to the pager.

In recent years, as subscribers increase exponentially, the need for larger channel capacity has increased due to congestion of limited channels. In order to replace the POCSAG method, which is asynchronous paging protocol, a new synchronous paging protocol, FLEX ( Flexible) and APOCS have been developed.

In the FLEX protocol, each address for a terminal specifies a reference frame within 128 frames that appear on the channel every four minutes, so that the terminal receives a signal only at the time it appears. .

That is, when frame 0 is synchronized to the hourly time, the terminal can derive the actual time from the current frame and period number, thus providing the user with the exact time that does not need to be adjusted within that time, and thus the conventional asynchronous method. It is possible to achieve several times the battery saving effect than using the protocol.

In addition, the transmission speed can support all cases such as 1600, 3200, 6400bps faster than the existing 512, 1200bps.

As described above, as the call data transmission method of the paging system is switched from the asynchronous method to the synchronous method, the call data transmission method that has been used previously has some problems.

First, in the synchronous paging protocol, all transmissions are made in units of frames. Therefore, when call data is transmitted, it should always be transmitted only in a frame corresponding to it.

In addition, since the transmission rate must be designed to support a variety of call rates, a call data transmission circuit that can accurately match frame synchronization (Frame Sync.) For determining the transmission time of the data transmitted to the pager must be specifically implemented.

Secondly, in the synchronous paging protocol, all frames and periods must be configured to match the exact absolute time, that is, the actual time used. Therefore, only one PPS clock generated by the existing GPS receiver is received and synchronized to synchronize data. The structure of the system that transmits this protocol cannot support this synchronous protocol.

Therefore, the present invention has been proposed to solve the above problems,

It is an object of the present invention to provide a call data transmitting apparatus of a synchronous type suitable for a fast paging protocol by simultaneously receiving information about absolute time from a GPS receiver in addition to a synchronous pulse.

1 is a schematic diagram of a typical paging system constructed using a GPS receiver.

2 is a circuit diagram for generating a transmission clock and a frame synchronization signal having various transmission rates in a transmitter control module of a base station.

3 is a signal output from the counter block A of FIG.

4 is a frame synchronization signal output from counter block B of FIG.

Fig. 5 is a circuit diagram for continuously sending call data using a FIFO memory.

Explanation of symbols for main parts of the drawings

100: E1 / T1 trunk 200: paging terminal

300: GPS receiver 400: transmitter controller

500: base station

410: control logic 420: counter block A

430: counter block B

600: multiplexing and control logic 700: FIFO memory

In order to achieve the above object, a call data transmitting apparatus of a synchronous type that supports a fast paging protocol designed according to the present invention;

Synchronous call data using a FIFO (First Input First Output) memory and a circuit for generating outgoing clock and frame synchronizing signals having various transmission speeds through the synchronization pulse signal and the absolute time information received from the GPS receiver. It characterized in that the circuit is configured to enable continuous transmission of the.

What is needed first in specifying a synchronous call data transmission method is various signals and information received from a GPS receiver.

The paging terminal and the base station receive the information on the absolute time through a specific port of the GPS receiver, and also receive the 1 PPS clock (a reference signal generated once every second), which is a synchronization pulse signal, so that the accurate current time can be known.

Using these things, the paging terminal grasps exactly at what time call data to be transmitted at the present time, and transmits to the base station in advance before sufficient time considering the processing time and propagation time of the base station. In this case, the data to be transmitted should include information on the frame number.

The base station combines the frame number and the call data coming from the terminal according to the protocol to transmit the call data corresponding to the corresponding frame time. At this time, the base station receives the reference clock signal of a specific frequency band in addition to the absolute time information and the 1 PPS clock signal from the GPS receiver and generates a frame synchronization signal as a reference of the frame.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram of generating a transmission clock and a frame synchronization signal having various transmission rates in a transmitter control module of a base station.

The circuit generates outgoing clock and frame synchronization circuits having various transmission rates based on various signals and information received from the GPS receiver.

As shown, the synchronous call data transmission apparatus of the paging system according to the present invention includes a transmitter control module of the base station;

A counter clock signal, a counter enable signal, and a counter clear received from the GPS receiver 300 and the information about 1 PPS, clock 1, clock 2, and absolute time from the GPS receiver 300 and input to the counter circuit. a control logic 410 for generating a clear signal, a counter block A 420 for generating outputs of various speeds according to the signal input from the control logic, and the counter block A Counter block B 430 is used to finally generate a frame synchronizing signal and a data transmission clock BAUDCLK using various outputs.

The control logic 410 receives the information about 1 PPS, clock 1, clock 2 and absolute time from the GPS receiver 300 to generate a counter clock signal, an enable signal and a clear signal to the counter block A 420. Add. Here, the counter clock signal should be provided as a clock having various transmission speeds and a clock of a frequency capable of generating a frame synchronization signal.

3 shows waveforms for the various output signals produced from counter block A 420.

3A is a 1 PPS signal received from the GPS receiver and applied to the control logic, (B) a counter enable signal by the first 1 PPS signal, and (C) a counter cleared for each second 1 PPS signal. The counter clear signal to be used, (d) is a counter clock which is also a source that is received from the GPS receiver to produce the output of the counter block A, and (e) represents various outputs generated by the counter clock. will be.

3 (b), which is the counter enable signal, makes the first PPS signal received for the first time after the power is supplied to the circuit and normally set up. This is to prevent the data transmission clock from becoming out of sync when the counter is started regardless of 1 PPS.

In addition, the counter clear signal (C) of FIG. 3 makes a one time each time a 1 PPS signal is received so that all the counters can be restarted, thereby always generating a synchronized data transmission clock. .

As shown in the figure, the start of the counter is synchronized by enabling the counter in accordance with the first 1 PPS signal of FIG. 3, and by clearing the counter in accordance with the subsequent 1 PPS signal, the output signal of the counter is not misaligned. It was.

The counter block A 420 uses an input counter clock (D) of FIG. 3 to output an output signal having various speeds, such as an output 1 doubling its frequency and an output 2 doubling the frequency of the output 1. Generate.

4 illustrates a frame synchronization signal generated from the counter block B 430.

4A is a 1 PPS signal input from a GPS receiver, (B) is a counter enable signal, (C) is a counter clear signal, (D) is an output signal from counter block A 420, and (E) is a frame synchronizing signal made using the signals.

When generating the frame synchronizing signal in the counter block B 430, the absolute time information from the GPS receiver is required because the on-time and the frame synchronizing signal must be matched every time.

As shown, when the FLEX protocol is used to transmit 128 frames for 240 seconds using the 8 bps of the output signal of the counter block A 420, the frame synchronization signal corresponding to 1.875 seconds. (E) of FIG. 4 is made.

At this time, for accurate synchronization, a frame synchronized with the absolute time of absolute time must be made. Therefore, every time the 8bps signal is generated 15 times by receiving absolute time information from the GPS receiver, one frame synchronization signal is generated.

In addition, the output data transmission clocks are various clocks received from the counter block A. Here, the desired speed can be selected when the data transmission to the pager is performed. This data outgoing clock is used to determine when the transmitter itself reads the call data.

As a result, by using this method, a data transmission clock and a frame synchronization signal that are never distorted are generated, which is a reference for transmitting call data corresponding to an accurate frame time at all times.

FIG. 5 is a circuit diagram for transmitting call data using a FIFO memory based on the exact frame synchronization signal and the data transmission clock generated from FIG. 2.

The circuit diagram for sending call data using FIFO memory is as follows.

The data transmission clock and frame synchronization of various speeds output from the counter block B 430 of FIG. 2 and the clock applied to the FIFO memory by receiving the frame information transmitted from the paging terminal to determine when the data is to be transmitted. Multiplexing (MUX) and control logic 600 for selection, and a FIFO memory 700 for storing the call data transmitted by the clock applied from the multiplexing and control logic to the pager.

The multiplexing and control logic 600 receives data transmission clocks and frame synchronization signals of various speeds, selects clocks of current transmission speeds, and supplies the transmission clocks to the FIFO memory in synchronization with the timing of data transmission. do. The time point at which data is transmitted is determined by receiving frame information transmitted from the paging terminal.

That is, the multiplexing and control logic 600 synchronizes the frame at the data transmission time point determined by the frame information, selects the clock of the current transmission rate from the data transmission clock, and starts supplying the clock to the memory. The outgoing clock is applied on the basis of one frame determined by the frame sync signal.

In addition, the multiplexing and control logic 600 receives a current state of the FIFO memory 700 through an empty flag and a half full flag to control the time point at which call data is written to the FIFO memory.

Before sending the first call data, the amount of data corresponding to the total capacity of the FIFO memory 700 is written in advance through the data bus, and then the FIFO clock is supplied in synchronization with the time when the data is sent.

If the data to be sent is continuous, the FIFO memory 700 checks the half-pull flag. If the flag is not checked in the multiplexing and control logic 600, the FIFO memory 700 determines that it is less than or equal to the capacity of the memory. Send more data as much as half the memory.

If there is no more data to be sent at any point in time, the FIFO memory 700 checks an empty flag to terminate data transmission. In other words, if this operation is continued, the data transmitted to the pager can be transmitted continuously without being interrupted.

When the circuit of FIG. 5 is connected to the circuit of FIG. 2 operating as described above, continuous call data transmission in a synchronous manner is possible.

Simultaneously receiving information about the absolute time from the GPS receiver simultaneously generates the data transmission clock and the frame synchronization signal which are never distorted, so that call data corresponding to the correct frame time can always be transmitted.

Claims (3)

In the transmitter control module of the base station of the synchronous call data transmitter of the paging system using the fast paging protocol, A circuit for generating a transmission clock and a frame synchronization signal having various transmission rates based on a reference clock pulse signal received from a GPS receiver and information on absolute time; And a circuit for continuously transmitting synchronous call data using a FIFO memory based on the outgoing clock and the frame synchronizing signal. The method according to claim 1, Circuitry for generating the outgoing clock and frame synchronization signal; Control logic 410 for generating a signal for controlling the counter block from the signal received from the GPS receiver; A counter block A 420 for receiving a control signal from the control logic and generating outputs of various speeds; A circuit for generating a data sending clock and a frame synchronizing signal comprising a counter block B (430) for generating a data synchronizing clock and a frame synchronizing accurately through various control signals and a signal received from the counter block A; Synchronous call data transmitter of system. The method according to claim 1, A circuit for continuously transmitting call data using the FIFO memory, Multiplexing and control logic that considers the current memory state through an empty flag and a half full flag, receives data transmission clocks and frame synchronization signals of various rates, and applies clocks of desired rates to the FIFO memory; And a FIFO memory for transmitting data transmitted by a clock applied from the multiplexing and control logic to a pager.

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