KR100219611B1 - Method for correcting location error in wafer test scheme - Google Patents

Abstract

According to the present invention, there is provided a method of manufacturing a display device, comprising the steps of setting a reference address by capturing an arbitrary grid intersection point formed on a jig glass and matching it with the center on a monitor frame, reading the grating pitch and the number of gratings of the previously input jigglas, Creating a position to which the table member is to be transferred by using the grid pitch and the number of gratings and the reference address as an address table, transferring the table member to a position on each address table to pick up the jig glass , Checking whether the center of the monitor frame intersects with the intersection of the grid lines at the corresponding position, and if the centers of the monitor frame and the grid intersections do not coincide with each other at the respective address positions, Until the monitor frame centers are aligned, By feeding the member is provided with a position error compensation method for a wafer testing apparatus comprising a step of calculating a feed amount by the error correction value.

Description

Method for correcting position error of wafer test apparatus

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for correcting a position error of a wafer testing apparatus, and more particularly, to a method of correcting a position error of a wafer test apparatus by imaging a laser marking of a zig- The present invention relates to a method for correcting a position error of a wafer test apparatus using a wafer test apparatus.

A wafer test apparatus is used for inspecting a circuit pattern of a plurality of semiconductor chips formed on a wafer. The wafer test apparatus is provided with a probe capable of checking whether there is an abnormality on the circuit by contacting the pad formed on each chip. Typically, the wafer is placed on an X-Y table capable of precise transfer, and the probe is fixed to allow elevation movement. During the inspection of the wafer, the X-Y table performs a planar motion, and the pads formed on each chip are controlled to come to the bottom of the probe. In another example, the wafer may be placed on a fixed table and the probe may reach the top of each pad of the chip by planar motion by the X-Y robot.

1, the wafer testing apparatus 10 is shown in a schematic perspective view. This shows an example in which the X-Y table 11 is applied, showing that the work of correcting the position error is performed in the prior art.

Referring to FIG. 1, a chuck 13 is disposed on an X-Y table 11, and a jig glass 14 is disposed on a chuck 13. When the actual wafer test operation is performed, the jig glass 14 is replaced with a wafer. A probe 16 is fixed to the upper portion of the X-Y table 11 and the probe 16 can be lowered or lifted toward the wafer disposed on the upper portion of the chuck 13 when performing a wafer test operation.

The X-Y table 11 can be controllably conveyed in the direction of the arrows shown in the figure. The laser oscillating portions 12a and 12b of the laser measuring device (not shown) are disposed on the side surface of the X-Y table 11, respectively, so that the motion of the X-Y table 11 can be detected. That is, the laser oscillated from the laser oscillating sections 12a and 12b is reflected by the reflector 15 placed on the top of the jig glass 14, and the operating state of the X-Y table can be detected by measuring the reflected laser.

The operating state of the X-Y table 11 has a significant influence upon the actual wafer test operation. The XY table 11 must maintain the accuracy of the apparatus itself and the precision of the XY table 11 must be maintained since it depends entirely on how precisely the XY table 11 is operated whether or not the probe 16 can be correctly connected to the pad formed on the chip, There must be a way to compensate for errors that may occur in actual operation.

According to the conventional technique, a method of correcting an error value of a wafer test apparatus by using a laser measuring apparatus is used. This is a method of obtaining an error value for each transfer position while transferring the X-Y table 11 at a predetermined interval. The obtained error value is inputted to the control computer, and the error value inputted at the actual wafer test work is used for the position control of the X-Y table 11.

The above-described conventional method has a disadvantage in that it takes a long time to perform an operation. The operator must find the error value for each position through the laser measuring device while feeding the X-Y table 11 at a predetermined interval, and then input the error value to the control computer. These tasks are relatively time-consuming and difficult to work with, resulting in a reduction in work productivity. Further, since the additional reflector 15 must be disposed on the top of the jig glass 14, the difficulty of the operation is increased.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of correcting a position error of a wafer test equipment in which the operation is simple and accuracy is maintained.

1 is a schematic perspective view showing a method of correcting a position error of a wafer test apparatus according to the related art.

2 is a schematic perspective view showing a position error correction method of a wafer testing apparatus according to the present invention.

3 is a plan view of the zig glass.

4 is a flowchart showing a position error correction process using a jig glass.

Fig. 5 shows that a jig glass captured by a fixed camera appears on a monitor frame.

DESCRIPTION OF THE REFERENCE NUMERALS

11, 21: X-Y tables 12a, 12b:

13,23: Chuck 14,24: Zigglas

15: reflector 16: probe

25: Camera

In order to achieve the above object, according to the present invention, A chuck disposed on top of the table member; A zigglass in which horizontal and vertical grating lines are formed; A method for correcting a position error of a wafer test apparatus comprising a camera, the method comprising: setting a reference address by capturing an arbitrary grid line intersection point formed on the jig glass with the camera and matching it with a center on a monitor frame; A step of reading the grating pitch and the number of gratings of the jig glass, the number of grating pitches and the number of gratings, and the position at which the table member is to be transferred using the reference address, Transferring the table member to a position on each address table to capture the jig glass and confirming whether or not the centers of the grid intersections and the monitor frames coincide with each other at the corresponding positions; At each address location, Calculating a transfer amount of the table member as an error correction value by transferring the table member until the center of the monitor frame and the center of the monitor frame do not coincide with each other until the lattice line intersection and the center of the monitor frame coincide with each other, Method is provided.

BRIEF DESCRIPTION OF THE DRAWINGS The invention will be described in more detail with reference to the accompanying drawings.

Figure 2 shows a method of performing position error correction of a wafer test equipment in accordance with the present invention.

Referring to the drawing, a chuck 23 is disposed above the X-Y table 21, and a jig glass 24 is disposed above the chuck 23. The jig glass 24 is formed with a lattice pattern by laser marking as described later. A fixed camera 25 is installed on the upper side of the X-Y table 21. The fixed camera 25 can pick up a jig glass 24 disposed on the chuck 23.

Referring to FIG. 3, it can be seen that a lattice pattern formed by laser marking exists on the surface of the jig glass 24. Each lattice is formed with a predetermined pitch, and it is preferable to have a square. The pitch and the number of gratings are arbitrary. The point at which the vertical and horizontal lines that make up the lattice cross each other has an arbitrary address designated by P ₁₁ , P ₁₂ , P ₁₃ ... P _{x, y} ... P _{m, n} , respectively. P _{m, n} represents the final address.

FIG. 4 is a schematic flowchart illustrating a process of performing position error correction of the wafer test equipment using the jig glass 24 shown in FIG.

Referring to the drawing, in the preparation step of error correction (41), an image picked up by a camera is displayed on a monitor by using a camera 25 fixed on the upper part of the center of the work area of the XY table 21, Vertical lines are displayed. The monitor frame is shown at 51 in FIG. 5, which will be described later. Further, the XY table 21 is returned to the home position, and the jig glass 24 is placed on the chuck 23 as shown in Fig. The height of the chuck 23 is adjusted so that the laser-marked lattice on the jig glass 24 appears clearly on the monitor. The grid lines that are laser-marked on the jig glass 24 should be parallel to the horizontal and vertical lines shown on the monitor. If the grid line of the jig glass 24 and the display line of the monitor are not parallel to each other, the rotation angle of the chuck 23 should be adjusted.

5 shows that an image of the jig glass 24 shown in Fig. 3 taken by the fixed camera 25 appears on the monitor frame 51. Fig.

Referring to the drawing, a horizontal line 52 and a vertical line 53 are displayed on the monitor frame 51, and the intersection thereof is located at the center of the monitor frame 51. The intersection of the horizontal line 52 and the vertical line 53 is indicated by the reference symbol C. [ In the monitor frame 51, a grid line including the horizontal line 54 and the vertical line 55 laser-marked is displayed on the jig glass 24 and the horizontal line 54 and the vertical line 55 An arbitrary address P _{x, y} can be designated at the line intersection. In the preparation step 41, the XY table 21 is transported so that the grid intersections P _{x, y} of the picked-up jig glass 24 coincides with the center C of the monitor, Lt; / RTI > becomes the reference address thereafter.

The next step is the reading step 42 of the grating pitch and the number of gratings of the jig glass 24. The grating pitch and the number of gratings of the jig glass 24 can be arbitrarily set. The data relating to the lattice pitch and the number of gratings are pre-entered into the computer storage device by the operator before the preparation step 41 and are read from the storage device so that it can be used for error correction.

Next, the grid line intersection point (P _{x, y} ) of the jig glass 24 aligned with the center C of the monitor in the preparation step 41 is set as the reference address, and the XY table 21 is moved And creates the position in the address table on the jig glass 24. That is, the horizontal and vertical feed intervals and the feed ranges of the XY table 21 are created so as to correspond to the intervals and ranges of the crossing points of the laser marked laser beams on the fixture glass 24. This step is labeled 43 in FIG. 4A. The fact that the XY table 21 is transferred to a predetermined address in accordance with the address table created in the step 43 means that each lattice line intersection point laser marked on the jig glass 24 is within the imaging range of the camera 25 It means that the XY table 21 is transported. In an ideal case, the intersection (P _{x, y} ) of the grid lines 54, 55 taken at each address should match the center C of the monitor. However, in actuality, due to a mechanical error of the XY table 21 itself, for example, an error that may occur when the structure itself is slightly twisted or transferred, the lattice line intersection of the jig glass 24 is displaced from the monitor frame 51 (C).

Next, the XY table 21 is transferred to the initial address (for example, P _{11 in} FIG. 3) (step 44) in accordance with the address table for the transfer position of the XY table 21 created in the previous stage 43, And picks up the jig glass 24 at the corresponding address.

Next, it is checked whether or not the intersection P ₁₁ of the grid lines 54 and 55 of the jig glass 24 coincides with the center C of the monitor frame 51 (step 45). The intersection (P ₁₁₎ of the display frame 51 does not match the center (C), the center of the grid lines (54 and 55) of the jig glass 24 monitor the frame 51 as shown in Figure 5 of Are spaced apart from the center C by a distance d, which can be expressed as x and y respectively in the horizontal direction and the vertical direction.

The values of x and y can be obtained by a known method. The operator moves the XY table 21 while watching the monitor so that the intersection of the grid lines 54 and 55 coincides with the center point C of the monitor frame 51 (step 46) It is possible to automatically calculate the feed amount until the feed amount is reached. The x and y thus calculated are input to the storage device as a feed error correction value (step 47).

The values of x and y calculated as above are error correction values for the grid intersection P _{11 which} is a position on the fixture 24. That is, in order to transfer the wafer 21 to a position corresponding to the grid intersection point P ₁₁ of the jig glass 24 when the actual wafer is placed on the chuck 23 and the wafer is tested, And corrects the feed error by the value of y.

The feed error correction values (x and y) should be calculated at all grid intersections. Therefore, after the feed error correction value for the first grid intersection point P ₁₁ is determined, the feed error correction for the next grid intersection point (e.g., P ₁₂ in FIG. 3) The value must be found. If the address of the grid intersection point to be read at decision step 48 is not the last address (e.g., P _{m, n} in FIG. 3), the XY table 21 is again moved to the next grid intersection point (step 49) The feed error correction value is obtained.

The transfer error correction value obtained as described above can be read and used from the storage device during operation of the actual wafer test apparatus. That is, as described above, the test for the wafer is performed by placing the wafer on the chuck 13, transferring the XY table 11 to each position, and connecting the probe (16 in Fig. 1) . The transfer error that occurs when the XY table 11 is transferred to each position is corrected using the error correction value obtained using the jig glass 24. [ The feed error correction value for a point near an arbitrary grid intersection point P _{x, y} can be obtained by calculation. That is, based on the error correction value for the grid intersection point P _{x, y} , the feed error correction value for the corresponding point can be obtained in consideration of the horizontal direction and the vertical direction distance, and this can be applied to the wafer test.

The position error correction method of the wafer test apparatus according to the present invention can more easily obtain the position error correction data for each position and can correct errors more accurately when applied in actual wafer test operation .

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is evident that many alternatives, modifications, and variations will be apparent to those skilled in the art. For example, in addition to the case of using the XY table 21 shown in the drawing, the wafer testing apparatus may be implemented so that the probe 16 can be moved in a plane at the top of the wafer by the XY robot, The error correction method according to the present invention can be applied. In addition to the wafer test equipment, the present invention can be applied to compensate for position errors in chip mounters and the like that require precise position control. Accordingly, the true scope of the invention should be determined only by the appended claims.

Claims (1)

A table member capable of relative plane motion; A chuck disposed on top of the table member; A zigglass in which horizontal and vertical grating lines are formed; A method for correcting a position error of a wafer test apparatus including a camera, Setting a reference address by capturing an arbitrary grid intersection point formed on the jig glass with the camera and matching it with a center on a monitor frame, Reading the grating pitch and the number of gratings of the previously input jigglas, Creating a position to which the table member is to be transferred using the grid pitch and the number of gratings and the reference address as an address table corresponding to the grid intersection points of the jigglas, Transferring the table member to a position on each address table to capture the jig glass and confirming whether or not the center of the monitor frame and the intersection of the grid line at the position coincide with each other; If the grid intersection point and the center of the monitor frame do not coincide with each other at the respective address positions, calculating the error correction value by feeding the table member until the lattice line intersection and the monitor frame center coincide with each other And correcting the position error of the wafer test apparatus.