KR100212544B1 - Method for detecting error of bit stream in h.263 algorithm - Google Patents

Abstract

According to the present invention, error detection in a reconstructed video bit stream can be used to effectively detect an error in a reconstructed H.263 video bit stream by using INTRADC information included in block data on a bit stream of a video frame. The present invention relates to a method for inputting a video bit stream reconstructed into an original signal before being encoded through a decoding means, and continuously performing a codeword search for a plurality of pieces of information included in each block. Retrieve a codeword for INTRADC information of a predetermined bit; Checking whether the INTRADC information in each block to be searched corresponds to any one of a plurality of preset bit values having a predetermined bit length; If the retrieved INTRADC information corresponds to any one of a plurality of preset bit values, no error signal is generated; otherwise, an error signal is generated and provided to the error concealment and recovery means; H.263 video bit stream by performing error detection in the video bit stream by performing error concealment and recovery in the bit stream section in which an error occurs among the restored video bit streams based on the generated error signal. Error occurrence detection and error concealment and recovery using it can be effectively performed.

Description

H.263 Error Detection Method in Video Bit Stream

1 is a schematic block diagram of a decoding system suitable for applying an error detection method in an H.263 video bit stream according to the present invention.

2 is a process of detecting an error occurring in an H.263 video bit stream using INTRADC information included in a block layer according to a preferred embodiment of the present invention, and performing error concealment and recovery based on the error detection result. Flowchart showing the.

* Explanation of symbols for main parts of the drawings

100: system multiplexed decoding block 200: video decoding block

300: error detection block 400: error concealment and recovery block

500: frame memory

The present invention provides a video signal compression-coded based on the H.263 algorithm established by the International Telecommunication Union (ITU) for the realization of very low bit rate video transmission such as video telephony and video conferencing system. The present invention relates to a technique for detecting an error during restoration, and more particularly, to an error detection method suitable for detecting an error that may occur in an H.263 video bit stream restored to an original signal through a receiving image decoding system.

As is well known in the art, the transmission of discrete video signals can maintain better image quality than analog signals. When a video signal composed of a series of image frames is represented in digital form, a considerable amount of transmission data is generated. However, since the usable frequency range of the conventional transmission channel is limited, in order to transmit a large amount of digital data, it is necessary to compress the data to be transmitted and reduce its transmission amount.

On the other hand, as the various compression techniques mainly used for encoding video signals in H.261, which is mainly used for communication media, and MPEG-1 algorithm which is suitable for storage media, and MPEG-2 algorithm, which is suitable for video media, stochastic coding companies and Hybrid coding companies that combine temporal and spatial compression techniques are known to be the most efficient.

Most of the hybrid coding schemes, which are one of the above coding schemes, use motion compensated DPCM (differential pulse code modulation), two-dimensional discrete cosine transform (DCT), quantization of DCT coefficients, variable-length coding (VLC), and the like. Here, the motion compensation DPCM determines a motion of the object between the current frame and the previous frame, and predicts the current frame according to the motion of the object to generate a differential signal representing the difference between the current frame and the prediction value. These methods are described, for example, in Staffan Ericsson's Fixed and Adaptive Predictors for Hybrid Predictive / Transform Coding, IEEE Transactions on Communication, COM-33, NO.12 (Dec. 1985, December), or A motion Compensated Interframe from Ninomity and Ohtsuka. Coding Scheme for Television Pictures, IEEE Transaction on Communication, COM-30, NO.1 (1982, January).

In general, the DPCM / DCT hybrid coding scheme as described above has a target bitrate of Mbps, and may be a CD-ROM, a computer, a home appliance (such as a digital VCR), a broadcast (HDTV), etc. It is mainly concerned with MPEG-1, 2 and H.261 coding algorithms for high bit rate encoding, which mainly consider only the statistical characteristics of block-by-block motion in the image, which has already been completed by the World Standards Organization.

On the other hand, in recent years, various devices such as home appliances can process and provide image information with vast data due to the recent improvement in PC performance and spread, the development of digital transmission technology, the realization of high-definition display devices, and the development of memory devices. In order to meet this demand, the transmission of audio-video data through existing low-speed transmission paths (eg, PSTN, LAN, mobile network, etc.) with a bit rate of kbps to meet these demands, There is a need for new coding techniques with high compression rates for storage to storage.

Therefore, at present, there is a need for a standard of a coding scheme for realizing additional compression that can be realized in a video telephony and a video conferencing system, and according to the needs of the times, subjective picture quality is considered important based on recent human visual characteristics. The development of low bit rate video encoding for MPEG-2 corresponding to MPEG-4 standard and low bit rate video encoding for H.263 corresponding to H.261 are being actively developed. The present invention here relates to an error detection technique in the H.263 algorithm.

On the other hand, when transmitting a video signal, the transmitting side compresses and encodes the image signal in the buffer of the output side in order by taking into account the spatial and temporal correlation of the video signal in block units or pixel units through the above-described encoding technique. The video data, i.e., the bit stream, will be transmitted to the decoding system on the receiving side via the transmission channel at a desired bit rate in response to the channel requirements.

Next, in the decoding system on the receiving side, the bit stream of the compressed-coded video received through the transport channel is converted into the original signal before encoding the coded video data by using a technique such as IVLC, inverse quantization, or IDCT. The recovered video bit stream may be recovered and concealed such as a transmission error that may occur during transmission, and then provided to the display side for display through a monitor. The error recovery and concealment schemes are not actively adopted by the H.261 algorithm, but the H.263 algorithm is more aggressive in consideration of the fact that bit strings are transmitted in the ATM (Asynchronous Transfer Mode) transmission network. Recovery and concealment techniques are provided.

In addition, in the image encoding method using the H.263 algorithm, even if only one bit is damaged in the bit stream of the image frame, the image quality degradation in the substantially reconstructed image can be greatly affected. Therefore, detecting the occurrence of an error on the bit stream of the video frame is a very important process for applying an effective error recovery and concealment technique.

Accordingly, the present invention devised in view of the above point, and effectively detects an error in the H.263 video bit stream reconstructed using the INTRADC information included in the block data on the bit stream of the video frame. An object of the present invention is to provide an error detection method in a reconstructed video bit stream.

In order to achieve the above object, the present invention provides an original signal before encoding using a decoding means including techniques of IVLC, inverse quantization, and IDCT for the encoded H.263 video bit stream separated through the system multiplexing decoding block. 10. A method for detecting an error signal generation position on a bit stream to conceal and recover an error generated when an error occurs on the restored video bit stream through error concealment and recovery means. Retrieving a codeword for INTRADC information of a predetermined bit by inputting a bit stream to continuously perform codeword retrieval on a plurality of pieces of information included in each block; The INTRADC information in each searched block has a plurality of predetermined bit values having a predetermined bit length, and whether the INTRADC information found through the codeword search step corresponds to any one of the predetermined plurality of bit values. Checking; Not generating the error signal if the retrieved INTRADC information corresponds to any one of the preset plurality of bit values, and generating the error signal to provide the error concealment and recovery means if not. And performing error concealment and recovery in the bit stream section in which the error occurred among the reconstructed video bit streams based on the generated error signal.

Other objects and various advantages of the present invention will become more apparent from the preferred embodiments of the present invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, according to a draft published in 1995 by the International Telecommunication Union (ITU), the image data hierarchy of H.263 is based on the picture layer, the GOB layer, and the macro block layer. block layer and block layer.

In the above hierarchical structure, the picture layer is screen data for one screen, and the data of each picture formed by the picture layer is composed of picture header information followed by GOB data, and the GOB has a CIF (common intermediate format) format. ) Is composed of screen data divided into 12 screens, and is divided into screen data divided into 3 pieces in the case of QCIF (quarter CIF) in which the number of pixels in the horizontal and horizontal directions is half of CIF. The data of each GOB is followed by the GOB header information followed by It consists of macro block (MB) data.

Further, the macro block layer MB is composed of macro block header information followed by block data, and one block in the block layer is composed of four luminance blocks and two chrominance blocks, and each block data of the block layer is It consists of 8 bits of DC coefficient for INTRADC (INTRADC) information and TCOEF (transform coefficients) information having a variable length. Herein, the present invention is intended to detect an error in a reconstructed video bit stream using a DC coefficient for INTRA block included in a block.

Meanwhile, in the present invention, INTRADC information to be used for error detection in each block data in the block layer has information values as shown in the following table.

As can be seen from the above table, the fixed length code included in each block on the video bit stream according to the present invention, and in the INTRADC information value used for error detection, has a 0000 0000 bit value in accordance with the recommended standard of H.263. The 1000 0000 bit value is not used. Accordingly, the present invention is to detect an error that may occur in the H.263 video bit stream restored to the original signal through the decoding system using such a condition, and in the video bit stream section reconstructed based on the error detection result It is intended to enable error concealment and recovery of the portion where an error occurs.

Next, a process of detecting an error that can occur on the H.263 video bit stream reconstructed according to the present invention using the INTRADC information having the 8-bit length as described above will be described.

1 is a schematic block diagram of a decoding system suitable for applying an error detection method in an H.263 video bit stream according to the present invention. As shown in the figure, a typical decoding system includes a system multiplexed decoding block 100, an image decoding block 200, an error detection block 300, an error concealment and recovery block 400, and a frame memory 500. do.

In FIG. 1, the system decoding block 100 performs a function of synchronously taking and separating information, such as a compressed coded video, an audio, a text, and the like, which are provided from a coding system of a transmitting side, not shown, through a transmission channel. For example, the separated voice and text information may be provided in a voice and text information decoding block (not shown), and the video information in the form of a bit stream may be provided to the video decoding block 200 through the ranin L11.

In addition, the video decoding block 200 restores a video bit stream that has been compression-coded according to a standard determined in the standard of H.263 to an original signal before being coded. As is well known in the present invention, a compressed video bit stream is recovered by using techniques such as IVLC, inverse quantization, IDCT, and motion compensation prediction to generate a video bit stream for an original signal. It is provided to the error detection block 300 through L13 and at the same time to the error concealment and recovery block 400 via the line L15.

On the other hand, the error detection block 300 detects an error in the video bit stream of the reconstructed intra frame or inter frame on the line L11, and in particular, INTRADC having an 8-bit length included in each block on the video bit stream according to the present invention. Information is used to detect a location where an error occurred in the reconstructed video bit stream, wherein the detected error location information is an error concealment and recovery block through line L17 as a control signal for error concealment or recovery in the generated bit stream. Provided at 400.

As already mentioned above, in the present invention, the INTRADC data in the block data to be used for error detection does not use the 0000 0000 bit value and the 1000 0000 bit value according to the H.263 recommended standard. Therefore, by using the above conditions, the present invention detects INTRADC information included in each block data and checks bit string values corresponding to the detected INTRADC information, thereby detecting the occurrence of an error in the bit stream based on the comparison result. It is done.

Accordingly, the error detection block 300 detects INTRADC information included in each block on the reconstructed video bit stream provided from the video decoding block 200 through the line L13, and the detected INTRADC information value is 0000 0000 or 1000 0000. If it is determined to have a bit value, an error signal (e.g., a logic signal of 1 or 0) is generated to indicate that an error has occurred in the corresponding block data of the reconstructed video bit stream to the error concealment and recovery block 400. to provide. As a result, the error concealment and recovery block 400 replaces the corresponding GOB data including the block in which the error occurred in the restored video bit stream that is currently input with the neighboring previous GOB data stored in the frame memory 500, and the like. Through the technique of error concealment and recovery is performed.

In this case, the error concealment and recovery block 400 performs error concealment on the corresponding GOB data having the macro block in which the error has occurred without performing error concealment on the data of only the corresponding block in which the error occurs. This is because the blocks do not have start code information, so it is not possible to know in which position of the GOB data the block in which the current error occurrence is detected is present. Therefore, error concealment and recovery are performed on the corresponding GOB data including the block in which the occurrence of the error is detected.

Next, according to the present invention, an error is detected in an image bit stream reconstructed using INTRADC information included in each block data, and an error concealment is performed based on the detection result. It will be described in detail with reference to.

First, in the error detection block 300, if a reconstructed image bit stream on the line L13 provided from the image decoding block 200 described above, that is, the image bit stream for the reconstructed current frame is input (step 210), is inputted. A codeword search for corresponding information in each block for the bit stream of the current frame, for example, 8-bit INTRADC information and TCOEF information, is performed (step 220).

Then, in step 230, if the codeword retrieved in step 220 is checked and the currently retrieved codeword is not the codeword for the INTRADC information to be searched for error detection according to the present invention, the codeword for the INTRADC information. The codeword search step 220 is repeated until is searched, and if it is determined that the currently searched codeword is a codeword for INTRADC information to be searched, the process proceeds to step 240.

Meanwhile, the INTRADC information in each block searched according to the present invention is defined such that the fixed length code consists of the remaining values except for the 0000 0000 bit value and the 1000 0000 bit value according to the recommended standard of H.263. Therefore, in step 240, first, through step 230, it is checked whether the retrieved INTRADC information bit value included in each block data of the current picture is 0000 0000.

If the result of the check in step 240 determines that the retrieved INTRADC information bit value is 0000 0000, the process proceeds to step 250 where the error detection block 300 generates an error plug value 1, which is generated in this manner. An error plug signal of logic 1 value is provided to Aaron concealment and recovery block 400.

As a result, if an error signal is input from the error detection block 300, the error concealment and recovery block 400 generates an error on the reconstructed image bit stream currently input from the image decoding block 200 through the line L15. Error concealment and recovery is performed on the corresponding GOB data including the identified block data (step 260). For example, the error concealment and recovery block 400 stores the corresponding GOB data (GOB data including the block in which an error has been found) in the restored image bit stream currently input in the previous GOB stored in the frame memory 500. Techniques such as replacing data will conceal errors. Therefore, error concealment for the corresponding GOB data having an error on the recovered video bit stream will be smoothly performed. In this case, since it is not possible to know in which position of the corresponding GOB data the block in which an error is detected is present, the present invention performs error concealment and recovery on one GOB data including the block in which the error is detected. do.

On the other hand, if it is determined that the searched INTRADC information bit value is not 0000 0000 as a result of the check in step 240, the process proceeds to step 270, in which the searched INTRADC information bit value is 1000 again. It is checked whether or not 0000, and if it is determined that the retrieved INTRADC information bit value is a bit value other than 1000 0000, the process does not generate an error signal in the error detection block 300, that is, the error plug is set to 0. The process proceeds to step 280. Accordingly, in the error concealment and recovery block 400, in response to an error signal (a logic signal of 0) indicating that no error has been provided from the error detection block 300, the error concealment and recovery technique is input without application of the error concealment and recovery technique. The reconstructed video bit stream will be provided to the display side, not shown in the following stage.

On the other hand, if the check result in step 270 determines that the retrieved INTRADC information bit value is 1000 0000, then processing proceeds to step 250 as described above, in subsequent steps, i.e., in the reconstructed video bit stream. An error concealment and recovery process (step 260) is performed on one piece of GOB data including the block in which error detection is confirmed. Therefore, when an error occurs on the image bit stream (that is, the block) reconstructed through the above process, error concealment for the error generated in units of GOB data will be smoothly performed.

As described above, according to the present invention, when an error occurs in the image bit stream encoded according to the algorithm of H.263 and then restored on the receiver side, the error is included in the image bit stream to conceal or recover the generated error. By using the INTRADC information of the block, it is possible to effectively perform error detection and error concealment and recovery in the H.263 video bit stream accompanied by deterioration in the reproduced video.

Claims (3)

The encoded H.263 video bit stream separated through the system multiplexed decoding block is restored to the original signal before being encoded by using decoding means including techniques of IVLC, inverse quantization and IDCT, and error concealment and recovery means A method of detecting an error signal generation position on a bitstream to conceal and recover an error generated when an error occurs on the reconstructed video bit stream through the input of the reconstructed video bit stream to be included in each block. Retrieving a codeword for INTRADC information of a predetermined bit by performing a codeword search on a plurality of pieces of information continuously; The INTRADC information in each searched block has a plurality of predetermined bit values having a predetermined bit length, and whether the INTRADC information found through the codeword search step corresponds to any one of the predetermined plurality of bit values. Checking; Not generating the error signal if the retrieved INTRADC information corresponds to any one of the preset plurality of bit values, and generating the error signal to provide the error concealment and recovery means if not. And performing air concealment and recovery in the bit stream section in which the error is generated among the reconstructed video bit streams based on the generated error signal. The method of claim 1, wherein the INTRADC information has a length of 8 bits and consists of remaining bit values except two 8-bit information values. 3. The error detection method of claim 2, wherein the two 8-bit information values are bits of 0000 0000 and 0000 0000.