KR100204494B1 - Apparatus and method of controlling job in a distributed processing system - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a job control apparatus and a method thereof in a distributed processing system in which one job is distributed in various data processing systems.

A job control apparatus in a distributed processing system according to the present invention includes a plurality of data processing means (100); Shared interface buffer means (200); A plurality of bus means (300); And job control means (400).

The job control method in the distributed processing system configured as described above includes the steps of storing data to be transmitted by the transmission data processing means in the address indicated by the tail pointer of the shared interface buffer means and simultaneously storing the identifier of the shared interface buffer, A first step (S1) of transmitting information composed of an identifier of the means to the job control means; And a second step S2 (S2) of causing the reception data processing means to access the data to be transmitted using the transmitted information in a predetermined order after the job control means stores the information transmitted in the first step ). According to the present invention, a system fault generated by a plurality of data processing apparatuses to transmit data to a data processing apparatus at the same time is eliminated, and the entire distributed processing system operates smoothly without errors.

Description

An apparatus and a method for controlling a job in a distributed processing system

The present invention relates to a job control apparatus and method in a distributed processing system (DPS) for distributing and processing one job in a plurality of data processing apparatuses, and more particularly, The present invention relates to a job control apparatus and method for eliminating a system fault caused by an attempt to deliver to a plurality of data processing apparatuses, thereby allowing the entire distributed processing system to operate smoothly.

In general, a system that performs one task is divided into a central processing system and a distributed processing system according to the task execution method.

The central processing system refers to a main body device for concentrating and processing data input from a terminal device at a remote place, and an aggregate of peripheral devices and line control devices. The central processing system is advantageous in that the data processing apparatus (for example, a computer) can be enlarged due to an increase in the amount of data, and processing costs can be reduced, and comprehensive and consistent data processing can be performed.

The distributed processing system refers to a system in which all processes are not concentrated in one data processing apparatus but are geographically divided into a plurality of data processing apparatuses, which are organically connected and integrated in performing a single task, The development of data communication technology and the expansion of the field of computer use.

The distributed processing system is classified into a tightly-coupled distributed processing system and a loosely-coupled distributed processing system according to the type of coupling.

The data processing devices of the tightly coupled distributed processing system share a clock with a memory. The communication between these multiprocessor devices always takes place via a shared memory device. That is, a large system, such as a computer network, is connected equally and shares a database or processing capability.

② Loosely-coupled distributed processing system data processing devices do not share clocks with storage devices. Instead, each data processing apparatus has its own local memory, and the data processing apparatuses communicate with each other through various communication lines such as a high-speed bus or a telephone line. In other words, it refers to a system in which a personal computer, an office computer, and a large computer are hierarchically configured, such as a local area network (LAN) in an enterprise. In this case, since the distributed processing system shares resources such as a memory and a bus, when two or more data processing devices attempt to use the same resource (memory or bus) at the same time, a job control device capable of controlling the same is required. It is called Arbitor.

Herein, the loosely coupled distributed processing system will be considered as a basis.

FIG. 1 is a block diagram schematically showing a conventional distributed processing system. The conventional distributed processing system includes first to fourth data processing units 10, 12, 14, 16 and first to fourth interface buffers 20, 22, 24, and 26, and a shared bus 30.

Here, the physical number of the data processing unit and the interface buffer is not limited, but can be designed flexibly according to the application.

The first to fourth data processing units 10, 12, 14, and 16 share one task in accordance with each functional geographical characteristic. Here, each of the first to fourth data processing units 10, 12, 14, and 16 may fetch data from another data processing unit or data to another data processing unit for data processing.

However, if the first to fourth data processors 10, 12, 14, and 16 have to operate at the same time, but have different operating environments, for example, when the operating frequencies (operating clocks) It is necessary to provide an interface device to the input / output terminals of the first to fourth data processing units 10, 12, 14,

The first interface buffer 20 provides the interface of the first data processor 10. For example, it may store and receive data input from another data processing unit, and may also store and transmit data processed by the other data processing unit. The second interface buffer 22 provides the interface of the second data processing unit 12 and the third interface buffer 24 provides the interface of the third data processing unit 14, The buffer 26 provides the interface of the fourth data processor 16.

The first to fourth interface buffers 20, 22, 24, and 26 are mainly implemented as a dual port memory. The dual port memory has two input / output terminals and is a memory device capable of accessing from both ports independently. That is, the two ports are all capable of accessing data independently of each other with an address input and a control signal input.

The shared bus 30 serves as a data transmission or communication between the first to fourth interface buffers 20, 22, 24 and 26. As a result, the first to fourth data processing units 10, 12, 14, and 16 perform data transmission.

By distributing and processing one task using the data processor, the interface buffer, and the shared bus, the normal operation of the entire distributed processing system can be achieved.

However, in the conventional distributed processing system as described above, when the same data generated in one data processing apparatus is transmitted to various data processing apparatuses simultaneously due to an increase in data processing amount and a complicated data processing process, The number of data processing apparatuses to be used is rapidly increased, which causes a great obstacle to the overall system operation.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide a distributed processing system in which a plurality of data processing apparatuses distribute one job, The present invention has been made to solve the above-mentioned problems occurring in the prior art, and it is an object of the present invention to provide a job control device and a method thereof.

According to an aspect of the present invention, there is provided a job control apparatus in a distributed processing system,

A plurality of data processing means for functionally and geographically dividing and processing one task; A shared interface buffer means for allocating a buffer space from a head pointer (read pointer) to a tail pointer (write pointer) to each of the data processing means to provide an interface; A plurality of bus means for connecting the shared interface buffer means to each of the data processing means; And a transmission data processing unit configured to transmit the identifier of the transmission data processing unit and the tail of the shared interface buffer in which the data to be transmitted is stored from the transmission data processing unit to the other transmission data processing unit, And a job control means for receiving and storing the pointer and the identifier of the received data processing means and controlling the arrival data processing means to access the data in turn.

A shared interface buffer means for allocating a buffer space from a head pointer (read pointer) to a tail pointer (write pointer) to each of the data processing means as described above to provide an interface, a plurality of bus means, and a distributed processing In a system, a job control method when data is to be transferred from one transmission data processing apparatus to one or a plurality of reception data processing apparatuses

Wherein the transmission data processing means stores the data to be transmitted in the address pointed to by the tail pointer of the shared interface buffer means and simultaneously transmits the identifier and the tail pointer and information composed of the identifier of the received data processing means to the job control means To a first step; And a second step of allowing the reception data processing means to access the data to be transmitted using the transmitted information in a predetermined order after the job control means stores the information transmitted in the first step .

According to the present invention, a system fault generated by a plurality of data processing apparatuses to transmit data to a data processing apparatus at the same time is eliminated, and the entire distributed processing system operates smoothly without errors.

1 is a block diagram schematically showing a conventional data distribution processing system;

2 is a block diagram showing a data distribution processing system according to the present invention;

3 (a) shows an internal entry structure of an annular queue,

(B) is a diagram structurally showing an annular queue,

FIG. 4 is a diagram illustrating an internal entry structure of the job control unit shown in FIG. 2,

FIG. 5 is a flowchart for explaining a data distribution processing method according to the present invention,

6 (a) and 6 (b) are diagrams for explaining an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

100: first data processing unit 120: second data processing unit

140: third data processing unit 160: fourth data processing unit

200: Shared interface buffer 300: Bus

400: Operation control unit

T1 to T4: first to fourth head pointers H1 to H4: first to fourth head pointers

requet: request signal grant: accept signal

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, a distributed processing system will be briefly described in order to facilitate understanding of the present invention.

Generally, a distributed processing system refers to a system that does not concentrate all processing in a single data processing apparatus in a single task, but rather distributes them to a plurality of data processing apparatuses in a geographical manner, and integrates them by organically connecting them. The system has evolved due to the development of data communication technology and the expansion of the field of computer use.

Advantages of the distributed processing system include (1) resource sharing, (2) processing speed improvement, (3) reliability improvement, and (4) communication technology improvement.

① Resource sharing: Processors with different functions are connected to each other, so one processor can share the available resources of another processor. (2) Improvement of processing speed: Since a specific processing is divided into a plurality of partial operations that can be performed simultaneously, processing can be distributed to various processors in order to perform them simultaneously. In addition, it is possible to distribute the overload of a specific processor. (3) Improvement of reliability: When a failure occurs in one processor in the distributed processing system, malfunction of the entire system can be prevented.

FIG. 2 is a block diagram showing a job control apparatus in the distributed processing system according to the present invention. The job control apparatus of the present invention includes first to fourth data processing units 100, 120, 140, and 160; A shared interface buffer 200; A bus 300; And a job control unit 400. In the present embodiment, the number of data processing units is set to four, but this is for the sake of easy explanation, and thus should not be construed as limiting.

① The first to fourth data processing units

The first to fourth data processors 100, 120, 140, and 160 distribute and process one task functionally and geographically.

The data processing unit may transmit data processed by the data processing unit to another data processing unit, or may receive data from another data processing unit.

② Shared interface buffer

When the shared interface buffer 200 desires to transmit data from any one of the first through fourth data processors 100, 120, 140, and 160 to another data processor, the shared interface buffer 200 performs an appropriate interface through data buffering And is commonly connected to the first to fourth data processing units 100, 120, 140,

The shared interface buffer 200 includes a stack having a dual port memory and a Last In First Out structure, a queue having a first in first out (FIFO) structure, Dequeue, circular queue, etc., which is a mixture of stack structure and queue structure.

3 (a) is a diagram showing an internal entry structure of an annular queue, and (b) is a diagram showing an annular queue structurally.

That is, as shown in (a) of FIG. 3, the annular queue structure has a ring-shaped start and endless shape connecting the head portion and the tail portion of the queue structure.

For example, as shown in FIG. 3 (b), assume that n data processing units are connected to an annular queue through a bus. At this time, each data processing apparatus has a head pointer and a tail pointer, and if necessary, receives the head pointer value of another data processing apparatus as its own head pointer value. Accordingly, the tail pointer, which is a write pointer (WRITE pointer), is set to a dedicated pointer of each data processing apparatus, and the head pointer, which is a read pointer, is set as a common pointer so that it can be used by other data processing apparatuses.

In the embodiment of the present invention, a distributed processing system in which the shared interface buffer is implemented as the circular queue will be described. That is, the shared interface buffer 200 allocates space from the head pointer H1 to the tail pointer T1 to the first data processing unit 100, and allocates the tail pointer H2 from the second data processing unit 120 to the tail pointer T2 A space from the head pointer H3 to the tail pointer T3 is allocated to the third data processing unit 140 and a space from the head pointer H4 to the tail pointer T4 is allocated to the fourth data processing unit 160 .

The first to fourth data processing units 100, 120, 140, and 160 may store data to be input to the respective data processing units. Alternatively, the first to fourth data processing units 100, 120, And outputs the data.

③ Bus

The bus 300 connects the shared interface buffer 200 to each of the first to fourth data processing units 100, 120, 140, and 160.

(4)

When the job control unit 400 is to transmit data to one or more other data processing units (hereinafter, referred to as a transmission data processing unit) in the data processing unit (hereinafter, referred to as a transmission data processing unit) Information necessary for data transmission is received and stored in order, and the received data processing means is controlled to sequentially access the data. Here, the information required for data transfer refers to an identifier (id) of the transmission data processing unit, a tail pointer of the shared interface buffer 200 in which the data to be transmitted is stored, and an identifier of the received data processing unit.

The job control unit 400 includes an identifier (owner id) of the transmission data processing unit, which is implemented as an annular queue and is input from the transmission data processing unit, a tail pointer content (address) of the shared interface buffer 200 in which the data to be delivered is stored, And sequentially stores and outputs an identifier (destination id) of the received data processing unit.

For example, as shown in FIG. 4, when the job control unit has an annular queue structure composed of n lines, each line consists of an owner id, a tail pointer content, and a destination id. In addition, since the number of bits of the destination id is set to be equal to or larger than the number of the data processing units, the destination id and the data processing unit maintain a one-to-one relationship, so that one data can be transmitted to the plurality of data processing units.

A job control method in the distributed processing system according to the present invention will be described with reference to FIGS. 2, 4 and 5. FIG. FIG. 5 is a flowchart for explaining a job control method when data is to be transferred from one data processing unit (transmission data processing unit) of the distributed processing system to one or a plurality of data processing units (received data processing unit).

In the first step S1, the transmission data processor stores the data to be transmitted in an address (tail pointer content) pointed to by the tail pointer of the shared interface buffer 200, and at the same time, the identifier of the transmission data processor To the task control unit 400, an address (tail pointer content) pointed by the tail pointer of the shared interface buffer 200 storing the data to be transferred and a destination id of the received data processing unit.

The first step (S1) is divided into four processes to be described in detail.

In order to transmit data generated by an arbitrary data processing unit to another data processing unit, a shared interface buffer must be provided to provide an interface necessary for data transfer.

In step 1-1 (S1-1), the transmission data processing unit transmits a request signal (requst) to use the shared interface buffer to the job control unit 400.

In step 1-2 (S1-2), the job control unit 400 transmits a grant signal (grant) according to the received request signal to the transmission data processing unit.

In step 1-3 (S1-3), the transmission data processing unit having received the grant signal transmits the data to be transmitted to the tail pointer (unique pointer of the transmission data processing unit) of the shared interface buffer 200 tail pointer content. As described above, since the tail pointer of each data processing unit is a dedicated pointer, the address indicated by the tail pointer means an address indicated by the dedicated tail pointer of the transmission data processing unit.

In step 1-4, the transmission data processing unit receives an identifier (owner id) of the transmission data processing unit and an address (tail pointer) of the shared interface buffer 200 in which the data to be transmitted is stored, content and a destination id of the received data processing unit to the job control unit 400.

In the second step S2, the job control means 400 configures the information (owner id, tail pointer content, and destination id) transmitted in the first-second step S1-2 as one line, And the target data processing unit accesses the data to be transferred using the transmitted information.

The second step S2 will be described in detail as follows.

In step 2-1 (S2-1), the task control unit 400 having the circular queue structure transmits the owner id, the tail pointer content, and the destination id, which are transmitted in the step 1-2 (S1-2) And then stores the lines in the tail portion of the annular queue in the input order.

In step 2-2 (S2-2), the destination control unit 400 determines the received data processing unit to receive the data using the destination id among the lines of the head part of the circular queue.

In step 2-3, the received data processing unit determined in step 2-2 (S2-2) analyzes the owner id to determine to which data processing unit the data to be fetched belongs. In other words, After determining whether the data is stored in a space allocated to a data processing unit in the space of the shared interface buffer unit 200, the data is fetched by using the tail pointer content as an address in the buffering space of the determined data processing unit fetch).

For better understanding of the present invention, referring to FIGS. 2, 4, 5 and 6, the present invention will be described as follows. 6A is a diagram showing a data buffering state of the initial shared interface buffer, and FIG. 6B is a diagram showing a work table of the first task control section. FIG. FIG. 5B is a view showing a data buffering state of the shared interface buffer after step S1-3, and FIG. 6B is a diagram showing a work table of the first task control unit after step 2-1 (S2-1).

First, it is assumed that data 1011 generated by the second data processing unit 120 is to be transmitted to the first data processing unit 100 and the fourth data processing unit 160, respectively.

In this case, the transmission data processing unit is the second data processing unit 120 and the reception data processing unit is the first and fourth data processing units 100 and 160. At this time, the head of the first, second and fourth data processing units 100, The pointers are H1, H2, H4 respectively, the tail pointers are T1, T2, T4, and the unique identifiers are DP1, DP2, DP4.

In the first step S1-1, the second data processing unit 120 transmits a request signal requst to use the shared interface buffer 200 to the job control unit 400 for data transmission .

In step 1-2 (S1-2), the job control unit 400 transmits a grant signal (grant) according to the received request signal to the second data processing unit 120. [ That is, the permission signal means that the second data processing unit 120 can use the shared interface buffer 200.

In step 1-3, the second data processing unit 120 receives the grant signal and transmits the data 1011 to be transmitted to the tail pointer T2 of the shared interface buffer 200 content. ((A) of Fig. 6)

In step S1-4, the second data processing unit 120 receives an identifier (DP) of its own, an address (tail pointer) pointed by the tail pointer T2, (DP2), an address (tail pointer content) pointed by the tail pointer T2 and a first data processing unit (DP2) to the task control unit 400 after transmitting an identifier (DP) 100 to the job control unit 400. The job control unit 400 receives the destination ID (DP4)

In step 2-1 (S2-1), the task control unit 400 having an annular queue structure receives the owner ID (DP2) and tail pointer content (T2 address ) And the destination id (DP1) into one line, and then stores the line in the tail portion of the job control unit 400, that is, the circular queue, and increases the tail pointer of the circular queue by 1 (B))

Subsequently, an owner id (DP2), a tail pointer content (address of T2), and a destination id (DP4) transmitted in the step 1-4 are formed into a single line, And stored in the tail portion.

After a certain period of time, it is assumed that the line stored in the tail of the job control unit 400 having the annular queue structure in step 2-1 (S2-1) becomes the headline, and the next step will be described.

In step 2-2 (S2-2), the destination control unit 400 determines the received data processing unit to receive the data using the destination id among the lines of the head part of the circular queue. That is, as shown in (b) of FIG. 6, since the destination id is DP1, the received data processing unit is determined as the first data processing unit 100.

In step 2-3, the received data processing unit determined in step 2-2 (S2-2) analyzes the owner id to determine to which data processing unit the data to be fetched belongs. In other words, After determining whether the data is stored in a space allocated to a data processing unit in the space of the shared interface buffer unit 200, the data is fetched by using the tail pointer content as an address in the buffering space of the determined data processing unit fetch).

That is, it is known that the data 1011 to be fetched by analyzing the owner id (DP2) among the lines of the head part of the job control unit 400, that is, the circular queue, belongs to the second data processing unit 120. More precisely, it is known that the data 1011 is stored in the spaces (H1 to T1) allocated to the second data processing unit among the spaces of the shared interface buffer unit 200. [

The first data processing unit 100 fetches the data 1011 stored in the address indicated by the tail pointer content in the buffering space H1 to T1 of the second data processing unit 120.

As a result, the data 1011 generated by the second data processing unit 120 is normally transmitted to the first data processing unit 100 without a system failure.

Then, in step 2-2 (S2-2), a destination data processing unit to receive the data is determined using the destination id among the lines of the job control unit 400, that is, the head part of the circular queue. That is, as shown in (b) of FIG. 6, since the destination id is DP4, the received data processing unit is determined as the fourth data processing unit 160.

In step 2-3, the received data processing unit determined in step 2-2 (S2-2) analyzes the owner id to determine to which data processing unit the data to be fetched belongs. In other words, After determining whether the data is stored in a space allocated to a data processing unit in the space of the shared interface buffer unit 200, the data is fetched by using the tail pointer content as an address in the buffering space of the determined data processing unit fetch).

That is, it is known that the data 1011 to be fetched by analyzing the owner id (DP2) among the lines of the head part of the job control unit 400, that is, the circular queue, belongs to the second data processing unit 120. More precisely, it is known that the data 1011 is stored in the spaces (H1 to T1) allocated to the second data processing unit among the spaces of the shared interface buffer unit 200. [

Then, the fourth data processor 160 fetches the data 1011 stored in the buffering space (H1 to T1) of the second data processor 120 at the address indicated by the tail pointer pointer.

As a result, the data 1011 generated by the second data processing unit 120 is normally transmitted to the fourth data processing unit 160 without a system failure.

As described above, according to the present invention, the arbitrary transmission data processing unit stores the data to be transmitted in the address pointed to by the tail pointer of the shared interface buffer means, and simultaneously stores the identifier of the shared interface buffer, the tail pointer, To the job control means. Then, after the job control means stores the transferred information, the received data processing means accesses the data to be transferred by using the transmitted information in a predetermined order, so that a plurality of data processing apparatuses This system eliminates system faults caused by attempting to transmit data to a data processing device, thereby allowing the entire distributed processing system to operate smoothly without errors.

Claims (6)

A plurality of data processing means (100, 120, 140, 160) for functionally and geographically sharing a single task; A shared interface buffer means (200) for allocating a buffer space from a head pointer (read pointer) to a tail pointer (write pointer) to each of the data processing means to provide an interface; A plurality of bus means (300) for connecting the shared interface buffer means (200) to each of the data processing means; And When the transmission data processing means is to transmit data to one or more other received data processing means, an identifier of the transmission data processing means and a tail pointer of a shared interface buffer, And an operation control means (400) for receiving and storing the identifier of the received data processing means and controlling the arrival data processing means to access the data in turn. Job control device. 2. The apparatus as claimed in claim 1, wherein the shared interface buffer means (200) is implemented as a memory having an annular queue structure. The apparatus as claimed in claim 1, wherein the job control means (400) comprises a memory having an annular queue structure. A shared interface buffer means for allocating a buffer space from a head pointer (read pointer) to a tail pointer (write pointer) to each of data processing means, a shared interface buffer means for providing an interface, a plurality of bus means, And transmitting the data to one or a plurality of receiving data processing apparatuses, Wherein the transmission data processing means stores the data to be transmitted in the address pointed to by the tail pointer of the shared interface buffer means and simultaneously transmits the identifier and the tail pointer and information composed of the identifier of the received data processing means to the job control means (S1); < / RTI > And A second step of allowing the reception data processing means to access the data to be transmitted using the transmitted information in a predetermined order after the job control means stores information transmitted in the first step (S1) (S2). ≪ / RTI > 5. The method of claim 4, wherein the first step (S1) A 1-1 step (S1-1) of transferring a request signal to use the shared interface buffer means (200) to the job control means (400); A 1-2 step (S1-2) of the job control unit (400) for transmitting a permission signal according to the received request signal to the transmission data processing unit; A 1-3 step (S1-3) of storing the data to be transmitted by the transmission data processing means which has received the permission signal, at the address indicated by the tail pointer of the shared interface buffer 200; And The transmission data processing means transmits the identifier of the transmission data processing means, the address indicated by the tail pointer of the shared interface buffer 200 in which the data to be transferred is stored, and the identifier of the received data processing unit to the job control unit 400 do. And a fourth step (S1-4). 5. The method of claim 4, wherein the second step (S2) The job control unit 400 forms an identifier of the transmission data processing unit, an address of the tail pointer, and an identifier of the received data processing unit, which are transmitted in the first step S1, as one line, (2-1) (S2-1) of storing in order; A second step (S2-2) of determining a received data processing unit to receive the data using the identifier of the received data processing means; (2-2) of fetching data to be received from the shared interface buffer using the identifier of the transmission data processing means and the address of the tail pointer determined in the step 2-2 (S2-2) (S2-3). ≪ / RTI >