KR100204420B1 - Fabrication method of eeprom device - Google Patents

Abstract

A tunneling oxide film, a floating gate electrode, an interlayer insulating film, and a control gate electrode are sequentially formed on a semiconductor substrate, and a source drain electrode is formed on both substrate portions of the floating gate electrode, the interlayer insulating film, and the control gate electrode. In the step of forming a tunneling oxide film on the semiconductor substrate, the portion of the semiconductor substrate, except for the channel scheduled region, is locally oxidized and the locally oxidized portion is removed to bend between the channel scheduled region and the portion where the local oxide film is removed. After forming the site, a tunneling oxide film is formed.

Description

Manufacturing method of ypyrom element

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electrically erasable programmable readoniy memory (EEPROM) device, and more particularly, to a method for manufacturing an ypyrom device capable of preventing short channel phenomenon in a highly integrated ypyrom.

This pyrom is a memory element that realizes a bit storage state as one transistor and can be electrically programmed and erased, where a flash is an entire memory block or ra during an erase operation of the element. It implies that large blocks are erased at the same time. The program operation of the device uses hot electrons caused by an external high voltage, and erasure uses F-N (fowler-nordheim) tunneling.

Flash memory devices having such characteristics generally have a tunnel oxide film of a thin film on a silicon substrate, a floating gate and a control gate made of polysilicon formed thereon, and a substrate surface exposed from the gate oxide film. Impurities are implanted into the source and drain junctions.

As shown in FIG. 1, in the conventional Y-pyrom, a tunneling oxide film 2 is deposited on the semiconductor substrate 1, the floating gate 3 and the interlayer insulating film 4 are formed on the tunneling oxide film 2, respectively. ) And the control gate 5 are sequentially formed. The source 6 and drain 7 electrodes are formed on the substrates on both sides of the gates by an ion implantation process.

As described above, the operation of the Y-pyrom device having the configuration may be divided into a programming operation and an erase operation. In the programming operation, a high voltage is applied to the control gate 5, and the drain electrode 7 is applied. And substrate 1 are grounded. Then, an electric field is formed so that electrons present in the drain electrode 7 can cross the tunneling oxide film 2 between the channel and the floating gate 3, and charges are collected in the floating gate 3, and then the control gate. When the voltage applied to the electrode 5 is applied to the original state, electrons reaching the floating gate 3 cannot be trapped in the floating gate electrode 3 and come out again, so that the floating gate electrode 3 is negatively charged. do. In this case, in order to form the inversion layer on the ypyrom, since a gate voltage higher than the threshold voltage is required, the ypyrom during the programming operation always maintains a turn-off state.

In contrast, in the erasure operation, a high voltage is applied to the drain electrode, and the control gate electrode 5 and the substrate 1 are grounded, as opposed to the programming operation. Then, in the programming operation, the electrons gathered in the floating gate electrode 3 return the zone to the drain electrode 7 by F-N tunneling, so that the ypyrom element is maintained in the turned on state.

However, in the conventional Y-pyrom device, as the integration of the device progresses, the channel length of the Y-pyrom device is also reduced. Therefore, when the voltage applied to the control gate active is lower than the threshold voltage, the drain depletion region is extended to contact the source electrode. It became. As a result, a problem arises in that a leakage current is generated in the ypyrom device.

Accordingly, the present invention is to solve the above-mentioned conventional problems, while forming a short channel enough to cope with the highly integrated device in the easy pyrom element, and can prevent the punch through phenomenon caused by the short channel. It provides a method for producing a.

1 is a cross-sectional view showing a manufacturing method of a conventional ypyrom device

2A to 2F are cross-sectional views for each manufacturing step for explaining the method for producing ypyrom according to the present invention.

* Explanation of symbols for main parts of the drawings

11: semiconductor organ 12: pad oxide film

13: nitride film 14: local oxide film

15: bending part 16: tunnel oxide film

17 groove part 18 floating gate electrode

19: interlayer insulating film 20: control gate electrode

21: source 22: drain

In order to achieve the above object of the present invention, the present invention is to sequentially form a tunneling oxide film, a floating gate electrode, an interlayer insulating film and a control gate electrode on the semiconductor substrate, and the both sides of the floating gate electrode, interlayer insulating film and control gate electrode In the method for fabricating an ypyrom element in which a source drain electrode is formed at a portion, before the tunneling oxide film is formed on the semiconductor substrate, the portion except for the channel predetermined region of the semiconductor substrate is locally oxidized, and the locally oxidized portion is removed. And forming a bent portion between the channel predetermined region and the portion from which the local oxide film is removed, and then forming a tunneling oxide film.

In this way, the overall channel length is the same as the conventional short channel length, but the substantial channel length is extended by the bent portion, thereby preventing the punch-through phenomenon caused by the short channel phenomenon.

EXAMPLE

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views of respective manufacturing processes for explaining a method of manufacturing an ipyrom according to the present invention. First, as shown in FIG. 2A, a pad oxide film 12 is disposed on a semiconductor substrate 11. ) And the nitride film 13 by the low pressure vapor deposition method are sequentially formed. Subsequently, the nitride film 13 is anisotropically etched to exist only in the channel predetermined region. Here, C in the figure represents the channel length.

As shown in FIG. 2B, the nitride film 13 becomes a growth stop film, and the exposed substrate 11 is field oxidized by a thickness of 3000 to 7000 kPa, so that a local oxide film 14 is formed.

Next, as shown in FIG. 2C, the remaining nitride film 13 and the pad oxide film 12 are wet etched by the phosphoric acid solution and the hydrofluoric acid solution, respectively, and the local oxide film 14 is prevented from ion implantation over the entire structure. And a channel stopper impurity (not shown) is ion implanted.

Thereafter, as shown in FIG. 2D, the LOCOS oxide film 14 is removed by a known wet etching method to form a semiconductor substrate having the bent portion 15. Subsequently, the tunneling oxide layer 16 is formed on the entire structure to have a predetermined thickness, and the tunneling oxide layer 16 is formed in the tunneling region 17 to facilitate tunneling during the programming operation of the ypyrom element. In this case, a mask pattern is formed by a photolithography process in which the tunneling portion 17 is adjacent to the drain electrode, preferably the upper portion of the drain electrode, and the tunneling oxide layer 16 of the portion exposed by the mask pattern is formed. It is underetched and formed so that it may become about 100 micrometers in thickness. Then, a high temperature annealing process is carried out in a nitrogen atmosphere, and the damage due to the under etching process is cured.

Subsequently, as shown in FIG. 2E, the floating silicon electrode 18 for the floating gate electrode 18, the interlayer insulating film 19, and the control silicon polysilicon film 20 are sequentially stacked on the tunneling oxide film 16. . At this time, as the interlayer insulating film 19, an oxide-nitride-oxide (ONO) film or a film made of an oxide film-tantalum oxide film-oxide film having a relatively high dielectric constant is used. Then, the polysilicon film 18 for the floating gate electrode, the interlayer insulating film 19 and the polysilicon film 20 for the control gate are etched to expose the lower tunneling oxide film 16 in the form of a gate electrode. The floating gate electrode 18, the interlayer insulating film 19, and the control gate electrode 20 are formed. In this case, the tunneling oxide layer 16 is left in the ion implantation process for forming a source drain electrode in order to minimize damage to the substrate.

Then, as shown in FIG. 2F, the highly-concentrated impurities for source and drain formation are ion-implanted into the semiconductor substrate 11 and annealed for a predetermined time under a nitrogen atmosphere, so that the source 21 and the drain 22 are formed. An electrode is formed. At this time, the impurity ion implantation for forming the source 21 and drain 22 electrodes is preferably implanted with an ion implantation angle of about 7 to 15 degrees.

As described in detail above, according to the present invention, the portion except the channel portion of the semiconductor substrate is field oxidized, and by removing the field oxidized portion by wet etching, an artificial curved portion is formed, so that the overall channel length is The short channel length is equal to, but the substantial channel length is extended by the bent portion, thereby preventing the punch through phenomenon caused by the short channel phenomenon.

Claims (6)

A tunneling oxide film, a floating gate electrode, an interlayer insulating film, and a control gate electrode are sequentially formed on a semiconductor substrate, and a source drain electrode is formed on both substrate portions of the floating gate electrode, the interlayer insulating film, and the control gate electrode. In the step of forming a tunneling oxide film on the semiconductor substrate, the portion of the semiconductor substrate, except for the channel scheduled region, is locally oxidized and the locally oxidized portion is removed to bend between the channel scheduled region and the portion where the local oxide film is removed. Forming a site, and then forming a tunneling oxide film. The method of claim 1, wherein the local oxide film has a thickness of 3000 to 7000 kPa. The method of claim 1, wherein the tunneling oxide film has a recessed portion on the drain electrode. The ypirom according to claim 3, wherein the recess is formed by forming a mask pattern so that a portion of the tunneling oxide film on the drain electrode is exposed and underetching the tunneling oxide film by about 100 microseconds by the mask pattern. Method of manufacturing the device. The method of claim 1 or 3, wherein after the step of forming the recessed portion in the tunneling oxide film, an annealing process is additionally performed. The method of claim 1, wherein the source and drain electrodes are formed by ion implantation by tilting high-concentration impurities at 7 to 15 °.