KR100200959B1 - Image data control circuit of electrophotographic image forming device - Google Patents

Abstract

1. TECHNICAL FIELD OF THE INVENTION

An image data control circuit to be recorded in an image forming apparatus employing an electrophotographic development system.

2. Technical problem to be solved by the invention

Uniformly adjust the image density and provide optional resolution enhancement.

3. Summary of Solution to Invention

The pulse of data for turning on the light emitting source of the exposure apparatus of the serial video data corresponding to the image to be recorded is applied to the exposure apparatus by varying one of a plurality of preset steps at predetermined distances or at every first rising edge of the pulse.

4. Important uses of the invention

It is used to control recorded image data in a laser beam printer.

Description

Image Data Control Circuit in Electrophotographic Development Image Forming Device

1 shows an image data control circuit according to a preferred embodiment of the present invention.

FIG. 2 is an operation timing diagram of the parallel load serial shift register 14 in the configuration of FIG.

3 is a light emission state diagram and an operation timing diagram of a light emitting source that emits light corresponding to the original image data, and a light emission state diagram and an operation timing diagram of the light emission source according to the image data control circuit.

4 shows an image data control circuit according to another embodiment of the present invention.

5 is a light emitting state light emitting state and an operation timing diagram which emit light corresponding to original image data, and a light emitting state and operating timing diagram of the light emitting source of the second pulse width variable circuit 18 shown in FIG.

* Explanation of symbols for main parts of the drawings

10: controller 12: latch circuit

14 Parallel Load Serial Shift Register 16 Pulse Width Variable Circuit

18: second pulse width variable circuit 20: shift register

22 multiplexer 24 end gate

26: latch circuit 28: selection circuit

The present invention relates to an image forming apparatus employing an electrophotographic development system, and more particularly to a circuit for controlling image data.

In general, an image forming apparatus employing a laser beam printer (hereinafter referred to as LBP), an LED (LI GHT EMITTING DIODE) printer, and an electrophotographic developing method is an image to be recorded by exposing a photosensitive member using a laser beam or LED light. Electrostatic latent image is formed on the photosensitive member. The latent electrostatic image thus formed is developed into a visible image by the developer, and the developer attached to the photosensitive member is transferred to the recording medium and fixed by the developer, thereby recording the image on the recording medium. At this time, in response to each bit of the video data according to the image to be recorded, a light emitting source of an exposure apparatus such as a laser scanner unit (LAESR SCANNER UNIT) or an LED array is turned on / off to perform exposure. Each bit of the video data corresponds one-to-one to each pixel of the recording image. The light emitting source corresponds to a laser diode in the laser scanner unit, and corresponds to each LED in the LED array.

In general, the image forming apparatus employing the electrophotographic developing method as described above is capable of adjusting the density of the recorded image according to the user's selection. At this time, the density of the image recorded on the recording medium is proportional to the amount of developer developed for each pixel, the number of black pixels per unit area, and the like.

As a technique for adjusting the density of an image as described above, there is a method of controlling the light emitting source of the exposure apparatus by dividing the video data bits into the odd and even numbers in the horizontal scanning direction. If the steady state density is selected, the light source is turned on / off normally according to the video data bits. On the other hand, when a light density is selected, for example, the light emitting source is normally turned on / off for the odd-numbered video data bits, but the light emitting source is unconditionally turned off for the even-numbered video data bits. Accordingly, the density of the image can be selected from one of two types. This method has a problem in that image quality is degraded because the actual video data is ignored one bit every two consecutive bits. Especially, when the video data bits are continuously on for at least two or more bits, the image quality is relatively lower, but the image quality is greatly degraded when the odd-numbered video data bits adjacent to the even-numbered video data bits are turned off. This occurred.

As described above, as a technique for adjusting the density of an image, there is a method of controlling the light emission source of the exposure apparatus by dividing the video data of the horizontal scan line into the odd and even numbers in the vertical scanning direction. This method turns on / off the light source normally according to the video data bits if the steady-state concentration is selected, but if the light intensity is selected, for example, for the odd horizontal scan lines, the light source is normally turned on. In contrast to on / off, the light emitting source is unconditionally turned off for the even-numbered horizontal scan lines. Accordingly, the density of the image can be selected from one of two types. However, this method has a problem in that the image quality is still degraded because the actual video data is ignored one horizontal scan line for every two consecutive horizontal scan lines.

In addition, as described above, the prior art has a problem in that the image quality is further deteriorated because more video data bits or horizontal scan lines are ignored as the density of the image is adjusted to a higher level.

As a technique for solving such a problem, there is a patent application No. 95-19483 filed on July 4, 1995 by the applicant of the present application.

The patent application No. 95-19483 is a technique for improving the deterioration of image quality when adjusting the density of a recording image in an image forming apparatus employing an electrophotographic development method. This technique changes the pulse width of a bit for turning on the light emitting source of the exposure apparatus among the serial video data bits corresponding to the image to be recorded in one of a plurality of preset steps and applies it to the exposure apparatus. This effectively changed the pulse width when the signal for turning on the light emitting source of the exposure apparatus appeared alternately. However, when the signal for turning on the light emitting source of the exposure apparatus appears continuously, only the first one dot of the on-signal varies the pulse width due to the delay, and it is impossible to adjust the pulse width for successive on-signals. Therefore, the part where the pulse width cannot be adjusted appears, and the problem that the density control is impossible is raised.

Accordingly, it is an object of the present invention to provide an image data control circuit for uniformly adjusting image density by adjusting pulse widths for successive on signals.

Another object of the present invention is to provide an image data control circuit which uniformly adjusts image density and selectively provides a resolution enhancement function.

The present invention of the image data control circuit in the image forming apparatus employing the electrophotographic development method for achieving the above object, varying the pulse width of the video data of one dot corresponding to the selected density step of the plurality of density steps And a period corresponding to one variable step of the selected pulse width each time video data of one dot for turning on the light emission source by loading the density adjustment selection data in parallel with the control unit for outputting the density adjustment selection data in parallel. It characterized in that it comprises a pulse width variable portion for outputting the shift in the concentration adjustment selection data in series by a clock.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Many specific details are set forth in the following description, the annexed drawings and the like to provide a more general understanding of the invention. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

1 shows an image data control circuit according to a preferred embodiment of the present invention. The image data control circuit includes a controller 10, a latch circuit 12, and a parallel load serial shift register 14. In the following description, the latch circuit 12 and the parallel load serial shift register 18 are collectively referred to. The first pulse width variable portion 18 is called. Here, the controller 10 uses a controller for controlling the image forming apparatus as a whole or uses a separate microcomputer. An operation example of each part will be described in detail with reference to the operation timing diagram of the parallel load serial shift register 14 shown in FIG.

First, in the following description, the time T of the pulse width corresponding to one dot of the input video data is 132 ns and the clock frequency is 60.15 MHz. Then, the clock signal CLK has a period of about 16 ns. The controller 10 generates a density adjustment selection signal corresponding to any one of the plurality of image density steps selectively set. The density adjustment selection signal generated by the controller 10 is applied to the input terminals D0 to D6 of the latch circuit 12. The density adjustment selection signal is output as selection signals QA to QG which are latched and output by the latch circuit 12. The selection signal is applied to the parallel input terminals A to G of the parallel load serial shift register 14. Referring to FIG. 2, the case where the density adjustment selection signal is input to the input terminals A to G of the parallel load serial shift register 14 such as 1110000 (1 for HIGH and 0 for LOW) will be described. . The parallel load serial shift register 14 is load enabled when the input video data of 132 ns, which is a time corresponding to one dot, is on. In FIG. 3, when the video data is on t0, the density adjustment selection signal latched to the input terminals A to G of the parallel load serial shift register 14 is 1110000. And the state of SER is assumed to be 1. When the parallel input serial shift register 14 bitizes the SER and the density adjustment selection signal output by being latched together, it becomes 11110000, which is referred to as a synthesis bit in the following description. The synthesis bit is shifted in the parallel rod series shift register 14 and applied to the exposure apparatus. The total time of the 8-bit composite bit 11110000 has a period of 132 ns corresponding to a dot of input video data. Therefore, each bit of the synthesis bit has a pulse width of 16 ns. That is, the dot of the input video data having a pulse width of 132 ns has been reduced to 68 ns as shown in the above embodiment. The output video data VDout having the reduced pulse width is applied to the light emitting source of the exposure apparatus. Since the pulse width of the signal for turning on the light emitting source is reduced, the time for the light emitting element to emit light is reduced. Therefore, the effect of reducing the density of the image appears. Table 1 shows the pulse width variable state of the output video data VDout according to the data applied to the input terminals A to G of the parallel load serial shift register 14.

The period of one clock used here is set to the width of the number of steps for varying the pulse width of one dot. That is, one clock signal becomes one variable step of the pulse width. Therefore, as shown in Table 1, the pulse width is varied in accordance with the density adjustment selection signal latched to and applied to the input terminals A to G of the parallel load serial shift register 14. As can be seen from Table 1, the pulse width of VDin of 132ns can be varied to 7 pulse widths from 36ns to 132ns, and the density of the image developed corresponding to the variable pulse width is also varied. This has the advantage of providing a concentration step which can be set selectively, and also making the concentration uniform.

4 is an image data control circuit in which the first pulse width variable circuit 16 and the second pulse width variable circuit 18 are combined in another embodiment according to the present invention. It includes a first pulse width variable circuit 16, a second pulse width variable circuit 18, a selection circuit 28, and a controller 10. The embodiment of the image data control circuit implements a circuit that enables resolution enhancement and uniform density control.

The controller 30 uses a controller that controls the image forming apparatus as a whole, or uses a separate microcomputer. The controller 30 provides an output selection signal for selecting the first pulse width variable circuit 16 or the second pulse width variable circuit 18. The pulse width variable circuit selected by the controller 30 is output by varying the pulse width by the controller 30.

If the second pulse width variable circuit 18 is selected by the controller 30, the image data VDin is applied to the shift register 20. By the shift register 20, the image data VDin is delayed and outputted to the output terminals QA to QH. The signals sequentially delayed by the clock are applied to the parallel input terminals 10 to 17 of the multiplexer 22. At this time, a pulse width delay signal corresponding to the pulse width delay output from the controller 30 is sent to the input terminals D0 to D2 of the latch circuit 26, and is latched and output through the latch circuit 26. The latched and output signals are applied to select signal terminals S0 to S2 of the multiplexer 22. One of the signals applied to the parallel input terminals 10 to 17 of the multiplexer 22 is selected by the selection signal applied to the selection signal terminals S0 to S2. The pixel of the image is not developed as long as the selected signal and the QA signal are ANDed at the end gate 24 and delayed by the clock. Therefore, the change in pulse width is shown as the clock is delayed. The signal with the variable pulse width is sent to the first input terminal A of the selection circuit 28. In the controller 30, since the A is enabled in the selection circuit 28, the output terminal Y of the selection circuit 28 is supplied with the output of the second pulse width variable circuit 18 to the exposure apparatus. That is, the light emitting source is turned on by outputting the light source of the exposure apparatus for a variable period of one dot.

An operation example will now be described in detail with reference to the operation timing diagram shown in FIG. 5 and the light emission state of the light emitting device. When the input video data VDin continuously shows black pixels during T0 to T1, the light emitting source is turned on, and the phenomenon is achieved. Then, after the signal for turning off the light emitting source for one bit representing the pixel during T1 to T2, the light emitting source is turned on again when black pixels are continuously displayed after T2. When such image data is applied to the exposure apparatus as it is, the light emitting state of the exposure element is observed. Since an off signal exists between T0 to T1 and the light emitting source on signal after T2, the off signal is caused by interference between signals between the two on signals. There are no white pixels to be displayed in.

However, when the input video data is applied to the second pulse width variable circuit 18, the output video data VDout having a variable pulse width is generated. Looking at the output VDout in detail, the first part of the first on-signal is as described above. Likewise, the pulse width is variable and the TD part is delayed. The second on-signal also appears delayed by the TD at the front. As a result, the delay by the TD of the two on-signals increases the pulse width of the off-signal by the reduced pulse width of the on-signal. Since the off signal corresponds to the white pixel, the expansion of the off signal is emphasized by increasing the size of the white pixel. Therefore, only pulses corresponding to one bit in a continuous black pixel modulate the pulse width, and subsequent black pixels maintain the pulse width as it is. Therefore, the second pulse width variable circuit increases the pulse width of the white pixel represented by one bit to provide an advantage of expressing a white pixel that cannot be represented due to inter-signal interference. This makes it possible to express thin white lines when expressing photographs using an electrophotographic image forming apparatus, thereby increasing the resolution.

If the first pulse width variable circuit 16 is selected, the uniform density adjustment operation described in the operation timing diagram of FIG. 2 is performed. At this time, a signal having a variable pulse width from the output terminal Q0 of the parallel load serial shift register 14 is applied to the selection circuit 28. The controller 30 enables B to the selection circuit 28.

Therefore, the output video data applied from the parallel load serial shift register 14 is output to the output terminal Y through the selection circuit 28. The output signal VDout is applied to the exposure apparatus. Since the output video data applied to the exposure apparatus has a variable pulse width every bit, the density of the image can be uniformly adjusted. An example in which the pulse width is changed every bit will be described with reference to the operation timing diagram and the light emission state diagram of the light emitting device for the first pulse width variable circuit 16 shown in FIG. The input video data VDin is applied to the first pulse width variable circuit. The VDin shows an on-signal during T0 to T1 representing several pixels, and this signal passes through the second pulse width variable circuit and delays the pulse width of TD2 from the pulse corresponding to the first pixel of the on-signal and corresponds to the next pixel. The pulse width also delays the pulse width by TD2. In this way, the pulse width of TD2 is delayed every time the on-bit appears, so it is advantageous to adjust the density of the image in the image that was not continuously controlled because it was a continuous black pixel.

Therefore, as described above, the present invention has the advantage that the density of the image can be uniformly adjusted in a plurality of steps regardless of the form of the video data. In addition, there is an advantage that a combination of an image data control circuit and an image data control circuit for using a resolution enhancement function obtained by emphasizing a white pixel can be selectively provided. Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications can be made without departing from the scope of the present invention. Therefore, the scope of the invention should not be defined by the described embodiments, but should be defined by the equivalents of the claims and the claims.

Claims (3)

In an image data control circuit in an image forming apparatus employing an electrophotographic development system, density adjustment selection data for varying a pulse width of video data of one dot corresponding to a density step selected from a plurality of density steps is output in parallel. The density adjustment selection data by a clock having a period corresponding to one variable step of the selected pulse width each time the video data of one dot for loading the density adjustment selection data and turning on the light emitting source is received. An image data control circuit in an electrophotographic developing method image forming apparatus, comprising: a pulse width variable portion which is shifted in series and outputted. In an image data control circuit in an image forming apparatus employing an electrophotographic development system, density adjustment selection data for varying a pulse width of video data of one dot corresponding to a density step selected from a plurality of density steps is output in parallel. And output a pulse width delay signal for delaying the pulse width of the video data of one dot for a selected time period among a plurality of steps, and at the same time any one of the video data varied according to the pulse width delay signal and the density adjustment selection data. A control unit for outputting an output selection signal for selecting output of video data, and a variable step of the selected pulse width each time video data of one dot for loading the density adjustment selection data and turning on the light emitting source is received; The density adjustment selection data are shifted in series by a clock having a period of A first pulse width variable unit configured to receive the pulse width delay signal, a second pulse width variable unit configured to delay and output video data for turning on a light emitting source of the video data for the selected time period, and the first pulse unit; And a selection circuit for outputting video data to a light emitting source according to the output selection signal among the video data variably received from the variable width section and the second pulse width variable section. Image data control circuit. The method of claim 1, wherein the pulse width variable unit receives the concentration adjustment selection data received from the control unit in parallel, latches and outputs them in parallel, and loads the concentration adjustment selection data to turn on the light emitting source. And a parallel load serial shift register for shifting and outputting the density adjustment selection data in series by the clock whenever video data is received for the video data.