KR100198467B1 - Stand-by processor communication apparatus of atm switching system and communication method using thereof - Google Patents

Abstract

The present invention relates to a standby processor communication apparatus of an ATM exchanger and a communication method using the same, the apparatus provided by the present invention comprises: cell multiplexing and demultiplexing means for multiplexing or demultiplexing a cell transmitted by the switching means; Control means for communicating with the cell multiplexing and demultiplexing means to switch the active standby, and the communication method of the present invention transmits a message as a logical VPI value indicating active or standby in the control means of the message-sending side exchange. And a second step of receiving the message of the first step by the active and standby control means of the message receiving side exchange, and a message received by the control means of the receiving side exchange to determine whether it is active or standby. Consists of a third step to select the source of the message to send It is possible to send a message to an active or standby processor transparently without knowing the shape of the active / standby of the target processor, and to perform the cell multiplexing / demultiplexer and the AAL part of the processor unit without any hardware modification. The advantage is that the newly upgraded program can be loaded onto the standby processor without interrupting the service of the processor.

Description

Standby processor communication device of ATM switch and communication method using same

The present invention relates to a standby processor communication apparatus of an ATM exchanger and a communication method using the same. In a system requiring high reliability, such as an exchanger, a processor is implemented with redundancy for fault tolerance, and one of the processors implemented with redundancy is broken. Even if it detects the condition, the function is transferred to the opposite processor in a short time. As described above, the active processor and the standby processor can be switched at all times, and the active processor and the standby processor must be able to communicate with the processor by dividing the active and standby.

In other words, the active processor communicates with the other processor, and the standby processor can be distinguished from each other by the processor standby communication.

In particular, this functionality is made possible by loading a new program through the standby communication device and switching the current active standby when the processor upgrades the software block with the new function added without interrupting service.

For the processor standby communication as described above, there is conventionally a processor communication bus, and by using this, the source processor sending a message simultaneously transmits a logical address value of active or standby to the active or standby processor at the receiving side. It received the message and accepted the message only.

In this case, since the active and standby of the target processor board can be changed at any time, it becomes a problem if the source processor does not know the active state and the standby state in advance. Even if the current state is known, resource management becomes difficult because the VPI must be converted dynamically according to the active and standby board directions of the board.

Accordingly, an object of the present invention is to provide an apparatus and method for transparently transmitting and receiving a corresponding message to an active standby processor of a target processor without affecting cell traffic of an ATM switch.

1 is a block diagram of an internal ATM cell format used in an ATM switch according to an embodiment of the present invention.

2 is a configuration diagram of a standby processor communication apparatus of an ATM switch according to an embodiment of the present invention;

3 is an internal block diagram for a cell multiplexing and demultiplexing apparatus,

4 is an explanatory diagram for selecting an active or standby processor according to an embodiment of the present invention.

The standby processor communication apparatus of the ATM switch provided in the present invention comprises a cell multiplexing and demultiplexing means for multiplexing or demultiplexing a cell transmitted to the switching means, and communicating with the cell multiplexing and demultiplexing means to switch an active standby. The communication method of the present invention comprises a first step of transmitting a message as a logical VPI value indicating active or standby in the control means of the message sending side exchange, and the active of the message receiving side exchange. And a second step of receiving the message of the first step by the standby control means, and a third step of analyzing the message received by the control means of the receiving side exchange and selecting whether to be active or standby.

As described above, the present invention provides an ATM switch that performs inter-processor communication through a switch. When communicating from a source processor to a target processor, a logical active and standby address may be simply generated without knowing the active and standby states of the actual target processor. In such a manner as to select a target processor, the target processor communicates with each other simply as a logical active, standby address without such state information since the active state and the standby state can always be changed by failure.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 is a configuration diagram of an internal ATM cell format used in an ATM switch according to an embodiment of the present invention, and FIG. 2 is a configuration diagram of a standby processor communication apparatus of an ATM switch according to an embodiment of the present invention. 4 is an internal block diagram of a cell multiplexing and demultiplexing apparatus, and FIG. 4 is an explanatory diagram for selecting an active or standby processor according to an embodiment of the present invention.

Referring to FIG. 1, the switch routing 3 bytes 101 self-routing the ATM internal cell format passing through the ATM switch switch from the source input port to the target output port of the ATM switch, and the ITU standard recommendation 53 byte cell 102 It consists of 56 bytes.

The switch routing 3 bytes 101 for the self-routing are determined according to the switch shape, and a map of the corresponding output port is determined at the input port of the ATM switch, so that the destination port can be reached according to the switch routing 3 bytes. The ITU Standard Recommendation 53 byte cell 102 consists of GFC, VPI, VCI, HEC, CLP, PT, PAYLOAD.

Referring to FIG. 2, the overall structure of an ATM switch is as follows.

First, because the processor of an ATM exchanger sends and receives a message through an ATM switch, the processor changes the message into an ATM cell, and when received, the ATM cell is assembled into a message and received. (ATM Adaptive Layer) There must be a function block to handle the layer.

In particular, this part disassembles the message into the corresponding cell by VPI or VCI, and assembles the cell by VCI and VPI into a complete message.

The ATM switch consists of an ATM switch 201, a cell multiplexer / demultiplexer 202, subscribers 203 connected to the ATM switch 201, and processor boards 204-206.

At this time, the communication between processors disassembles the message into cells, and when receiving, sends and receives the corresponding message by assembling the disassembled cells into messages.

The ATM switch 201 is a device that switches the cell by 3 bytes of switch routing, and transmits the cell from the cell multiplexer / demultiplexer 202 switch to the corresponding processor port by the VPI value.

In addition, the cell multiplexer / demultiplexer 202 includes a VPI table internally, and performs single routing or multi-routing only for a port where a value of the corresponding VPI table is set.

When the message is sent from the source processor to the target processor, when the message is broken into cells, the VCI represents the unique address of the source processor, and the VPI becomes the unique address representing the active / standby of the target processor.

If the source active processor 205 transmits a message to the target standby processor 206, the source processor 205 may include a VCI value indicating a unique address value when the message is decomposed into a cell, and an active value of the target processor. Alternatively, the VPI value identifying the standby and the switch routing 3 bytes for routing to the switch port where the target processor is located are transmitted.

As such, the cells generated in the processor board are transmitted to the ATM switch 201 through the cell multiplexer / demultiplexer 202, and the cells transmitted to the ATM switch 201 are configured by the corresponding target processor by 3 bytes of switch routing. Up to the switch output port. When the cell is received by the cell multiplexer / demultiplexer 202 through the ATM switch 201 output port, the target processor cell is transmitted based on the VPI.

In the present invention, the cell multiplexing / demultiplexing apparatus 202 only needs to know a logical VPI value indicating active or standby without knowing the active or standby state of the target processor which changes from time to time. Both send cells. In this case, the VPI table value of the cell multiplexing / demultiplexing device 202 is a table of active logic ports and standby processor ports simultaneously in the active processor port and the standby processor port in both the active logic value and the standby logic value VPI only for the VPI representing the redundant processor board. Set the table values so that routing takes place.

As such, when the cell multiplexer / demultiplexer 202 sends the active standby without discriminating, the receiving side processor board receives only its own and discards the other party. That is, the processor assembles a cell in the AAL layer, and if the message is not its own VPI, the buffer is emptied and if it is its own, the message is sent to the upper layer.

Therefore, through the above process, the source processor board and the cell multiplexer / demultiplexer can perform communication transparently without knowing the active and standby of the target processor board.

Referring to FIG. 3, the cell multiplexer / demultiplexer 202 sets a bit value to a corresponding VPI value on a VPI table to perform single routing or multirouting to a corresponding port. The active and standby processors are matched. The port value must be set to leave the active cell at the same time, with the active VPI and standby VPI values as the corresponding port, that is, the active / standby port.

First, when the valid ATM cell data 301 enters, the ATM switch matching unit 302 passes the signal through the shift register 303 and refers to the VPI table of the ATM cell 304 to set a preset VPI table ( In step 305, the corresponding bit map is retrieved.

After delaying the predetermined time data in the shift register 303 to obtain information until routing to the desired processor port with reference to the found bitmap 307, each processor port is transmitted through the processor cell transmitter 308. FIG. The information is sent to 309 or 310.

The local processor 306 initializes dual port memory, which is a VPI TABLE 305 when the cell multiplexer / demultiplexer is powered on or reset, and receives a processor for the cell multiplexer / demultiplexer itself. The FIFO 310 receives the message and performs the corresponding function.

Referring to FIG. 4, when the VPI of the active processor board of the target processor is 100 and the VPI of the standby board is 200, a method of communicating with the target standby processor is performed when there is a processor to communicate with the target standby processor. Even if we do not know the active standby state of the current target processor, the same logical value always needs to know only the VPI value, so when generating a message, an ATM cell is generated with VPI = 200.

At this time, since the shift register 402 of the cell demultiplexer does not know the active and standby states of the target processor, both the active VPI = 100 and the standby VPI = 200 of the target processor cause multiple copies of ATM cells to occur in the VPI table 401. Set.

In addition, since the standby processor and the active processor are attached to the first and second of the processor cell transmission unit 403, the D0 and D1 bits of the VPI TABLE are set to '1' and the rest are set to '0'. That is, 11 is set at VPI TABLE 100 and 200 indicating VPI = 100 and 200, and the cell transfer unit 403 copies the ATM cell only to the port in which the table bit value is set to 1.

On the other hand, the cell demultiplexer also transmits a cell to both the active processor and the standby processor for VPI = 100 and VPI = 200. The active processor and the standby processor always know their own state, so if a switchover occurs according to the current active standby state, the corresponding VPI value must be changed. That is, since the VPI = 200, the standby processor reports the message to the higher processor cell transmitter 403 as long as the VPI value of the transmitted message is 200, and discards the message otherwise.

Using the apparatus and method of the present invention as described above, the source processor that sends the message can transparently send the message to the active or standby processor without knowing the shape of the active / standby of the target processor. Therefore, the AAL part of the cell multiplexer / demultiplexer and the processor unit which are already set can be performed without changing hardware modifications, and the newly upgraded program can be loaded onto the standby processor without interrupting service of the redundant processor.

The present invention transmits a message to the active or standby target processor transparently by a VPI value, which is an address value corresponding to a logical active and logical standby value, even though the active and standby states of the target processor to which the message is currently communicating are not known. An object of the present invention is to provide a standby processor communication apparatus of an ATM switch for transmitting a cell and a communication method using the same.

Claims (4)

An ATM switch comprising a switching means, comprising: cell multiplexing and demultiplexing means for multiplexing or demultiplexing a cell transmitted to said switching means, and control means for communicating with said cell multiplexing and demultiplexing means to switch active standby; Standby processor communication apparatus of the ATM switch, characterized in that consisting of. 2. The standby according to claim 1, wherein the control means decomposes a message into cells and transmits the message to the cell multiplexing and demultiplexing means, and assembles and receives a cell of the cell multiplexing and demultiplexing means into a message. Processor communication device. 2. The standby processor of claim 1, wherein the cell multiplexing and demultiplexing means performs single routing or multiple routing only on a port having a value of a corresponding VPI table including a VPI table therein. Communication device. In an ATM exchanger having an active processor control means and a standby processor communication device composed of cell multiplexing and demultiplexing means, in the control means of the message sending side exchange, a message is transmitted as a logical VPI value indicating active or standby. And a second step of receiving the message of the first step by the active and standby control means of the message receiving side exchange, and retransmitting the ATM cell to the active processor and the standby processor, and controlling the receiving side exchange. And a third step of analyzing the message received by the means and selecting whether to be active or standby.