KR100186550B1 - Digital hardware system added voltage auto-switching circuit - Google Patents

Abstract

According to the present invention, a low voltage or high voltage level shift function of a semiconductor circuit is modularized using a CMOS circuit to automatically solve a problem of an interface in a digital hardware system in which a low voltage or a high voltage is mixed. The present invention relates to a digital hardware system to which an additional voltage is added, which is connected to an output terminal of an overvoltage protection unit (11) (12) and an output terminal of the overvoltage protection unit (11) which protects the system by an overvoltage caused by static electricity, and is 5V according to the voltage level of the output pad. Or a voltage divider 13 for uniformly distributing and outputting a voltage of 3 V, a level selector 14 for outputting a high or low level according to the voltage level of the voltage divider 13, and the level selector 14. Switching unit 15 for switching or outputting 3V or 5V according to the signal level of the circuit, and connected to the output terminal of the overvoltage protection unit 12 and The switching unit according to the buffer 18 for recognizing the level of the applied digital signal, the IC core 17 for storing and outputting the digital signal recognized in the buffer 18, the digital signal output from the IC core 17 It is characterized by consisting of a level shifter 16 for level-seeding the output voltage of 3V or 5V of (15) to the pad.

Description

Digital hardware system with voltage automatic switching circuit

1 is a configuration block diagram of a digital hardware system according to the prior art,

2 is a circuit diagram showing an embodiment of a digital hardware system to which the voltage automatic switching circuit is added according to the present invention;

3 is a detailed circuit diagram of the switching unit of FIG.

4 is a voltage characteristic diagram of the Schmitt trigger of FIG.

* Explanation of symbols for main parts of the drawings

10: digital hardware system 11, 12: overvoltage protection unit

13: Voltage divider 14: Level selector

15: switching unit 16: level shifter

17: IC core 18: buffer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital hardware system. In particular, a low voltage or high voltage level shift function is modularized using a CMOS circuit in a semiconductor circuit, so that an interface problem can be easily solved in a low or high voltage mixed digital hardware system. The present invention relates to a digital hardware system with an automatic voltage switching circuit.

Referring to the accompanying drawings, a general digital hardware system according to the prior art is as follows.

1 is a block diagram illustrating a digital hardware system according to the prior art.

First, as shown in FIG. 1, the digital hardware system according to the related art converts 5 V power for 5 V power supply and 5 V power output from the 5 V power supply IC 1 into 3 V power for output. 3V power supply IC (3) using the 3V power shifter (2), 3V power output from the 5V to 3V level shifter (2), and 3V power output from the 3V power supply IC (3) is converted into 5V power supply A 3V to 5V level shifter 4 to output and a 5V power supply IC 5 using a 5V power supply output from the 3V to 5V level shifter 4.

Referring to the operating principle of the digital hardware system according to the prior art configured as described above are as follows.

As shown in FIG. 1, in the case of the IC used in the digital hardware system 6, the 5V power supply ICs 1 and 5 and the 3V power supply IC 3 having the power supply lowered to 3V to reduce power consumption are mixed. It is used.

At this time, when the 5V power supply ICs 1 and 5 and the 3V power supply IC 3 are connected to each other, when the voltage corresponding to logic level high and high is 3V power supply IC 3, the logic level is high. The and low are 3V and 0V, respectively, and in the case of the 5V power supply ICs 1 and 5, the logic level high and low are 5V and 0V, respectively.

Therefore, since the DC voltages of the digital levels are different from each other, a signal cannot be directly transmitted between the 5V power supply ICs 1 and 5 and the 3V power supply IC 3, and the DC voltages between the ICs 1, 3 and 5 cannot be directly transmitted. There must be a level shifter (2, 4) to convert.

In other words, when a signal from the 5V power supply IC 1 to the 3V power supply IC 3 is transmitted, the 5V power output from the 5V power supply IC 1 is converted into a 3V power supply so that the 3V power supply IC 3 A 5V to 3V level shifter 2 is required to be applied.

In addition, when a signal from the 3V power supply IC 3 to the 5V power supply IC 5 is transmitted, a 3V DC voltage output from the 3V power supply IC 3 is converted into a 5V DC voltage to convert the 5V power supply IC (5). 3V to 5V level shifter 4 is required.

In this case, the digital hardware system in which the 3V power supply IC and the 5V power supply IC are mixed according to the related art has to configure a level shifter for converting the voltage of the input / output signal from each IC to match the applied voltage. Due to the complexity of the interface, there is a problem in that it takes a lot of time and hassle for layout and characteristic simulation in each case.

Accordingly, the present invention has been made to solve the above-mentioned problems according to the prior art, the object of the present invention is to provide a circuit module (module) using the CMOS circuit technology to function the 3V to 5V level shifter or 5V to 3V level shifter. When the ASIC (Application Specific IC) is used for the digital hardware system where the 3V power supply IC and the 5V power supply IC are mixed, the internal circuit module eliminates the need for a level shifter externally. The present invention provides a digital hardware system in which a voltage automatic switching circuit is added.

In order to achieve the above object, a digital hardware system having a voltage automatic switching circuit according to the present invention is characterized by an overvoltage protection unit for protecting the system by an overvoltage caused by static electricity, an output terminal connected to an output terminal of the overvoltage protection unit. A voltage divider for uniformly distributing and outputting a voltage of 5 V or 3 V according to the voltage level, a level selector for outputting a high or low level according to the voltage level of the voltage divider, and switching operation according to the signal level of the level selector Or a switching unit for outputting 5 V, a buffer connected to an output terminal of the overvoltage protection unit and recognizing a level of a digital signal applied to an input pad, an IC core for storing and outputting the digital signal recognized in the buffer, and outputting from the IC core. Level-shift the output voltage of 3V or 5V of the switching unit according to the digital signal to the pad It is a point consisting of a level shifter that force.

Hereinafter, a preferred embodiment of a digital hardware system to which a low voltage and high voltage automatic switching circuit according to the present invention is added will be described in detail with reference to the accompanying drawings.

FIG. 2 is a circuit diagram of a digital hardware system to which 3V and 5V automatic switching circuits are added. FIG. 3 is a detailed circuit diagram of a switching part of FIG. 2, and FIG. 4 is a voltage characteristic diagram of a Schmitt trigger of FIG. to be.

First, as shown in FIG. 1, the digital hardware system 10 to which the 3 V and 5 V automatic switching circuits are added is provided with an overvoltage protection unit 11 and 12 that protects the input voltage from overvoltage caused by static electricity. And a voltage divider 13 connected to the overvoltage protection unit 11 and outputting 3V and 5V, respectively, according to the voltage of the output pad of the system 10, and the power supply voltages of the voltage-divided 3V and 5V. Is composed of a level selector 14 which selects and outputs to the switching unit 15.

The switching unit 15 is turned on / off according to the output signal of the level selecting unit 14, and the level shifter 16 level shifts the input voltage according to the switching operation of the switching unit 15 and outputs it.

On the other hand, the buffer 18 provides a predetermined gate signal so that the voltage input to the level shifter 16 can be output as it is.

In addition, the present invention provides a voltage divider 13 for distributing and outputting a 3V or 5V voltage output through the overvoltage protector 11 between the overvoltage protector 11 and the switching unit 15, and the voltage divider. The Schmitt trigger 14 is connected in series so that a change of state (level transition) occurs when the voltage output at 13 exceeds a constant voltage value.

The voltage divider 13 includes an inverter composed of a PMOS transistor MP1 and an NMOS transistor MN1 and diodes D1 and D2 connected in series.

In addition, the switching unit 15 outputs the signal output from the Schmitt trigger of the level selector 14 through the inverters IN1 and IN2, the NMOS transistor MN2 of the switch SW1 and the PMOS transistor of the switch SW2 ( The input signal of the inverter IN1 is applied to the gate of the MP3, and the output signal of the inverter IN1 is applied to the gate terminal of the PMOS transistor MP2 of the switch SW1 and the NMOS transistor MN3 of the switch SW2. .

The operation of the digital hardware system 10 to which the 3V and 5V automatic switching circuits according to the present invention configured as described above is added is as follows.

Prior to the description of the operation of the present invention, a conventional IC is divided into a pad portion and an insulating core portion. The pad portion is divided into an input pad and an output pad.

First, as shown in FIG. 2, the input pad connects diodes D3 and D4 (D5 and D6) to prevent static electricity, respectively, to protect against overvoltage, and buffers 18 to adjust DC signal levels with external ICs. The digital signal is recognized by an inverter having a specific size ratio of the PMOS transistor MP4 and the NMOS transistor MN4 therein.

That is, the digital signal causes the input level to be shifted by inverters having different matching ratios according to 3V or 5V.

At this time, the digital signal passing through the buffer 18 is applied to the IC core 17 and stored, and then output as a digital signal of 3V or 0V.

The digital signal of 3V or 0V respectively output from the IC core 17 is input to the gate signal of the level shifter 16 and the final output signal according to the turn-on operation of the PMOS transistor MP5, MP6 or NMOS transistor MN5. Output 3V or 5V to an external IC.

However, 5V power is applied to the PMOS transistor MP1 of the voltage distribution unit 13 and 3V power is applied to the NMOS transistor MN1 so that the digital signal can recognize 3V or 5V in a circuit.

On the other hand, when the input information (iN) is applied to the information of the IC power source to which the output pad signal is applied, that is, 5V or 3V, the node (1) is represented by 5V if the iN signal is 3V, 3V if 5V.

When the voltage passes through the diodes D1 and D2, the voltage is lowered to 3.6 V and 1.6 V at node ②. The lower voltage is applied to the Schmitt trigger 14 having the voltage transfer characteristic as shown in FIG. do.

At this time, as shown in FIG. 4, Vt is 3.6V or less and Vt is 1.6V or more, using the characteristics of the Schmitt trigger 14 to select 0V, 5V, i.e., low and high level at the node.

In other words, according to the 3V or 5V of the external power source in the level selector 14, it is divided into 0V or 5V at the node ⓐ.

When the divided signal is applied to the switching unit 15 shown in FIG. 2, the phases are inverted through the inverters IN1 and IN2 so that the switches SW1 and SW2 operate on / off.

That is, when the voltage applied to the node is 0 V, the switch SW2 composed of the PMOS transistor MP3 and the NMOS transistor MN3 is turned on, and a power of 3 V appears at the node ⓓ, and when the node is 5 V, the PMOS transistor MP2 and The switch SW1 composed of the NMOS transistor MN2 is turned on so that a 5V power source appears at the node.

As described above, the digital hardware system to which the low and high voltage automatic switching circuits are added according to the present invention recognizes power information (3V or 5V) of the external IC to which the output pad is connected and automatically switches and outputs 5V and 3V. Interface problems are easily solved in digital hardware systems with mixed power ICs.

In addition, in the input pad of the digital hardware system to which the low and high voltage automatic switching circuits are added, the power supply of the protection diode (5V) and the power supply (3V) of the DC level recognition inverter are separated from each other. By choosing different ones, there is no problem when connecting 3V or 5V.

Claims (3)

An overvoltage protection unit (11) (12) for protecting the system by the overvoltage caused by static electricity; A voltage distribution unit (13) connected to an output terminal of the overvoltage protection unit (11), the thrust pad of which divides and outputs a voltage of 5V or 3V according to the voltage level; A level selector 14 for emitting a high or low level according to the voltage level of the voltage divider 13; A switching unit 15 for switching according to the signal level of the level selecting unit 14 and outputting 3V or 5V; A buffer 18 to which the overvoltage protection unit 12 is connected to the thrust stage and recognizing the level of the digital signal applied to the input pad; An IC core 17 for storing and outputting the digital signal recognized in the buffer 18; A voltage shifter circuit comprising a level shifter 16 for level-seeking the output voltage of the 3V or 5V of the switching unit 15 according to the digital signal output from the IC core 17 and outputting it to a pad. Added digital hardware system. The method of claim 1, Between the voltage divider 13 and the level selector 14, a diode D1 (D2) for limiting the level so as to have a voltage ratio low voltage transfer characteristic output through the voltage divider 13 is connected in series. Digital hardware system with a voltage automatic switching circuit. The method of claim 2, The thrust signal of the first inverter IN1 output from the level selector 14 is applied to the gate terminal of the PMOS transistor MP2 of the first switch SW1 and the NMOS transistor MN3 of the second switch SW2. And the output signal of the second inverter IN2 is applied to the gate of the NMOS transistor MN2 of the first switch SW1 and the PMOS transistor MP3 of the second switch SW2. Digital hardware system with switching circuit.