KR0178590B1 - Digital dbs receiver - Google Patents

Abstract

The present invention relates to a digital satellite broadcasting receiver, and the present invention provides an automatic gain control unit (60) for automatically controlling gain so that the output level remains unchanged even if there is a change in the input level; A frequency down part 62 for downgrading the frequency of the intermediate frequency signal carried on the carrier to the baseband signal; A low pass filter unit 64 for passing only the baseband signal to prevent signal overlap in the frequency domain; An A / D converter 66 for converting an analog signal into a digital signal; A QPSK demodulator 68 that QPSK demodulates the QPSK modulated signal again; An FEC decoder 70 for correcting errors occurring in channel transmission; A control signal generator for receiving a control signal from the QPSK demodulator 68 and a signal for a bit error rate (BER) from the FEC decoder 70 to generate a control signal and output the control signal to the automatic gain controller 60 ( 72), according to the present invention, by controlling the size of the input signal using the error rate generated during channel decoding, there is an advantage that the reception performance can be improved.

Description

Digital satellite broadcasting receiver

1 is a block diagram of a digital satellite broadcasting system.

2 is a block diagram of a conventional digital satellite broadcasting receiver.

3 shows inputs for two phase complementary in-phase components and quadrature phase components.

4 is a block diagram of a digital satellite broadcasting receiver according to the present invention.

5 is a soft decision distribution of data and channel noise in a Viterbi decoder.

* Explanation of symbols for main parts of the drawings

60: automatic gain control unit 62: frequency down section

62-1: Local Oscillator 62-2: Phase Shifter

62-3: first mixer 62-4: second mixer

64: low pass filter 64-1: first low pass filter

64-2: second low pass filter 66: A / D converter

66-1: First A / D Converter 66-2: Second A / D Converter

68: QPSK demodulator 70: FEC decoder

72: control signal generator 72-1: mapper

72-2: D / A converter 72-3: amplifier

The present invention relates to a digital satellite broadcast receiver, and more particularly, to a digital satellite broadcast receiver configured to control the size of an input signal to be demodulated by using a bit error rate during channel decoding.

Direct Broadcasting Service (DBS) refers to a broadcasting method that retransmits a broadcast signal through a repeater in space for the purpose of receiving it directly in a general home. This becomes possible and widespread.

Satellite broadcasting cannot be broadcasted locally, requires large-scale investment due to high reliability requirements, and has the disadvantage of radio wave menstruation problems. There is an advantage in that it is possible to reduce the topographic reception disturbance and ghost phenomenon.

FIG. 1 is a block diagram of a digital satellite broadcasting system. The digital satellite broadcasting system is composed of three parts. The transmitter 10 converts a television signal into a digital television signal, compresses it, and transmits it to the satellite. : A satellite repeater (20: Transponder) for receiving and amplifying and retransmitting a signal in space, and a receiver (30: Integrated Receiver Decoder) for receiving and decoding the signal relayed from the satellite.

Here, the transmitter 10 includes a moving picture expert group-2 (MPEG-2) encoder 12, a forward error correction (FEC) encoder 14, a quaternary phase shift keying (QPSK) modulator 16, and a transmission antenna 18. It is composed of

In addition, the receiver 30 includes a receiving antenna 31, a low noise block down converter (LNB) 32, a tuner 34, a QPSK demodulator 36, an FEC decoder 38, and an MPEG-2 decoder 39. do.

The operation of the digital satellite broadcasting system configured as described above is as follows.

The transmitter 10 converts the video, audio, and data signals into digital signals according to the MPEG-2 standard, compresses them, and configures them into packet streams to create one digital television signal stream.

Several digital television signal streams are multiplexed into transport stream packets and then channel encoded.

In this case, the transport stream packet is 188 bytes and the effective data rate is about 34 Mbps.

Channel coding is performed to compensate for errors generated during transmission, and the encoded signal undergoes a modulation process to be transmitted to the satellite.

Transport stream packets are first converted into random data streams during energy dissipation. The 12 GHz band used for the downlink of satellite broadcasting is widely used on the ground, so that it does not interfere with other terrestrial radio communications. You must disperse energy.

Concatenated convolutional coding, Reed-Solomon, and coding are performed to reduce data errors due to noise and interference after being converted into a random data stream, and pulses are reduced to reduce interference between symbols occurring in a transmission channel. Pulse shaping is performed.

The modulation scheme uses QPSK because the power of the satellite repeater is limited so that power efficiency takes precedence over spectrum.

The modulated signal is converted from the up-converter to the Ku-band (14 GHz) and then amplified sufficiently in a high power amplifier (HPA) to be launched to the satellite via the transmit antenna 18.

The satellite repeater 20 receives and amplifies a signal of 14 GHz, converts it to 12 GHz, and retransmits it to the ground.

The retransmitted signal is received by the home receiving antenna 31, amplified by the LNB 32, converted into a 1 GHz signal, and sent to the tuner 34 via a cable.

The signal selected by the tuner 34 is QPSK demodulated, and the demodulated signal is derandomized after the transmission error is recovered in the FEC decoder 38, and then restored to the MPEG-2 transport stream packet, and then the MPEG-2 decoder. At 39, the video, audio and data signals are decoded.

FIG. 2 is a block diagram illustrating a conventional digital satellite broadcasting receiver, wherein the conventional digital satellite broadcasting receiver automatically controls gain so that the output level remains unchanged even if the input level changes. 40); A frequency down part 42 for downgrading the frequency of the intermediate frequency signal carried on the carrier to the baseband signal; A low pass filter 44 for passing only baseband signals to prevent signal overlap in the frequency domain; An A / D converter 46 for converting an analog signal into a digital signal; A QPSK demodulator 48 that QPSK demodulates the QPSK modulated signal again; An FEC decoder 50 for correcting errors occurring in channel transmission; A D / A converter 52 for converting a control signal from the QPSK demodulator 48 into an analog signal; And an amplifier 54 for amplifying the D / A converted signal and outputting the amplified signal to the automatic gain controller 40.

Here, the frequency down section 42 includes a local oscillator 42-1 oscillating to convert a frequency; A phase shifter (42-2) for shifting the signal from the local oscillator (42-1) by 90 ° phase to separate quadrature components from the signal input from the automatic gain control unit (40); A first mixer (42-3) for converting a frequency by mixing a frequency of an in-phase component signal from the automatic gain control unit (40) and a signal input from the local oscillator (42-1); And a second mixer 42 that converts a frequency by mixing a signal of a quadrature phase (Q) component from the automatic gain control unit 40 and a 90 ° phase shifted signal from the phase shifter 42-2. 4) consists of.

In addition, the low pass filter 44 includes: a first low pass filter 44-1 for passing only baseband signals of in-phase (I) components; And a second low pass filter 44-2 that passes only baseband signals of quadrature phase (Q) components.

At this time, the A / D converter 46 includes: a first A / D converter 46-1 for converting an analog signal of in-phase (I) component into a digital signal; And a second A / D converter 46-2 for converting the analog signal of the quadrature phase (Q) component into a digital signal.

The operation of the conventional digital satellite broadcasting receiver configured as described above is as follows.

The digital satellite broadcasting receiver is largely composed of a demodulator and a channel decoder. That is, the demodulator demodulates a signal modulated by QPSK, demodulates a signal of in-phase (I) component and a signal of quadrature phase (Q) component, respectively. It is transmitted to the decoding unit.

The channel decoding unit detects original information data by decoding in the reverse order of error correction encoding so as to correct distortion caused by an error generated during channel transmission using the signal received from the demodulator.

The performance of the channel decoding unit, which plays an important role in the receiving device, depends on the Trellis Coded Modulation (TCM) decoder. In this case, the TCM is a combination of modulation technique and encoding. Compared with the conventional modulation method without encoding, the power gain is significant.

The structure of a TCM consists of a finite state encoder and a non-binary modulation technique. Currently, a four state TCM has about 3dB of power in an environment with white Gaussian noise compared to an uncoded modulation technique. There is a benefit. This coding gain can also be achieved by applying a TCM with more state, a power gain of 6 dB or more. The advantage of TCM is that this power gain is not obtained by reducing the effective information rate as in the case of bandwidth expansion or error correction code.

3 is a diagram illustrating inputs of two-phase complementary in-phase components and quadrature phase components. Viterbi decoding is used to decode the TCM signal. In this case, Viterbi decoding performance is improved. In order to achieve good performance, the middle value of the input signal level must match the middle of the digital modulation level.

In other words, in the conventional method of adjusting the automatic gain control to be mapped to ± 0.5 when the total signal magnitude is 1, the performance of the Viterbi decoder is because the actual incoming digitally modulated input is not mapped exactly to ± 0.5 because of the noise characteristics on the channel. There was an issue that had a bad effect on the.

Accordingly, an object of the present invention is to provide a digital satellite broadcast receiving apparatus that is designed to control the size of an input signal by using a bit error rate generated during channel decoding.

The digital satellite broadcast receiver of the present invention for achieving the above object comprises: an automatic gain control unit for automatically controlling gain so that the output level remains unchanged even if the input level changes; A frequency down part that lowers the frequency of the intermediate frequency signal attenuated by the carrier into a baseband signal; A low pass filter for passing only the baseband signal to prevent signal overlap in the frequency domain; An A / D converter converting an analog signal into a digital signal; A QPSK demodulator to QPSK demodulate the QPSK modulated signal again; An FEC decoder for correcting errors occurring in channel transmission; And a control signal generator for receiving a control signal from the QPSK demodulator and a signal for a bit error rate from the FEC decoder to generate a control signal and output the control signal to the automatic gain controller.

Hereinafter, with reference to the accompanying drawings will be described in detail with respect to the present invention.

4 is a block diagram showing the configuration of a digital satellite broadcast receiver according to the present invention. The digital satellite broadcast receiver according to the present invention automatically controls the gain so that the output level remains unchanged even if the input level changes. An automatic gain control unit 60; A frequency down part 62 for downgrading the frequency of the intermediate frequency signal carried on the carrier to the baseband signal; A low pass filter unit 64 for passing only the baseband signal to prevent signal overlap in the frequency domain; An A / D converter 66 for converting an analog signal into a digital signal; A QPSK demodulator 68 that QPSK demodulates the QPSK modulated signal again; An FEC decoder 70 for correcting errors occurring in channel transmission; Control to generate a control signal by receiving a control signal from the QPSK demodulator 68 and a bit error rate (BER) from the FEC decoder 70 to output to the automatic gain control unit 60 It consists of a signal generator 72.

Here, the frequency downlink section 62 includes a local oscillator 62-1 oscillating to convert a frequency; A phase shifter (62-2) for shifting the signal from the local oscillator (62-1) by 90 ° phase to separate quadrature components from the signal input from the automatic gain control unit (60); A first mixer (62-3) for mixing the in-phase component signal from the automatic gain controller (60) and the frequency of the signal input from the local oscillator (62-1) to convert the frequency; And a second mixer 62 that converts a frequency by mixing a signal of a quadrature phase (Q) component from the automatic gain control unit 60 and a 90 ° phase shifted signal from the phase shifter 62-2. 4) consists of.

Further, the low pass filter unit 64 includes: a first low pass filter 64-1 for passing only baseband signals of in-phase (I) components; And a second low pass filter 64-2 that passes only baseband signals of quadrature phase (Q) components.

In this case, the A / D converter 66 includes: a first A / D converter 66-1 for converting an analog signal of in-phase (I) component into a digital signal; And a second A / D converter 66-2 for converting the analog signal of the quadrature phase (Q) component into a digital signal.

The control signal generator 72 receives and maps a control signal VAGC from the QPSK demodulator 68 and a signal for a bit error rate (BER) from the FEC decoder 70. A mapper 72-1; A D / A converter 72-2 for converting a digital signal from the mapper 72-1 to an analog signal; And an amplifier 72-3 which amplifies the D / A converted signal and outputs the amplified signal to the automatic gain controller 60.

Next, the operation and effects of the present invention configured as described above will be described.

Referring to FIG. 4, the automatic gain controller 60 automatically controls gain in accordance with a control signal from the control signal generator 72 at the rear stage to maintain the output level unchanged even if the input level changes. .

The frequency downlink section 62 lowers the frequency of the intermediate frequency signal carried on the carrier to the baseband signal. The local oscillator 62-1 of the frequency downlink section 62 oscillates to convert to the baseband frequency, and digitally. Since the demodulation system uses two mutually orthogonal waveforms having a phase difference of 90 ° between the two signals, a right angle (in the signal input from the automatic gain control unit 60 in the phase shifter 62-2 of the frequency downward section 62) is used. Q) shift the signal from the local oscillator 62-1 by 90 ° to separate the components, and in the first mixer 62-3, the in-phase from the automatic gain controller 60; The frequency is converted by mixing the signal of the component and the frequency of the signal input from the local oscillator 62-1, and in the second mixer 62-4, the quadrature phase Q component from the automatic gain controller 60 is converted. Signal and the phase shifter The frequencies are converted by mixing the frequencies of the 90 [deg.] Phase shifted signals from (62-2).

In order to prevent signal overlap in the frequency domain, the low pass filter unit 64 passes only the baseband signal. The first low pass filter 64-1 passes only the baseband signal of the in-phase (1) component. The second low pass filter 64-2 passes only baseband signals of quadrature phase (Q) components.

The A / D converter 66 converts an analog signal into a digital signal. The first A / D converter 66-1 converts an analog signal of an in-phase (I) component into a digital signal, and the second A / D converter. In (66-2), the analog signal of the quadrature phase (Q) component is converted into a digital signal.

The QPSK demodulator 68 again QPSK demodulates the QPSK modulated signal. QPSK modulation is a digital communication modulation scheme that has been put to practical use early in communications systems with small antennas and limited output, such as in digital satellite communications, because it is independent of amplitude variations. .

The FEC decoder 70 receives a signal from the QPSK demodulator 68 and corrects distortion due to an error generated during channel transmission. In this case, a TCM decoder constituting a part of the FEC decoder 70 is illustrated. There is a Viterbi decoder (not shown) inside, and the Viterbi decoder has a module for monitoring a bit error rate (BER) for synchronization thereof.

The bit error rate (BER) output of the Viterbi decoder may be used for various purposes, but in the present invention, it is used to control the automatic gain control unit 60.

FIG. 5 is a soft decision distribution diagram for data and channel noise in a Viterbi decoder. In view of the Gaussian characteristic having a noise distribution as shown in FIG. The output error of the Viterbi decoder can be reduced by controlling the magnitude of the input signal using the signal according to the bit error rate.

The control signal generator 72 generates a control signal for controlling the automatic gain controller 60. In the mapper 72-1, the control signal VAGC and the FEC decoder 70 from the QPSK demodulator 68 are generated. Receives and maps a signal with respect to the bit error rate (BER), and the D / A converter 72-2 converts the digital signal from the mapper 72-1 into an analog signal and amplifies the signal 72-. In 3), the D / A converted signal is amplified and output to the automatic gain control unit 60.

As described above, according to the present invention, the reception performance can be improved by controlling the magnitude of the input signal using the error rate generated during channel decoding.

Claims (5)

An automatic gain control unit 60 which automatically controls the gain so that the output level remains unchanged even if there is a change in the input level; A frequency down part 62 for downgrading the frequency of the intermediate frequency signal carried on the carrier to the baseband signal; A low pass filter unit 64 for passing only the baseband signal to prevent signal overlap in the frequency domain; An A / D converter 66 for converting an analog signal into a digital signal; A QPSK demodulator 68 that QPSK demodulates the QPSK modulated signal again; An FEC decoder 70 for correcting errors occurring in channel transmission; The control signal generator 72 receives the control signal from the QPSK demodulator 68 and the signal for the bit error rate from the FEC decoder 70, generates a control signal, and outputs the control signal to the automatic gain controller 60. Digital satellite broadcast receiver configured. A local oscillator (62-1) for oscillating to convert the frequency; A phase shifter (62-2) for shifting the signal from the local oscillator (62-1) by 90 ° phase to separate the quadrature component from the signal input from the automatic gain control unit (60); A first mixer (62-3) for converting a frequency by mixing a signal of an in-phase component from the automatic gain control unit (60) and a signal input from the local oscillator (62-1); And a second mixer 62-4 which converts a frequency by mixing a signal of a quadrature phase component from the automatic gain controller 60 and a 90 ° phase shifted signal from the phase shifter 62-2. Digital satellite broadcast receiving device, characterized in that configured. 2. The apparatus of claim 1, wherein the low pass filter unit (64) comprises: a first low pass filter (64-1) for passing only baseband signals of in-phase components; And a second low pass filter (64-2) for passing only baseband signals of quadrature components. 2. The apparatus of claim 1, wherein the A / D converter 66 comprises: a first A / D converter 66-1 for converting an analog signal of an in-phase component into a digital signal; And a second A / D converter (66-2) for converting an analog signal of a quadrature component into a digital signal. The mapper 72-1 of claim 1, wherein the control signal generator 72 receives and maps a control signal from the QPSK demodulator 68 and a signal for a bit error rate from the FEC decoder 70. Wow; A D / A converter 72-2 for converting a digital signal from the mapper 72-1 to an analog signal; And an amplifying unit (72-3) for amplifying the D / A converted signal and outputting the amplified signal to the automatic gain control unit (60).