KR0177240B1 - Vcd with a function of highlight - Google Patents

Abstract

The present invention relates to a VCD having a highlight function. The present invention relates to an MPEG video decoder (100) for decoding and outputting MPEG video data in accordance with a video synchronization clock, and to preset video intervals of video data provided from the MPEG video decoder (100). Memory 110 for receiving and storing each frame image after receiving and storing each frame at a predetermined horizontal and vertical interval, and video data of the MPEG video decoder 100 in a normal playback mode. In the highlight mode, the multiplexer 120 selects and outputs a plurality of frame video data stored in the memory 110, and outputs a decoding control signal of the MPEG video decoder 100. Controls the video signal reception period of the 110, and controls the selection of the multiplexer 120 130, in the highlight mode, horizontal and vertical addresses are provided for sampling image data of each frame stored in the memory 110 at preset horizontal and vertical intervals, wherein each sampled frame image is a preset position on the screen. An address generator 140 for generating horizontal and vertical addresses in correspondence with the image arrangement order on the screen so as to be arranged on the screen, and counting a horizontal synchronization signal based on a vertical synchronization signal of the video data to a horizontal position on the screen. The first counter 150 for providing the data to the address generator 140, the pel clock is counted based on the vertical synchronization signal of the video data and the data about the horizontal position on the screen. And a second counter 160 that provides data about the address generator 140 to the address generator 140. It shall be.

Description

V-CD with highlights

1 is a schematic configuration diagram showing a general VCD drive device.

2 is a detailed block diagram showing a preferred embodiment of the present invention.

3 is a frame arrangement diagram according to a preferred embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

100: MPEG video decoder 110: memory

120: multiplexer 130,170: microcomputer

140: address generator 150, 160: counter

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a VCD having a high light function for detecting and simultaneously displaying screens corresponding to a particular portion of an image contained in a VCD.

Recently, an MPEG type information recording medium that records audio / video information by using an MPEG (Motion Picture Experts Group) method such as a VCD has attracted attention as a next generation audio / video information recording medium. Based on the standard for moving picture processing proposed in the MPEG standard, video information and audio information are recorded in a compressed state. In the case of the VCD, the amount of reproduction is about 74 minutes on the information recording surface of the 12 cm compact disc.

1 schematically shows a drive of a general VCD.

As shown in FIG. 1, the VCD driving apparatus includes an optical disc 2 in which audio / video information is recorded in an MPEG method, a spindle motor 4 for rotating the optical disc 2 at high speed, and data recorded on the optical disc 2. Servo (6) for controlling the driving of the pick-up device (10), the spindle motor (4) for reading and the output of the laser diode (not shown) installed in the transfer and pick-up device of the pick-up device (10). The entire system according to control key input from a key input unit (not shown) having a plurality of control keys such as amplification unit 12 for amplifying data read by the pickup device 10 and a plurality of power on / off keys. Decode the data from the digital signal processor 14 and the digital signal processor 14, which processes the amplified data from the microcomputer 8, the amplifier 12, which performs the control operation of the signal into a serial data stream, and extracts the data in sector units. MPEG Day CD ROM decoder 18 for separating and outputting control data and control data; MPEG video decoder 20 for decoding and outputting MPEG data from CD ROM decoder 18 in accordance with audio and video synchronization clocks (90 KHz), CD ROM The digital video data decoded by the microcomputer 16 and MPEG video decoder 20 which receives the control data from the decoder 18 and outputs the decoding control signal of the MPEG video decoder 20 based on the control data. A digital-to-analog converter 24 for converting to analog and an RGB encoder 26 for converting and converting the analog-converted video signal into a composite video signal having color signals of R, G, and B are output.

Referring to the operation of the VCD drive device configured as described above is as follows.

First, when the user presses the play key of a key input unit (not shown) while the VCD is mounted on the disc tray, the microcomputer 8 recognizes this and outputs a control signal to the servo unit 6 to output the spindle motor 4. The control of the driving and the pickup of the pickup device 10 and outputs a control signal to the digital signal processor (14). Accordingly, the video data on the disc 2 is read by the pickup device 10 and input to the digital signal processing unit 14 via the amplifying unit 12. In the digital signal processing unit 14, the amplifying unit 12 is used. The data input from is processed into a serial data stream.

The CD-ROM decoder 18 decodes the serial data stream transmitted from the digital signal processor 14 to output control data to the microcomputer 16 and to output MPEG video data to the MPEG video decoder 20. The MPEG video decoder 20 decodes the input MPEG video data according to the audio / video sync clock based on the control data input from the microcomputer 16, and outputs the video signal to the digital / analog converter 24. And the RGB encoder 26 are converted into an analog composite video signal and output.

In the above-described VCD driving apparatus, no apparatus or method for performing a highlight function for detecting and simultaneously displaying screens corresponding to a particular portion of an image included in a VCD has not been proposed.

Accordingly, an object of the present invention is to provide a VCD having a highlight function that enables a simple understanding of the entire plot of an image by detecting and displaying screens corresponding to a particular portion of an image contained in the VCD at one time.

The present invention provides an MPEG video decoder which decodes and outputs MPEG video data in accordance with a video synchronization clock, and receives video data provided from the MPEG video decoder at predetermined cycle intervals, in frame units for each cycle. A memory for sampling and storing each frame image received and stored at preset horizontal and vertical intervals, and selecting and outputting video data of the MPEG video decoder in a normal playback mode, and a plurality of stored in the memory in a highlight mode. A multiplexer for selecting and outputting frame video data, a control unit for outputting a decoding control signal of the MPEG video decoder, controlling a video signal reception period of the memory, controlling a selection of the multiplexer, and stored in the memory in the highlight mode Provide horizontal and vertical addresses for sampling the image data of each frame at preset horizontal and vertical intervals, and horizontally in correspondence with the image arrangement order on the screen so that each sampled frame image can be arranged at a preset position on the screen. And an address generator for generating a vertical address, a first counter for counting a horizontal synchronization signal based on a vertical synchronization signal of the video data, and providing data for a horizontal position on a screen to the address generator; And a second counter that counts the pel clock based on the data on the horizontal position of the vertical synchronization signal and provides data on the vertical position of the screen to the address generator.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2 is a detailed block diagram showing a preferred embodiment of the present invention, which is provided from the MPEG video decoder 100 and the MPEG video decoder 100 that decode and output MPEG data in accordance with an audio and video synchronization clock (90 KHz). The memory 110 receives the signal at predetermined intervals, and receives and stores the frame at each cycle, and selects and outputs the video signal of the MPEG video decoder 100 in the normal playback mode, and in the highlight mode. The multiplexer 120 selects and outputs a plurality of frame video signals stored in the memory 110, outputs a decoding control signal of the MPEG video decoder 100, and controls a video signal reception period of the memory 110. The microcomputer 130 controlling the selection of 120, and in the highlight mode, the image data of each frame stored in the memory 110 in the horizontal and vertical directions Fling provides horizontal and vertical addresses for reducing each frame image, but generates horizontal and vertical addresses corresponding to the image arrangement order on the screen so that each reduced frame image can be arranged at a preset position on the screen. The generating unit 140 counts the horizontal synchronizing signal based on the vertical synchronizing signal of the image, and provides a counter 150 for providing the data about the horizontal position on the screen to the address generating unit 140, the vertical synchronizing signal of the image and the screen. The counter 160 that counts the pel clock based on the data of the horizontal position of the image and provides the data about the vertical position of the screen to the address generator 140, and the microcomputer that controls the counters 150 and 160. It comprises 170 and comprises.

The operation description of the preferred embodiment of the present invention configured as described above is as follows.

First, the MPEG video decoder 100 decodes MPEG data according to audio and video synchronization clocks by decoding control signals provided by the microcomputer 130 and provides them to the multiplexer 120 and the memory 110, respectively.

In the normal playback mode, the multiplexer 120 selects MPEG data output from the MPEG video decoder 100 under the control of the microcomputer 130 and provides it to the analog / digital converter (not shown in the drawing) at the rear end. do.

Meanwhile, the microcomputer 130 controls the video signal provided from the MPEG video decoder 100 to be stored in the memory 110 at predetermined cycle intervals, and is received and stored in frame units for each cycle. For example, in the case of 1 hour VCD, one frame image is stored in the memory 110 at the first start point of the image, and each frame is 20 minutes, 40 minutes, 55 minutes of the image. The image is detected so as to be stored in the memory 110.

For example, when four frame images are stored in the memory 110 and switched to the highlight mode, the microcomputer 170 controls the counter 160 of the counter 150 to be driven.

The counter 150 counts the horizontal synchronizing signal based on the vertical synchronizing signal to the address generator 140 under the control of the microcomputer 170, and the counter 160 each horizontal based on the vertical and horizontal synchronizing signals. A pel clock indicating the pel position on the line is counted and provided to the address generator 140.

The address generator 140 receives the count value counting the horizontal synchronizing signal of the counter 150 and the count value counting the pel clock of the counter 160, and then stores the image data of each frame stored in the memory 110. Provide horizontal and vertical addresses of each frame for sampling in the horizontal and vertical directions, and generate horizontal and vertical addresses corresponding to the image arrangement order on the screen so that each sampled frame image can be arranged at a preset position on the screen. do.

That is, as shown in FIG. 3, when four frame images 200, 220, 220, and 230 are arranged on the top, bottom, left, and right sides of the screen 300, each frame image 200, 210, 220, and 230 must be shrunk, and each frame image ( 200,210,220,230 should specify the position to be arranged on the screen (300).

Therefore, the address generator 140 generates a horizontal address for sampling the horizontal sync lines of the frames 200, 210, 220, and 230 at predetermined intervals using the count value of the horizontal sync signal, and sampled using the count value of the pel clock. A vertical address for sampling the pel on the horizontal sync line at predetermined intervals is generated to reduce each frame image as shown in FIG.

In this case, in order to arrange each of the reduced frame images 200, 210, 220, and 230 as shown in FIG. 3, horizontal and vertical address generation order must be considered.

That is, the frame image 200 and the frame image 210, and the frame image 220 and the frame image 230 are arranged on the same horizontal line, respectively, and the frame image 200 and the frame image 220, and the frame. Since the image 210 and the frame image 230 are each arranged at the same vertical position, the horizontal address corresponding to one horizontal sync line 1 for sampling in the address generator 140 and the position of the pel for sampling. When the vertical addresses corresponding to (j, j + 4, j + 8, ...) are sequentially generated, the memory 110 may determine the horizontal lines (i) corresponding to the horizontal addresses from the frame image 200 and the frame image 210. First, the video data is selected, and the video data corresponding to the vertical address indicating the position (j, j + 4, j + 8, ...) of the sampled pel among the video data on the selected horizontal sync line is selected and then provided to the multiplexer 120. to provide.

In addition, the horizontal address corresponding to the next horizontal synchronization line (i + 4) for sampling in the address generator 140, and the vertical address corresponding to the position (j, j + 4, j + 8 ...) of the pel for sampling Is generated, the memory 110 first selects the video data of the horizontal line i + 4 corresponding to the horizontal address from the frame image 200 and the frame image 210, and is sampled among the video data on the selected horizontal sync line. The video data corresponding to the vertical address indicating the position of the pel (j, j + 4, j + 8 ...) is selected and provided to the multiplexer 120.

As described above, four frame images 200, 210, 220, and 230 are arranged on the screen 300 by generating horizontal and vertical addresses sequentially sampled from the top to the bottom of the screen.

On the other hand, when the microcomputer 130 is switched to the highlight mode, the multiplexer 120 controls the digital data output from the memory 110 to be provided to the digital / analog converter of the next stage through the multiplexer 120.

As described above, the present invention has an effect of briefly understanding the plot of the entire image by detecting and displaying the screens corresponding to a particular part of the image recorded on the VCD at once.

Claims (1)

MPEG video decoder 100 that decodes and outputs MPEG video data according to a video synchronization clock, and receives video data provided from the MPEG video decoder 100 at predetermined intervals, and receives and stores frame by frame at each period. Then, the memory 110 is configured to sample and store each frame image at predetermined horizontal and vertical intervals, and to select and output video data of the MPEG video decoder 100 in a normal playback mode, and to display the memory (in a highlight mode). The multiplexer 120 which selects and outputs a plurality of frame video data stored in 110, outputs a decoding control signal of the MPEG video decoder 100, controls a video signal reception period of the memory 110, and the multiplexing. Control unit 130 for controlling the selection of the unit 120, stored in the memory 110 in the highlight mode Provide horizontal and vertical addresses for sampling the image data of each frame at preset horizontal and vertical intervals, and horizontally in correspondence with the image arrangement order on the screen so that each sampled frame image can be arranged at a preset position on the screen. And a first address generator 140 generating a vertical address and a horizontal sync signal based on the vertical sync signal of the video data, and providing the address generator 140 with data about a horizontal position on the screen. A counter 150 and a second clock for counting a pell clock based on the vertical synchronization signal of the video data and the data on the horizontal position on the screen to provide the address generator 140 with data on the vertical position on the screen; VCD with highlight function with counter 160.