KR0174035B1 - Pixel of thin film transistor liquid crystal display device - Google Patents
Pixel of thin film transistor liquid crystal display device Download PDFInfo
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- KR0174035B1 KR0174035B1 KR1019940031969A KR19940031969A KR0174035B1 KR 0174035 B1 KR0174035 B1 KR 0174035B1 KR 1019940031969 A KR1019940031969 A KR 1019940031969A KR 19940031969 A KR19940031969 A KR 19940031969A KR 0174035 B1 KR0174035 B1 KR 0174035B1
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 25
- 239000010409 thin film Substances 0.000 title claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 239000010453 quartz Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 2
- 239000010408 film Substances 0.000 description 12
- 239000012535 impurity Substances 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- -1 for example Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
Abstract
본 발명은 박막트랜지스터 액정표시장치의 단위화소에 관한 것으로서, 투명기판상에 한방향으로 연장되어있는 게이트라인을 형성하고, 상기 게이트라인과는 다른 방향으로 연장되어진 데이타라인을 형성하며, 상기 게이트라인과 데이타라인이 형성하는 블록내에 화소전극을 형성하고, 상기 화소전극의 주변에 띠형상으로 전하저장전극을 형성하며, 채널이 되는 반도체층 패턴을 게이트전극과 중첩되게 형성하되 상기 전하저장전극과도 중첩되도록 일측을 길게 연장하여 형성하고 상기 반도체층 패턴의 일측을 화소전극과 연결하여 또 하나의 전하저장전극으로 사용하였으므로, 상기 전하저장전극이 차지하는 면적을 감소시킬수 있어 LCD의 개구율이 증가된다.The present invention relates to a unit pixel of a thin film transistor liquid crystal display device, comprising: forming a gate line extending in one direction on a transparent substrate, and forming a data line extending in a direction different from the gate line; A pixel electrode is formed in a block formed by the data line, a charge storage electrode is formed in a band shape around the pixel electrode, and a semiconductor layer pattern serving as a channel overlaps with the gate electrode, but overlaps with the charge storage electrode. Since one side of the semiconductor layer pattern is formed to extend as long as possible, and one side of the semiconductor layer pattern is connected to the pixel electrode and used as another charge storage electrode, the area occupied by the charge storage electrode can be reduced, thereby increasing the aperture ratio of the LCD.
Description
제1도는 본 발명에 따른 박막 트랜지스터 액정표시장치의 단위화소의 레이아웃도.1 is a layout diagram of unit pixels of a thin film transistor liquid crystal display device according to the present invention;
제2도는 제1도에서의 선 A-A에 따른 단면도.2 is a cross-sectional view taken along the line A-A in FIG.
제3도는 본 발명에 따른 박막 트랜지스터 액정표시장치의 단위화소의 등가회로도.3 is an equivalent circuit diagram of a unit pixel of a thin film transistor liquid crystal display device according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 게이트라인 2 : 게이트전극1 gate line 2 gate electrode
3 : 반도체층 4 : 데이타라인3: semiconductor layer 4: data line
5 : 소오스전극 6 : 드레인전극5 source electrode 6 drain electrode
7 : 화소전극 8 : 공통전극7 pixel electrode 8 common electrode
9 : 전하저장전극 10 : 투명기판9 charge storage electrode 10 transparent substrate
11 : 고농도 불순물층 12 : 게이트산화막11 high concentration impurity layer 12 gate oxide film
13 : 제1필드산화막 14 : 제2필드산화막13: first field oxide film 14: second field oxide film
본 발명은 박막 트랜지스터(thin film transistor; 이하 TFT라 칭함) 액정표시장치(Loquid Crystal Display; 이하 LCD라 칭함)의 단위화소(pixel)에 관한 것으로서, 특히 액정에 인가되는 전압을 액정이 구동되는 동안 일정하게 유지시키는 전하저장전극을 화소전극의 주위에 띠형상으로 배치하고 채널이 되는 반도체층 패턴을 전하저장전극의 하부에까지 연장시키고 화소전극과 연결하여 전하저장전극을 두층이 되도록하여 동일한 정전용량을 가지는 화소를 구비하는 LCD의 개구율을 향상시킬 수 있는 TFT LCD의 단위화소에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a unit pixel of a thin film transistor (hereinafter referred to as TFT) liquid crystal display (hereinafter referred to as LCD). A charge storage electrode that is kept constant is arranged around the pixel electrode in a band shape, and the semiconductor layer pattern serving as a channel extends to the lower portion of the charge storage electrode, and connected to the pixel electrode so that the charge storage electrode becomes two layers. The present invention relates to a unit pixel of a TFT LCD capable of improving the aperture ratio of an LCD having pixels.
평판표시장치(flat pannel display)의 일종인 LCD는 액체의 유동성과 결정의 광학적 성질을 겸비하는 액정에 전계를 가하여 광학적 이방성을 변화시키는 장치로서, 종래 음극선관(Cathode Ray Tube)에 비해 소비전력이 낮고, 부피가 작으며, 대형화 및 고정세화가 가능하여 널리 사용되고 있다.LCD, which is a kind of flat pannel display, is a device that changes the optical anisotropy by applying electric field to liquid crystal that combines liquidity and optical properties of crystal, and consumes more power than conventional cathode ray tube. Its low volume, small size, large size and high definition make it widely used.
일반적으로 LCD는 화소전극이 형성되어 스위칭 소자와 연결되어 있는 하측액정기판과 공통전극이 형성되어 있는 상측 액정기판의 사이에 액정이 밀봉되어 있는 형태로 구성된다.In general, LCDs are configured in such a way that liquid crystals are sealed between a lower liquid crystal substrate having pixel electrodes formed therein and connected to a switching element, and an upper liquid crystal substrate having common electrodes formed thereon.
종래 LCD의 제조방법을 살펴보면 다음과 같다.Looking at the manufacturing method of the conventional LCD is as follows.
먼저, 석영재질의 투명기판상에 인듐.틴.옥사이드(indum thin oxide; 이하 ITO라 칭함)로된 화소전극과 투명전극 패턴을 형성하고, 상기 투명전극 패턴의 단락을 방지하기 위한 보호막과 액정을 배열시키기 위한 배향막을 순차적으로 형성한다.First, a pixel electrode made of indium thin oxide (ITO) and a transparent electrode pattern are formed on a transparent substrate made of quartz, and a protective film and a liquid crystal are formed to prevent a short circuit of the transparent electrode pattern. Alignment films for aligning are formed sequentially.
그 다음 상기 배향막에 방향성을 주기 위하여 원통형의 코아에 천이 감겨있는 러빙 롤을 사용하여 러빙을 실시한 후, 보호막과 칼라필터등을 형성하여 하측 액정기판을 완성한다.Then, after rubbing is carried out using a rubbing roll wound around a cylindrical core to give the alignment layer a direction, a protective film, a color filter, and the like are formed to complete the lower liquid crystal substrate.
그후, 공통전극을 갖는 상측 액정기판을 형성한후, 상기 상.하측 액정기판을 일정한 셀갭을 갖도록 스페이서 및 실패턴을 형성하여 봉합시키고, 셀갭에 액정을 주입하고, 밀봉하여 LCD를 완성한다.Thereafter, after forming an upper liquid crystal substrate having a common electrode, the upper and lower liquid crystal substrates are sealed by forming a spacer and a failure turn to have a constant cell gap, injecting liquid crystal into the cell gap, and sealing to complete the LCD.
또한 통상의 LCD는 사용되는 액정의 종류나 구동 방법등에 의해 티.엔(Twisted Nematic), 에스.티.엔(Super Twisted Nematic), 강유전성(Ferroelectric) 및 TFT LCD등으로 구분된다.Conventional LCDs are classified into Twisted Nematic, Super Twisted Nematic, Ferroelectric, TFT LCD, etc., depending on the type of liquid crystal used and the driving method.
여기서 TFT를 화소 동작의 스위칭 소자로 사용하는 TFT LCD는 다른 종류의 LCD에 비해 응답속도가 빠르고, 넓은 시야각을 가지며, 고정세화 및 고화질화가 가능하여 휴대용 TV나 랩탑 PC등에 널리 서용되고 있다.TFT LCDs using TFTs as switching elements for pixel operations have faster response speeds than other types of LCDs, have a wide viewing angle, high definition and high definition, and are widely used in portable TVs and laptop PCs.
상기의 TFT LCD는 화소의 일측에 TFT 소자를 형성하여야하고 소자를 동작시키기 위하여 게이트 버스 및 데이타 버스선을 배치하여야 하며, 액정에 인가되는 전압을 액정이 구동되는 동안 일정하게 유지시키기 위한 전하저장전극을 화소내에 배치하여야하므로 LCD의 개부율이 떨어지는 문제점이 있다.In the TFT LCD, a TFT element must be formed on one side of the pixel, a gate bus and a data bus line must be disposed to operate the element, and a charge storage electrode for maintaining a constant voltage applied to the liquid crystal while the liquid crystal is driven. Has to be disposed in the pixel, there is a problem that the opening ratio of the LCD falls.
특히 비정질 실리콘을 채널로 사용하는 TFT는 다결정실리콘층을 채널로 사용하는 경우 보다 전하 이동도가 떨어지므로 채널폭을 크게 형성하여야 하며, 따라서 개구율은 더욱 나빠진다.In particular, the TFT using amorphous silicon as a channel has a lower charge mobility than the case of using a polysilicon layer as a channel, so that the channel width must be made larger, and thus the aperture ratio becomes worse.
도시되어 있지는 않으나, 종래 TFT LCD의 단위화소에 관하여 살펴보면 다음과 같다.Although not shown, the unit pixels of the conventional TFT LCD are described as follows.
먼저, 투명기판상에 가로 방향으로 연장되는 게이트라인이 형성되어 있으며, 상기게이트라인의 일측이 돌출되어 게이트전극이 된다.First, a gate line extending in a horizontal direction is formed on a transparent substrate, and one side of the gate line protrudes to become a gate electrode.
상기 게이트 전극의 하부에는 TFT의 채널이 되는 반도체층 패턴이 상기 게이트전극과 일정부분이 중첩되는 직사각 형상으로 형성되어 있으며, 상기 게이트라인과 직교하는 세로방향으로 데이타라인이 연장되어 있고, 상기 데이타라인의 일측이 돌출되어 상기 반도체층 패턴의 일측과 접촉되는 소오스전극이 된다.The semiconductor layer pattern, which is a channel of the TFT, is formed in a rectangular shape at a lower portion of the gate electrode, and the data layer extends in a vertical direction perpendicular to the gate line. One side of the protrudes to become a source electrode in contact with one side of the semiconductor layer pattern.
또한 상기 게이트라인과 데이타라인에 의해 형성된 블록의 내부에 투명한 화소전극이 형성되어 있고, 상기 화소전극은 드레인전극에 의해 상기 반도체층 패턴의 타측과 접촉된다.In addition, a transparent pixel electrode is formed in a block formed by the gate line and the data line, and the pixel electrode is in contact with the other side of the semiconductor layer pattern by a drain electrode.
상기 화소전극의 타측에는 액정 구동에 필요한 전하저장전극이 상기 게이트 라인과 평행하게 형성되어 있는 공통전극과 연결되어 있다.On the other side of the pixel electrode, a charge storage electrode for driving the liquid crystal is connected to a common electrode formed in parallel with the gate line.
상기와 같은 전하저장전극은 부가 축전용량 방식과 독립 축전용량 방식이 있는데, 상기 부가 축전용량 방식은 공통전극이 인접한 게이트라인과 연결되는 방식으로서 전하저장전극에 의해 가려지는 화소전극의 면적이 작아 LCD의 개구율을 증가 시키지만 공통전극이 게이트라인과 연결되어 있어 기생용량이 커져 신호지연이 발생되는 문제점이 있다.The charge storage electrode includes an additional capacitance type and an independent capacitance type. The additional capacitance type is a method in which the common electrode is connected to an adjacent gate line, and the area of the pixel electrode covered by the charge storage electrode is small. Although the aperture ratio of is increased, the parasitic capacitance is increased because the common electrode is connected to the gate line, resulting in signal delay.
또한 상기 독립 축적용량 방식은 전하저장전극이 게이트라인과 연결되지 않고, 전하저장전극이 화소전극의 중앙부분에 형성되어 있는 신호지연은 방지할 수 있으나, LCD의 개구율을 떨어뜨리는 문제점이 있다.In addition, the independent storage capacitor method can prevent a signal delay in which the charge storage electrode is not connected to the gate line and the charge storage electrode is formed at the center of the pixel electrode, but has a problem of lowering the aperture ratio of the LCD.
본 발명은 상기와 같은 문제점을 해결하기 위한 것으로서, 본 발명의 목적은 액정이 구동되는 동안 일정 전압을 입가하는 전하저장전극을 화소전극의 주변에 띠형상으로 형성하고, 반도체층 패턴을 전하저장전극의 하부가지 연장하여 화소전극과 연결시켜 별도의 전하저장전극이 되도록하여 전하저장전극의 면적을 감소시켜 LCD의 개구율을 향상시킬 수 있는 TFT LCD의 단위화소를 제공함에 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to form a charge storage electrode in which a constant voltage is applied while the liquid crystal is driven in a band shape around the pixel electrode, and the semiconductor layer pattern is formed as a charge storage electrode. It is to provide a unit pixel of a TFT LCD which can extend the lower branches of the TFT to be connected to the pixel electrode to be a separate charge storage electrode to reduce the area of the charge storage electrode to improve the aperture ratio of the LCD.
상기와 같은 목적을 달성하기 위한, 본 발명에 따른 TFT LCD 단위화소의 특징은 투명기판상에 일정방향으로 연정되어 있는 게이트 라인과, 상기 게이트라인의 일측이 돌출되어 있는 게이트전극과, 상기 게이트라인과는 다른 방향으로 연장되어 있는 데이타라인과, 상기 게이트라인과 데이타라인에 의해 정의되는 블록의 내측에 형성되어 있는 화소전극과, 상기 게이트라인과 평행하게 연장되어 있는 공통전극과, 상기 화소전극의 주변에 띠형상으로 형성되며, 상기 공통전극과 연결되는 전하저장전극과, 상기 게이트전극과 중첩되며, 상기 전하저장전극과 중첩되도록 연장되어 있는 반도체층 패턴과, 상기 데이타라인의 일측에서 돌출되어 상기 반도체층 패턴의 일측과 접촉되는 소오스전극과, 상기 반도체층 패턴의 타측과 접촉되어 화소전극과 연결되는 드레인 전극을 구비함에 있다.In order to achieve the above object, a TFT LCD unit pixel according to the present invention is characterized in that the gate line is connected in a predetermined direction on a transparent substrate, a gate electrode protruding one side of the gate line, and the gate line A data line extending in a direction different from the above, a pixel electrode formed inside the block defined by the gate line and the data line, a common electrode extending in parallel with the gate line, and the pixel electrode. A strip-shaped periphery, a charge storage electrode connected to the common electrode, a semiconductor layer pattern overlapping with the gate electrode and extending to overlap the charge storage electrode, and protrude from one side of the data line. A source electrode in contact with one side of the semiconductor layer pattern and a pixel electrode in contact with the other side of the semiconductor layer pattern Is provided with a drain electrode.
이하, 본 발명에 따른 TFT LCD의 단위화소에 관하여 첨부 도면을 참조하여 상세히 설명한다.Hereinafter, a unit pixel of a TFT LCD according to the present invention will be described in detail with reference to the accompanying drawings.
제1도 및 제2도는 본 발명에 따른 TFT LCD 단위화소의 레이아웃도이다.1 and 2 are layout views of a TFT LCD unit pixel according to the present invention.
먼저, 투명재질, 예를 들어 석영이나 유리로된 투명기판(10)상에 게이트 라인(1)이 가로 방향으로 연장되어 있으며, 상기 게이트라인(1)과는 수직한 방향인 세로 방향으로 데이타라인(4)이 형성되어 있고, 상기 게이트라인(1)과 데이타라인(4)이 형성하는 블록의 내측에는 ITO등의 투명 도전층 패턴으로된 화소전극(7)이 형성되어 있다.First, the gate line 1 extends in the horizontal direction on the transparent substrate 10 made of transparent material, for example, quartz or glass, and the data line in the vertical direction which is perpendicular to the gate line 1. (4) is formed, and inside the block formed by the gate line 1 and the data line 4, a pixel electrode 7 made of a transparent conductive layer pattern such as ITO is formed.
여기서 상기 게이트라인(1)과 게이트전극(2)은 Cr,Ti 또는 Al등의 금속패턴이나 다결정실리콘층으로 형성된다.The gate line 1 and the gate electrode 2 are formed of a metal pattern such as Cr, Ti or Al, or a polycrystalline silicon layer.
또한 상기 게이트라인(1)과 평행하게 공통전극(8)이 형성되어 있으며, 상기 화소전극(7)의 주변에 띠형상으로 전하저장전극(9)과 형성되어 있고, 상기 전하저장전극(9)은 공통전극(8)과 일측이 연결된다. 이 때 상기 전하저장전극(9)은 상기 화소전극(7)과 소정의 폭으로 중첩되어 있다. 여기서 상기 데이타라인(4)과 공통전극(8)은 Ti,Cr 또는 Al등의 금속패턴으로 형성된다.In addition, a common electrode 8 is formed in parallel with the gate line 1, and a charge storage electrode 9 is formed around the pixel electrode 7 in a band shape, and the charge storage electrode 9 is formed. The common electrode 8 is connected to one side. In this case, the charge storage electrode 9 overlaps the pixel electrode 7 with a predetermined width. The data line 4 and the common electrode 8 are formed of a metal pattern such as Ti, Cr or Al.
또한 상기 게이트전극(2)과 일측이 중첩되고, 상기 전하저장전극(9)의 일부와도 타측이 중첩되도록 반도체층(3) 패턴이 형성되어 있다.In addition, a pattern of the semiconductor layer 3 is formed such that one side overlaps the gate electrode 2 and the other side overlaps a part of the charge storage electrode 9.
상기 게이트전극(2)양측의 반도체층(3) 패턴에는 고농도 불순물층(11)이 형성되어 있으며, 일측의 고농도 불순물층(11)은 소오스전극(5)을 통하여 데이타라인(4)과 연결되고, 상기 고농도 불순물층(11)의 타측은 드레인전극(6)을 통하여 화소전극(7)과 연결된다.A high concentration impurity layer 11 is formed in the semiconductor layer 3 pattern on both sides of the gate electrode 2, and the high concentration impurity layer 11 on one side is connected to the data line 4 through the source electrode 5. The other side of the high concentration impurity layer 11 is connected to the pixel electrode 7 through the drain electrode 6.
제2도는 제1도에서의 선 A-A에 따른 단면도로서, 코풀라나형 TFT의 예이다.2 is a cross-sectional view taken along the line A-A in FIG. 1, and is an example of a copula-type TFT.
먼저, 투명기판(10)상에 한방향으로 연장되어진 반도체층(3)패턴이 비정질이나 다결정실리콘으로 형성되어 있으며, 상기 구조의 전표면에 게이트 산화막(12)이 형성되어 있다.First, the semiconductor layer 3 pattern extending in one direction on the transparent substrate 10 is formed of amorphous or polycrystalline silicon, and the gate oxide film 12 is formed on the entire surface of the structure.
상기 반도체층(3)패턴에서 채널로 예정되어 있는 부분 상측의 게이트 산화막(12)상에 게이트전극(2)이 형성되어 있고, 상기 게이트전극(2)양측 하부의 반도체층(3)패턴에는 N 또는 P형 불순물로된 고농도 불순물층(11)이 형성되어 있으며, 상기 반도체층(3)패턴의 연장되어 있는 부분 상측의 게이트산화막(12)상에는 비정질 또는 다결정실리콘으로된 전하저장전극(9)이 형성되어 있다.The gate electrode 2 is formed on the gate oxide film 12 on the upper portion of the semiconductor layer 3, which is supposed to be a channel, and the semiconductor layer 3 pattern on both sides of the gate electrode 2 is N. Alternatively, a high concentration impurity layer 11 formed of a P-type impurity is formed, and a charge storage electrode 9 made of amorphous or polysilicon is formed on the gate oxide film 12 on an upper portion of the semiconductor layer 3 pattern. Formed.
또한 상기 구조의 전표면에 제1필드산화막(13)이 형성되어 있고, 상기 제1필드산화막(13)상에 화소전극(7)이 형성되어 있으며, 상기 화소전극(7)상에 제2필드산화막(14)이 형성되어 있다.In addition, a first field oxide film 13 is formed on the entire surface of the structure, a pixel electrode 7 is formed on the first field oxide film 13, and a second field is formed on the pixel electrode 7. An oxide film 14 is formed.
상기 화소전극(7)은 게이트전극(2)과 전하저장전극(9)의 사이에 형성되어진 드레인전극(6)을 통하여 고농도 불순물층(11)의 일측과 연결되며, 상기 고농도 불순물층(11)의 타측은 소오스전극(5)을 통하여 데이타라인(4)과 연결된다.The pixel electrode 7 is connected to one side of the high concentration impurity layer 11 through the drain electrode 6 formed between the gate electrode 2 and the charge storage electrode 9, and the high concentration impurity layer 11. The other side of is connected to the data line 4 through the source electrode (5).
상기와 같은 본 발명에 따른 TFT LCD의 단위화소는 제3도에 도시되어 있는 바와 같이, TFT(Tr)의 드레인전극(6)에 C1,C2 및 C3 세 개의 캐피시터가 병렬로 연결되어진 형태의 등가회로를 갖는다.As shown in FIG. 3, the unit pixel of the TFT LCD according to the present invention has an equivalent form in which three capacitors C1, C2, and C3 are connected in parallel to the drain electrode 6 of the TFT (Tr). Has a circuit.
여기서 C1은 액정의 캐패시터이고, C2는 전하저장전극(9)의 캐패시터이며 C3는 상기 전하저장전극(9)의 하부로 연장되어진 반도체층(3)패턴에 의한 캐패시터이다.Here, C1 is a capacitor of the liquid crystal, C2 is a capacitor of the charge storage electrode 9 and C3 is a capacitor by the pattern of the semiconductor layer 3 extending below the charge storage electrode 9.
이상에서 설명한 바와 같이, 본 발명에 따른 TFT LCD의 단위화소는 투명기판상에 한방향으로 연장되어 있는 게이트라인을 형성하고, 상기 게이트라인과는 다른 방향으로 연장되어진 데이타리인을 형성하며, 상기 게이트라인과 데이타라인이 형성하는 블록내에 화소전극을 형성하고, 상기 화소전극의 주변에 띠 형상으로 전하저장전극을 형성하며, 채널이 되는 반도체층 패턴을 게이트전극과 중첩되게 형성하되 상기 전하저장전극과도 중첩되도록 일측을 길게 연장하여 형성하고 상기 반도체층 패턴의 일측을 화소전극과 연결하여 또하나의 전하저장전극으로 사용하였으므로, 동일한 정전용량을 가지는 전하저장전극의 구비하는 TFT에서는 전하저장전극이 차지하는 면적으로 감소시킬 수 있어 LCD의 개구율이 증가되는 이점이 있다.As described above, the unit pixel of the TFT LCD according to the present invention forms a gate line extending in one direction on the transparent substrate, forms a data line extending in a direction different from the gate line, and the gate line. And a pixel electrode in a block formed by the data line, a charge storage electrode in a band shape around the pixel electrode, and a semiconductor layer pattern serving as a channel overlapping with the gate electrode. Since one side of the semiconductor layer pattern was formed to be extended to be long, and one side of the semiconductor layer pattern was connected to the pixel electrode and used as another charge storage electrode, the area occupied by the charge storage electrode in the TFT having the charge storage electrode having the same capacitance was used. Since it can be reduced to have the advantage that the aperture ratio of the LCD is increased.
Claims (6)
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