KR0173268B1 - Muting circuit of a monitor - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a muting circuit generator for a monitor, comprising: a current controlled pulse width modulation IC for generating pulses for a switch; a driving circuit for outputting signals of the current controlled pulse width modulation IC; and suitable for mode switching in the driving circuit. A step-down circuit for finding a voltage, a capacitor connected in series between the drive circuit and the step-down circuit, a horizontal output circuit for horizontal output from the step-down circuit, a flyback transformer for generating a high voltage in the horizontal output circuit, And a mute circuit connected between the node of the horizontal oscillation circuit and the node of the flyback transformer to adjust an input impedance to prevent the B + voltage from being excessively instantaneously flowed during the turn-on of the monitor and preventing the horizontal output transistor from being destroyed. have.

Description

Monitor's Muting Circuit

1 is a conventional step-down circuit diagram.

2 is a muting circuit diagram according to the present invention.

* Explanation of symbols for main parts of the drawings

1: Current control pulse width modulation IC 2: Driving circuit

3: step-down circuit 4: horizontal output circuit

5: flyback transformer 10: mute circuit

The present invention relates to a muting circuit of a monitor, and more particularly, to a muting circuit of a monitor for preventing the destruction of a horizontal output transistor due to excessive transient flow of the B + voltage when the monitor is turned on in a step-down circuit for generating a high voltage. .

In recent years, as the demand for multimedia that satisfies various functions with a single computer increases rapidly, not only a computer body but also peripheral devices are being developed to display a still image and a high resolution moving image. Among them, a monitor having various resolution characteristics for displaying information efficiently according to a user's request is widely used.

In general, a monitor is an electron beam whose vertical or horizontal movement path is determined by an electric field, and the monitor stimulates the fluorescent material applied to the display panel, which is one end of the cathode ray (CRT: Cathode-Ray Tube), to the data of the actual user. It is a structure made to recognize the output of the R (Red: red), G (Green: green), B (Blue: blue) signals indicating the color transmitted from the main body is a current characteristic that the electron beam has a specific frequency When moved by the electron beam is carried together with the electron beam to stimulate the corresponding color material on the display panel to provide a clear color screen.

In order to deflect horizontally, especially in the path of movement of the electron beam, a circuit for inducing an electromagnetic field when the electron beam is emitted from one end of the cathode ray tube is required, which is called a horizontal deflection circuit and is implemented on the main board of the monitor. The resolution characteristic is influenced by the frequency characteristic of the current signal output from the horizontal deflection circuit. That is, as the frequency of the output increases, scan lines corresponding to the corresponding frequencies (phenomena caused by the collision of electron beams) are generated on the display panel, so that a clearer screen can be expected. Falls.

However, since the word processor does not actually require high resolution among the tasks performed using the computer, the high resolution is required for the graphic work, and therefore, horizontal signals of various sizes are input from the computer main body to the monitor screen controller as needed. This will adjust the resolution of your monitor.

Changing the frequency of the horizontal deflection signal output by the horizontal signal is called mode conversion, and one monitor is designed to automatically change the mode depending on whether it is performing word processing or graphic work. Therefore, at least 20 Hz to 86 Hz can be compatible depending on the characteristics of each signal.

However, in the case of realizing a mode of various frequency bands with a single monitor, it is difficult to obtain a constant output regardless of the mode conversion in the output amplifier stage because the operating voltage is different for each mode.

1 is a conventional step-down circuit diagram, in which the horizontal synchronization signal H. SYMC is a square wave which is a pulse for switching which is the basis of horizontal deflection and high voltage generation in the current control pulse width modulation IC 1, and the driving circuit 2 Is applied to. The square wave signal output from the driving circuit 2 is applied to the gate of the transistor Q1. The transistor Q1 repeatedly turns on and off to generate a B + voltage. When the transistor Q2 is operated by the B + voltage, a VC voltage, which is a feedback voltage (25-30V), is generated, and an ON DUTY of the current control pulse width modulation IC is generated by VC ', which is another feedback voltage (2.5V). ) Is determined and B + is determined by the on duty. Because the VC voltage is low when the monitor is turned on, the current-controlled pulse demodulation IC sends a duty that is wider than the duty of the defined B +, so that the horizontal output transistor Q2 is out of the voltage range and the horizontal output transistor is destroyed. There is a problem.

The present invention aims to protect the horizontal output transistor by reducing the on-duty of the step-down circuit using a mute circuit to solve the above problems.

The present invention provides a current control pulse width modulation IC for generating a pulse for a switch to achieve the above object, a drive circuit for outputting a signal of the current control pulse width modulation IC, and the step of finding a voltage suitable for mode conversion in the drive circuit; A capacitor connected in series between the down circuit, the drive circuit and the step-down circuit, a horizontal output circuit for horizontal output from the step-down circuit, a flyback transformer for generating a high voltage in the horizontal output circuit, and the horizontal oscillation And a mute circuit connected between the node of the circuit and the node of the flyback transformer to adjust the input impedance.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a muting circuit diagram according to the present invention, comprising: a current controlled pulse width modulation IC 1 for generating a pulse for a switch; a driving circuit 2 for outputting a signal of the current controlled pulse width modulation IC; A step-down circuit (3) for finding a voltage suitable for mode conversion, a capacitor (C3) connected in series between the drive circuit and the step-down circuit, a horizontal output circuit (4) for horizontal output from the step-down circuit, A flyback transformer 5 generating a high voltage in the horizontal output circuit and a mute circuit 10 connected between a node of the current control pulse width modulation IC and a node of a flyback transformer to adjust an input impedance are shown. The mute circuit 10 includes a resistor R6 connected between a node VC and a node VC 'of a flyback transformer 5, and a voltage divider connected between the node VC' and a ground voltage terminal. A transistor Q3 connected to a connection node of the resistor R4 and a resistor R5, a collector end of which is connected to a connection node of the resistor R5, and the transistor Q3; A resistor R3 connected between the base end of the node and the node VC ', a mute connected at one node to the base end of the transistor Q3, and a resistor connected to the base end of the mute and the transistor Q3. R6).

In detail, when the monitor is turned on, when the composite video signal is transmitted from the computer main body to display the information on the screen, the vertical and horizontal synchronization signals are separated, and the separated signals are separated from the microprocessor by the logic signal for a predetermined time. Appears as a status. At this time, the transistor Q3 is turned off by the resistors R3 and R6, and the voltage of VC 'is momentarily larger than the voltage that is originally set, thereby reducing the ON DUTY of the step-down, and thus the conduction time of the transistor Q1. Will be reduced. Since the output voltage of the VC 'becomes VC' = (R4 + R5) / (R2 + R4 + R5) * VC and the voltage of B + is lower than the original voltage, the output voltage of the VC 'does not reach the voltage range of the horizontal output transistor. It is possible to protect the horizontal output transistors when turned on. After a certain period of time, the transistor q3 is turned on so that the output voltage of VC 'is VC' = (R5) / (R2 + R5) * VC to obtain the original desired voltage B +. In this case, the voltage B + is determined by the resistors R2, R4, and R5 and the transistor Q3.

The present invention can prevent the B + voltage from flowing excessively momentarily during the turn-on of the monitor and destroying the horizontal output transistor.

Claims (1)

A current control pulse width modulation IC for generating a pulse for a switch, a drive circuit for outputting a signal of the current control pulse width modulation IC, a step-down circuit for finding a voltage suitable for mode conversion in the drive circuit, the drive circuit and a step A step-down circuit comprising a capacitor connected in series between a down circuit, a horizontal output circuit for transmitting the output of the step-down circuit to a secondary side, and a flyback transformer for generating a high voltage in the horizontal output circuit. A resistor R6 connected between the node of the control pulse width modulation IC and the node of the flyback transformer and connected between the node VC and the node VC 'of the flyback transformer, and the node VC' and ground. A voltage divider connected between the voltage terminals R4 and R5, a collector terminal connected to the resistor R4 and a connection node of the resistor R5, and an emitter terminal connected to the connection node of the resistor R5. JIS Q3, a resistor R3 connected between the base terminal of the transistor Q3 and the node VC ', a mute of one node connected to the base terminal of the transistor Q3, the mute and the transistor ( And a muting circuit composed of a resistor (R6) connected to the base end of Q3).