KR0169909B1 - Method for designing assembly code generator for target processor - Google Patents

Abstract

An object of the present invention is to more easily implement a postprocessor of a compiler by providing a method of writing a code generator.

The present invention creates a transcoding rule table, generates a transcoding rule program with a generator that generates a code generator using the transcoding rule table, writes a program dependent on the target processor, and a program independent of the target processor. We then write a code conversion rule program, a program independent of the target processor, and a program dependent on the target processor, to complete the assembly code generator for the target processor.

Description

How to write an assembly code generator for a target processor

The present invention relates to a method for writing an assembly code generator for a target processor, and more particularly, to create a code conversion rule table and a part related to a target processor, which are core parts of a generator that receives an intermediate code as input and generates assembly code for a target processor. It is about a method.

In general, the compiler's structure is intended to examine the grammar for each high-level programming language provided, and to parse the semantics to produce object files in assembly or machine language.

This structure has a difficulty in developing (N × M) compilers in order to run N programming languages on a computer with different M processors.

In order to solve the above problems, the compiler was developed by dividing the compiler into a front-end and a back-end.

The prefix handler examines the syntax and semantics of high-level programming languages such as C and CHILL to generate intermediate code.

The postprocessor takes the intermediate code as input and processes the part related to the processor to generate assembly code for the target processor.

The code generator is an important part of the post-processor, and the assembly instructions, assembly pseudo-instructions, register definitions, and call / return and source functions associated with programs and target processors that can be commonly handled by all code generators, regardless of the target processor. (source) It consists of a program that processes line information of a file.

Content related to target processor is C program file which handles contents related to transcoding rule table and assembly pseudo-instruction, function call / return, line information of source file, etc. related to register, addressing mode, assembly instruction. Consists of.

Thus, the code generator for the target processor only needs to create a transcoding rule table and a C program file that handles content that is difficult to describe in this table.

The compiler developed in this way becomes very easy to retarget for translating high-level programming languages into assembly code.

However, in the related art, the potential processing method of the potential processor has been specifically realized, but there has been a problem that the method of writing the assembly code generator for the target processor has not been specifically realized.

An object of the present invention for solving the above problems is to provide a method of writing a code generator to more easily implement a post-processor of the compiler.

1 is a hardware configuration to which the present invention is applied.

2 is a diagram showing the configuration of a compiler postprocessor created by applying the present invention.

3 is a flowchart illustrating a method of writing an assembly code generator for a target processor according to the present invention.

* Explanation of symbols for main parts of the drawings

1: central processing unit 2: main memory

3: auxiliary memory device 4: input / output device

11: intermediate code encryptor 12: intermediate code optimizer

13: Assembly Code Generator 14: Optimization Rule Table

15: Transcoding Rule Table

In order to achieve the above object, a feature of the present invention is to create a transcoding rule table, to generate a transcoding rule program with a generator that generates a code generator using the transcoding rule table, and independent of the target processor. The assembly code generator for the target processor is generated by compiling a program dependent on the program and the target processor, a program independent of the target processor, and a code conversion rule program and a program dependent on the target processor. It consists of a stage of completion.

1 is a hardware block diagram to which the present invention is applied.

Referring to FIG. 1, the configuration of hardware to which the present invention is applied will be briefly described.

This is a system in which the general-purpose operating system is mounted on a general-purpose computer in which the central processing unit 1, the main memory 2, the auxiliary memory unit 3, and the input / output unit 4 are connected to each other by a system bus.

The code generator program of the postprocessor of the compiler is mounted in the main memory (2) of the host system and executed in the central processing unit (1). This is done via the system bus.

General-purpose operating systems control programs and devices.

In addition, the auxiliary memory device 3 stores source files, intermediate code files, and data files written in a high-level language for generating assembly code for a target processor, and are stored as files and tools that are not mounted in the main memory 2. .

2 is a diagram showing the configuration of a compiler postprocessor created by applying the present invention.

Referring to FIG. 2, the configuration of a compiler postprocessor created by applying the present invention will be described below.

When the compiler prefix processor generates the EM intermediate code, the intermediate code encoder 11 receives the EM intermediate code, converts the EM intermediate code into a compact intermediate code, and outputs the converted intermediate code.

This simplifies the postprocessing process.

The intermediate code optimizer 12 outputs the optimized intermediate code by optimizing the simple intermediate code thus output according to the optimization rule table 14.

The optimization rules table 14 describes the optimization rules.

The assembly code generator 13 converts the optimized intermediate code thus output according to the assembly code conversion rule table 15 to finally generate the assembly code.

The assembly code conversion rule table 15 describes rules for converting to intermediate code assembly code.

The configuration of the intermediate code encryptor 11 and the intermediate code optimizer 12 is independent of the high-level programming language that is the input of the compiler and the type of assembly code of the corresponding processor to be generated.

Thus, the processes of the intermediate code encryptor 11 and the intermediate code optimizer 12 are used as processes commonly applied to all compilers.

Therefore, the postprocessor generating the assembly code of the processor from the EM intermediate code only needs to write the assembly code generator 13 separately.

Hereinafter, with reference to the accompanying drawings will be described in detail one of the preferred embodiments according to the present invention.

3 is a flowchart illustrating a method of writing an assembly code generator for a target processor according to the present invention.

A method of writing an assembly code generator for a target processor according to the present invention will be described with reference to FIG.

The assembly code generator for the target processor is composed of a code conversion rule program, a program independent of the target processor, and a program dependent on the target processor.

The transcoding rule program is a C program in which a table describing transcoding rules is converted by a generator forming a code generator.

A program that is dependent on the target processor is a program whose contents are difficult to describe in the transcoding rule table.

A program that is independent of the target processor describes contents that can be handled by all code generators regardless of the target processor.

In this section, calculation of the formula using the code conversion rule table and the information provided from the program dependent on the target processor, intermediate code pseudo-instruction processing, symbol processing, pattern checking of intermediate code, register management, input / output file processing, and optional processing are performed. do.

Compiling these code conversion rule programs and programs independent of the target processor and programs dependent on the target processor together creates an assembly code generator for the target processor.

First, you need to create a transcoding rules table and then write a program that depends on the target processor.

Processes S1 through S4 create a code conversion rule table, and processes S6 through S9 create a program dependent on the target processor.

In S1, the contents related to the registers defined in the assembly language of the target processor are described in a table.

S2 describes the definition of the operand addressing mode of the assembly instructions for the target processor.

Here, register definition and addressing mode are used together to check whether there is a code generation rule that is stored in the virtual stack during code conversion and matches the input intermediate code.

S3 describes the code generation rules for converting intermediate code to assembly code for the target processor using register definitions and addressing mode definitions.

S4 converts the contents of the virtual stack into a pattern that matches the code generation rule when there is no rule in the intermediate code and the register definition or addressing mode stored in the virtual stack that matches the content defined in the code generation rule. Complete the transcoding rules table by defining a rule that

In S5, a code conversion rule program is generated by a generator that generates a code generator using the code conversion rule table completed in the process of S1 to S4.

In S6, you write a rule that translates intermediate code pseudo-instructions into assembly cloth instructions.

In S7, the contents of the generation and destruction of the stack frame to be processed when the function is called and when the function returns from the called function are written.

In S8, you write rules to convert intermediate code data types to data types defined in assembly language.

In S9, the algorithm that describes the information of the corresponding line of the source file in front of the assembly code is written so that the generated assembly code can be easily read.

In S10, the creation of a program independent of the target processor is completed.

In S11, an assembly code generator for the target processor is created by compiling a code conversion rule program, a program independent of the target processor, and a program dependent on the target processor.

Therefore, the present invention as described above provides a method of writing a code generator using a code conversion rule table and a program related to a target processor, thereby facilitating the implementation of the compiler postprocessor so that the compiler can be divided into two parts: the preprocessor and the postprocessor. The effect is that it is easier to implement separately.

Claims (4)

Creating a transcoding rule table; creating a transcoding rule program with a generator that generates a code generator using the transcoding rule table; Creating a program dependent on the target processor, creating a program independent of the target processor; And compiling the code conversion rule program and the program independent of the target processor and the program dependent on the target processor to complete the assembly code generator for the target processor. Way. 2. The method of claim 1, wherein creating a transcoding rule table comprises: describing in a table contents relating to a register defined in an assembly language of a target processor; Describing a definition for the operand addressing mode of the assembly instruction for the target processor; Describing a code generation rule for converting intermediate code to assembly code for a target processor using register definitions and addressing mode definitions; When the code is converted, the contents of the virtual stack are forcibly converted into a pattern matching the code generation rule when there is no rule that matches the content defined in the code generation rule among the register definition or addressing mode stored in the intermediate code and the virtual stack. A method of writing an assembly code generator for a target processor, comprising: defining a rule to complete a transcoding rule table. 3. The assembly code of claim 2, wherein the register definition and the addressing mode are stored in the virtual stack at the time of code conversion and used together when checking whether there is a code generation rule that matches the input intermediate code. How to write a generator. The stack of claim 1, wherein the programming step dependent on the target processor comprises: writing rules for converting intermediate code pseudo-instructions into assembly pseudo-instructions, stacking when calling a function and returning from the calling function. Writing content about creation and destruction of a frame; Writing a rule for converting the data type of the intermediate code to the data type defined in the assembly language; And writing an algorithm describing information of a corresponding line of a source file in front of the assembly code so that the generated assembly code can be easily read, and completing writing a program dependent on the target processor. How to write an assembly code generator.