KR0167903B1 - Data detecting circuit - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data extraction circuit, and in particular, data storage means for outputting inverted previous data by latching previous data in response to a bit clock: determining whether the level of the input analog signal belongs to one of three levels. Level discrimination means for generating a signal: in response to the discrimination signal, the first data is output in the case of the first level, the second data is output in the case of the third level, and the data storage means in the second level. And output means for outputting the inverted previous data provided from.

In the present invention, by slicing the analog subscriber service data in three steps and determining the digital value, the number of erroneous sample values is reduced, thereby minimizing an error when restoring to the digital subscriber service data.

Description

Data extraction circuit

1 is a circuit diagram of one preferred embodiment of a data extraction circuit according to the present invention.

FIG. 2 is a timing diagram showing first and second reference values for determining a signal and a level input through the input terminal shown in FIG.

The present invention relates to a data extraction circuit, and more particularly, to a subscriber service data extraction circuit for restoring original digital data from subscriber service data received by a television receiver.

The subscriber service data is data for providing a specific service to a subscriber such as teletext or caption.

These data signals are inserted into the video signal of the television and transmitted. The television video signal is originally an analog signal and has a vertical blanking interval (VBI) without a video signal. In order to insert the digital subscriber service data in the vertical blanking period, the subscriber service data must first be converted into an analog form.

On the other hand, the television receiver on the subscriber side inputs an analog video signal transmitted over the air, extracts and restores subscriber service data, and for this purpose, the analogue signal inserted in the vertical blanking section is restored to digital form. do. As a conversion method to such a digital form, a slicing technique is widely used.

Conventional slicing apparatus for restoring data for digital subscriber service simply slicing analog type subscriber service data to a predetermined threshold level, the portion below the threshold level is digital data of low level and the portion above the predetermined threshold level to high level. We used a binary slicing method to sample and recover subscriber analog signals in digital form. Therefore, when the video signal transmitted over the air waves is rolled off at a high frequency (where a signal that continues at a high level suddenly transitions to a low level and then transitions to a high level again), when the video signal is a high frequency, a low level There is a problem that is not detected properly, and this phenomenon is called roll-off) or when there is a characteristic such as a group delay, the data extraction circuit for subscriber service implemented with a simple comparator may obtain an incorrect sample value. There is a problem.

That is, if the video signal has a high frequency roll-off or group delay, two or more consecutive '1's do not bring the next' 0 'to the slicing level. Similarly, two or more consecutive '0's do not reach the slicing level of the following' 1 ', thereby obtaining a wrong sample value.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data extraction circuit for restoring subscriber service data by three-step slicing in order to prevent incorrect data restoration by binary slicing in order to solve the conventional problems as described above.

In order to achieve the above object, the data extraction circuit of the present invention is a data extraction circuit for extracting digital data from a received analog signal, comprising: data storage means for latching previous data in response to a bit clock and outputting inverted previous data: Level discrimination means for generating a discrimination signal by determining where the level of the input analog signal belongs to the level of the three levels: when the level is one level in response to the discrimination signal, the first data is output and when the level is three levels And output means for outputting second data, and outputting the inverted previous data provided from the data storage means in the case of the second level level.

The data storage means includes a D flip-flop for outputting the output means and clocking a bit clock: an inverter for inverting the output of the D flip-flop and outputting inverted previous data.

The level discriminating means compares a first reference value with the input analog signal to generate a first discriminating signal for discriminating whether the level of the analog signal is a first step or a second step: and a second reference value and the And a second comparator for comparing the input analog signals to generate a second discrimination signal for determining whether the level of the analog signal is a second stage or a third stage.

The output means includes a first gate for inputting and logically multiplying the inverted previous data and the first discriminant signal; and a second gate for inputting and ORing the output of the first gate and the second discriminant signal.

Also, the present invention converts subscriber service data transmitted with a television signal into a digital form using a slicing technique while being inserted in analog form in a vertical blanking section without a television video signal, thereby providing digital subscriber service data. The subscriber service data extracting circuit according to the present invention for restoring a first service comprises: first comparing means for comparing whether the subscriber service data of the analog type is greater than a first slicing level less than a predetermined threshold level, and the subscriber service of the analog type; A second comparison means for comparing whether the usage data is greater than the second slicing level larger than the predetermined threshold level, the output of the second comparison means, and the logical AND signal to be output as the digital subscriber service data. And the output of the logical sum, the analog type A storage means for outputting the stored signal in response to a bit clock synchronized with the subscriber service data of s, and an inverted value of the signal output from the storage means and the output of the first comparing means are output as the logical product signal. It is preferably composed of logical product.

Hereinafter, with reference to the accompanying drawings, the configuration and operation of the subscriber service data extraction circuit according to the present invention will be described as follows.

1 shows a preferred embodiment of a data extraction circuit for subscriber service according to the present invention. The circuit of FIG. 1 determines data storage means 2 for outputting inverted previous data by latching previous data in response to a bit clock, and determining whether the level of the input analog signal IN belongs to one of three levels. The level discrimination means 4 for generating the discrimination signal, and in response to the discrimination signal, the first data, i.e., "0", is output in the case of the first level, and the second data, "1", in the case of the third level. Output means 6 and output means 6 for outputting the inverted previous data provided from the data storage means 2 in the case of a two-level level.

More specifically, the first comparator 10 comparing the subscriber service data IN in the analog form greater than the first slicing level SL1 smaller than the predetermined threshold level Vth and the analog form The second comparator 20 comparing the subscriber service data greater than the second slicing level SL2 larger than the predetermined threshold level, the outputs of the second comparator 20, and the AND product, A D flip-flop which stores a logic sum gate 30 for outputting the data for the subscriber service, and a storage portion for storing the output of the logic sum gate and outputting a stored signal in response to a bit clock synchronized with the subscriber service data in analog form ( 40 and an AND gate 6 for performing an AND operation on the inverted value of the signal output from the D flip-flop 40 (output of the inverter 50) and the output of the first comparator 10 to output as an AND signal. 0).

FIG. 2 is a timing diagram of signals input through the input terminal IN shown in FIG. 1, and the vertical axis represents voltage level and the horizontal axis represents sampling time by a bit clock.

If the sampling times of the bit clock input to the clock terminal of the D flip-flop 40 shown in FIG. 1 are t0, t1, t2 and t3, binary slicing comparing each sampling value with a predetermined threshold value Vth In the case of binary slicing, you get sampling values of 1, 1, 1, and 0, respectively. This is due to a continuous delay of '1', and this phenomenon can be eliminated by using three-level slicing according to the present invention.

First, slicing in three stages means slicing analog subscriber service data input through the input terminal IN shown in FIG. 1 to three levels. That is, the video data is sliced into three levels: the first slicing level SL1 smaller than the predetermined threshold value Vth, the second slicing level SL2 larger than the predetermined threshold value, and the predetermined threshold value.

The second comparator 20 shown in FIG. 1 outputs a high level signal when the analog type subscriber service data input through the input terminal IN is greater than the second slicing level, and if it is small, the low level signal is logically summed (30). ) The first comparator 10 outputs a high level signal when the analog type subscriber service data input through the input terminal IN is greater than the first slicing level, and outputs a low level signal as the logical sum 30 when the data is smaller than the first slicing level.

If the signal output from the second comparator 10 is a high level signal, that is, if the analog subscriber service data is larger than SL2, the sample value determined as '1' is output through the output terminal OUT. However, if the signal output from the second comparator 20 is a low level signal, that is, if the input data is less than SL1, the value output through the output terminal OUT depends on the value output from the first comparator 10.

That is, when the low level signal is output from the first comparator 10, that is, when the input data is less than SL1, the sample value determined as '0' is output through the output terminal OUT. That is, if the subscriber service data is less than the first slicing level, the data is restored to a digital signal of '0', and if the subscriber service data is greater than the second slicing level, the data is restored to a digital signal of '1'.

However, if a high level signal is output from the first comparator 10, i.e., if the input data IN is greater than SL1, the output sample value is inverted of the data previously stored in the D flip-flop 40. The sampling value depends on the value. That is, if the subscriber service data is between the first slicing level and the second slicing level, if '1' was previously stored, a sample value of '0' is output, and if '0' is stored, A sample value of 0 'is output as one bit of the subscriber service data restored through the output terminal OUT.

In this way, the number of sample values that can be wrongly sampled by the delay can be reduced. Assuming that the initial input of the D flip-flop 40 shown in FIG. 1 is '1' and the bit clock occurs simultaneously with the data input and is cleared by RESET, the subscriber service shown in FIG. The sample value of the data is determined as shown in Table 1 below.

Therefore, the slicing level value of the input data IN is output in series through the output terminal OUT in synchronization with the bit clock.

As described above, the subscriber service data extraction circuit according to the present invention slices analog subscriber service data in three steps and determines its digital value, thereby reducing the number of false sample values, thereby reducing the number of false sample values. There is an effect of minimizing errors when restoring to data.

Claims (5)

Subscriber service which converts subscriber service data transmitted with a television signal into digital form by using a slicing technique while being inserted in analog form in a vertical blanking period without a television video signal, and restores the digital subscriber service data. And a first comparison means for comparing whether the analog type subscriber service data is greater than a first slicing level less than a predetermined threshold level: wherein the analog type subscriber service data is larger than the predetermined threshold level. Second comparison means for comparing whether or not greater than a second slicing level: an OR of outputting the output of the second comparison means and an AND signal and outputting the data as the subscriber service data in the digital form: storing an output of the OR The subscriber service data in the analog form Storage means for outputting the stored signal in response to a synchronized bit clock; and a logical product for performing an AND operation on the inverted value of the signal output from the storage means and the output of the first comparing means and outputting the AND signal as the logical product signal; Subscriber service data extraction circuit, characterized in that. A data extraction circuit for extracting digital data from a received analog signal, comprising: data storage means for latching previous data in response to a bit clock and outputting inverted previous data: wherein the level of the input analog signal is one of three levels; A level discrimination means for discriminating whether or not it belongs and generating a discrimination signal; and in response to the discrimination signal, first level data is output in the case of the first level, second data is output in the case of the third level, and And an output means for outputting the inverted previous data provided from the data storage means. 3. The data storage means according to claim 2, wherein said data storage means has a D flip-flop in which the output of said output means is data-input and clocks a bit clock: and an inverter for inverting the output of said D flip-flop to output the inverted previous data. And a data extraction circuit. The first comparator of claim 2, wherein the level discriminating means compares a first reference value with the input analog signal and generates a first discriminating signal for determining whether the level of the analog signal is a first step or a second step. And a second comparator for comparing a second reference value with the input analog signal to generate a second discrimination signal for discriminating whether the level of the analog signal is a second stage or a third stage. 5. The gate driving circuit of claim 4, wherein the output unit comprises: a first gate configured to perform an AND operation on the inverted previous data and the first determination signal; and a second logic configured to input and OR the output of the first gate and the second determination signal; A data extraction circuit comprising a gate.