KR0155698B1 - Gray decoder - Google Patents

Abstract

The present invention relates to a gray decoder device of a channel identifier configured to decode a gray encoded signal without using a separate commercially available gray decoder, and generates a suffix for an address input using a suffix generator. The fixer and the input data are compared by an address comparator so that an error detector detects whether an error is equal to or less than a certain number, thereby controlling the switch circuit for passing the data.

Description

Gray decoder device of channel identifier

1 is a block diagram of a conventional channel identifier.

2 is a block diagram of a gray decoder device of a channel identifier according to the present invention.

3 is a configuration diagram showing an embodiment of FIG.

* Explanation of symbols for the main parts of the drawings

10, 11-14: Service generator 20, 21-22, 200: Address comparator

30, 31 to 34: error detector 40, 300: switch circuit

100: Gray Decoder OR1: Oagate

The present invention relates to a gray decoder (Gray Decoder) of a channel identifier, and more particularly, to identify a gray encoded input signal, a channel capable of decoding a gray encoded signal without using a separate gray decoder. A gray decoder device of an identifier.

FIG. 1 is a block diagram of a channel identifier that is currently used. When data is input, the decoder decodes the gray decoder 100 and then outputs the data by comparing the address signal input from the address comparator 200 to switch circuit ( 300) to output the data.

In order to identify the gray-encoded input signal in MAC (multiplied analog component) type TV and VCR, information can be matched only by using a separate gray decoder as shown in the first diagram, and the gray decoder has a complicated circuit configuration. There is a problem that the cost of the product rises.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide a gray decoder device of a channel identifier capable of decoding a gray encoded signal without using a gray decoder.

In order to achieve the above object, the present invention provides a suffix generator for generating a necessary suffix when an address is input, and an address comparator for identifying a signal by comparing an address of a header portion of the input data with a signal generated by the suffix generator. And an error detector which receives an output signal of the address comparator and detects an error rate of data from the signal to determine whether or not there is a data error. The gray decoder device of the channel identifier with the switch circuit is connected to the output is characterized by.

Hereinafter, an embodiment of a gray decoding apparatus for channel identification according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a gray decoder device of a channel identifier according to the present invention, wherein a suffix generator 10 for generating a necessary suffix when an address is inputted, and an address of a header portion of input data And an address comparator 20 for identifying a signal by comparing the signal generated by the suffix generator 10 and an output signal of the address comparator 20 to detect an error rate of data in the signal to determine whether there is a data error. And a switch circuit 40 which is controlled to be switched by an output of the error detector 30 so as to turn off a signal input when an error is detected and to output data in a normal state. Became.

The gray-coded input signal has a head structure consisting of an address and a suffix so that only the data having the desired address is read through the address in the header, and the address data is transmitted to the suffix generator 10. If entered, a suffix is generated.

For example, the data input is

If A is address 12 bit B is suffix 11 bit,

The above equations are all BOOLEN equations.

The output of the suffix generator 10 is output in the order of a, b, c ... x, y, z as in the above formula, but compared with the 23 bits of the head by the address comparator 20 in the input data. If an error of 3 bits or less is detected at 30, the data is recognized as a true value and the switch circuit 40 is turned on to pass the data.

However, if an error of 4 bits or more is detected in the above data, the error detector controls the switch circuit 40 to be turned off to block the output of the data.

3 shows a configuration of a channel identifier according to the present invention applied to a MAC system. In the MAC system, an address is 10 bits and a continuity index is composed of 2 bits. Here, the MAC (multiplied analog component) method is one of the broadcast methods in satellite broadcasting, and digitally compresses the digital audio signal within 1H by time-compressing the luminance signal and the color difference signal, which are analog components of the video signal, to 2/3 and 1/3, respectively. It refers to a broadcast method of broadcasting by receiving the time order together with.

In FIG. 3, the suffix generators 11, 12, 13, and 14 of the multi-stage have continuity indices of 00, 01, 10, and 11, respectively, and receive address signals.

The output sides of the suffix generators 11, 12, 13, and 14 are connected to address comparators 21, 22, 23, and 24, respectively.

The output side of the address comparators 21, 22, 23, and 24 is connected to the input sides of the error detectors 31, 32, 33, and 34, respectively. The output side of 31, 32, 33, and 34 are all connected to the multi-input orifice OR1, and the output side of this orifice OR1 is connected to the control means of the switch circuit 40. As shown in FIG.

In such a configuration, a to k are addresses in the data values described in FIG. 1, and 1 and m are continuous indexes. This continuity index is for continuity of data and is cycled in order of 00, 01, 10 and 11.

For example, if 00, 10, 11, 00, index 01 is missing, it can be seen that the middle data is lost.

The operation of this configuration is to generate suffixes in the suffix generators 11, 12, 13, and 14 when the address and the continuous index are input as described in FIG. 2, and the address comparators 21, ( 22), (23), and (24) compare the generated suffix with the input data, and each error detector blocks data when the error is more than 4 in both signals, and true when the error is 3 or less. A high signal is input to OR1) to turn on the switch circuit 40. Thus the incoming data is passed to the output.

In this case, when one signal is generated from four error detectors 31, 32, 33, and 34, the oragate OR1 outputs a high signal, and the continuity index is 1. Is output. In other words, the data and the Continental index are output together.

3 is a configuration for one channel, but it is natural that it can be extended to multiple channels. That is, if each channel is provided with a circuit as shown in FIG. 2 and inputs an address, and each circuit is configured to output data of each channel, gray decoding for a plurality of channels is performed.

As described above, according to the gray decoding apparatus of the channel identifier according to the generation, a suffix generator for generating a suffix that generates a necessary suffix when an address is input, an address of the head portion of the input data and the suffix generator An address comparator that compares the generated signals and receives an output signal of the address comparator and detects an error rate of the data from the signal comparator and switches the error detector to determine whether or not there is a data error and is controlled by the output of the error detector. Since it is a switch circuit connected to turn off the input signal when detecting an error and output data when it is normal, the header part of the input data is compared in the address comparator by the suffix generated by the suffix and the suffix generator. When a certain number of errors occur in the detector The data input only to be output so it is possible to perform a gray-decoded without having to separate the Gray decoder commercialized.

Claims (1)

When the address is input, the suffix generator 10 for generating a necessary suffix and the address comparator 20 for identifying a signal by comparing an address of the head portion of the input data with a signal generated by the suffix generator 10. And an error detector 30 that receives the output signal of the address comparator 20 and detects an error rate of the data from the signal to determine whether or not there is a data error. A gray decoder device of a channel identifier comprising a switch circuit (40) connected to turn off an input signal upon detection and output data during normal operation.