KR0147954B1 - Classification circuit for motion vectors - Google Patents

Abstract

The present invention uses the motion range according to the generated motion vector in order to efficiently use the search range in the previous frame used when estimating the motion vector of the macroblock by frequency information according to the applied motion vector. It relates to a circuit for classifying vectors. The motion vector classification circuit according to the present invention comprises: a range value extracting unit for shifting all generated motion vectors to have the same comparison form and extracting a corresponding range value of the shifted motion vector according to the N equal range; Range setting means for combining a range value transmitted from the range value extracting unit and outputting a value for setting a range corresponding to the currently applied motion vector; And counting means for counting a motion vector generation count value of the corresponding range among the N equal ranges by the range setting value output from the range setting means.

Description

Motion vector classification circuit

1 is a block diagram of an embodiment of a motion vector classification circuit according to the present invention;

FIG. 2 is a circuit diagram for calculating an amount of shift applied to the range value extracting unit shown in FIG.

FIG. 3 is a detailed circuit diagram of the range value extracting unit shown in FIG.

* Explanation of symbols for main parts of the drawings

10: search range selector 12: subtractor

14: decoder 20: range value extraction unit

21: shift circuit 22: range value extraction means

30: range setting means 40: counting means

The present invention relates to a circuit for classifying motion vectors. In particular, the present invention relates to a circuit for classifying motion vectors according to the magnitude of motion vectors generated to selectively determine a corresponding search range according to the magnitude of motion vectors generated in an image. It relates to a classification circuit.

In general, compression coding of an image may be classified into a moving picture encoding and a still image encoding according to a configuration form. Among them, a compression effect is obtained by removing redundancy between successive pictures in an interframe video encoding video. Compressor method based on moving images transmits moving information at a real time interval, so it can be said that the speed and speed of information transmission are great. The most widely used techniques using time redundancy are motion-compensated prediction techniques, which are used as the basis for video compression algorithms as in CCITT H.261.

The coding gain obtained by the motion information and the amount of data required for motion information encoding must be traded off. The designation of 16x16 blocks as the basic unit of motion compensation is the result of such a compromise, and 16x16 blocks are called macroblocks. The motion vector of each macro block is represented by two components, a vertical direction and a horizontal direction. In order to extract the motion vector of the macro block, it is necessary to estimate the most correlated macro block from the previous frame image. However, in order to efficiently perform such estimation, a search range for the previous frame image needs to be appropriately set.

The present invention provides a motion vector classification circuit for classifying a motion vector according to the size of the generated motion vector in order to set a search range for a previous frame image in consideration of the occurrence frequency according to the magnitude of the generated motion vectors. There is this.

In order to achieve the above object, the motion vector classification circuit according to the present invention will now be described in detail with reference to the accompanying drawings.

First, when the size of the motion vector is assumed to be constant and internally divided into 4 equal parts, each equal boundary value is as shown in Table 1 below when the maximum value is '100'.

In general, if the range of the motion vector is set as shown in Table 2, a pattern similar to Table 1 can be easily found.

Therefore, even if the search range of the motion vector (MV: Motion Vector) has any value, when the shift vector is shifted to the left (or right) with respect to V12, the motion vectors have the same comparison form. For example, if the search range of the motion vector is 16, shifting 8 bits to the left has the same comparison form as the search range of the motion vector is 4096. If the search range of the motion vector is 64, shifting to the left 6 bits It has the same comparison form as the case where the search range of the motion vector is 4096. At this time, the shifted amount is obtained through the circuit diagram shown in FIG.

1 is a block diagram of an embodiment of a motion vector classification circuit according to the present invention. The range value extracting unit 20 extracts a range value according to the magnitude of an applied motion vector based on an N equal range. Range setting means 30 and range setting means 30 for setting the range to which the motion vector currently applied among the range divided by N by the corresponding range value transmitted from the value extraction section 20 and the range setting means 30. And counting means 40 for counting the motion vector generation count value in the corresponding range by the value.

The operation of the motion vector classification circuit configured as described above is performed as follows.

First, the range value extractor 20 shifts an input motion vector according to the shift amount applied, and logically calculates the shifted information to extract corresponding range values S0, S1, and S2 information. To this end, the range value extractor 20 is configured by a shift circuit 21 composed of logical multiplication elements and a range value detecting means 22 composed of logical sum elements as shown in FIG. The operation of the range value extractor 20 will be described in more detail with reference to FIG. 3 as follows.

That is, the shift circuit 21 shifts the motion vector by the shift amount applied by bitwise multiplying the shift amount applied to the bits D8 to D0 and the motion vector applied to the [V12: V0] bits by the bit unit. Since it consists of 8 bits and the motion vector is composed of 12 bits, the logical multipliers (G1 to G3) are used to logically multiply the bits D0 to D8 bit by bit from V12 to V4 bit by bit, and the logical multipliers (G4 to G6) are Using D0 to D8 bits V11 to V3 bit by bit in turn, and using logical multipliers (G7 ~ G9) to D0 bit by D8 bit by bit from V10 to V2 bit in turn Shift the vector. This is because the range value to extract the shift processing step is divided into three steps is composed of three bits (S0, S1, S2). The shifted data is output to the range value extraction means 22, respectively.

The range value extracting means 22 is composed of logical sums G10, G11, and G12 to extract the range value of the applied motion vector. That is, the logical sum element G10 outputs the result of logical sum of the data transmitted from the logical multipliers G1 to G3 provided in the shift circuit 21 as S2 data, and the logical sum element G11 outputs the shift circuit ( The result of the logical sum of the data transmitted from the logical multipliers G4 to G6 included in the 21) is output as S1 data, and the logical sum element G12 is the logical multipliers included in the shift circuit 21 ( The result of ORing the data transmitted from G7 to G9) is output as S0 data. The range value output from the range value extracting means 22 as described above is 3 bits (S2, S1, S0) because it illustrates the case where the magnitude of the motion vector is divided into four parts as shown in Table 1 in this embodiment. to be.

In more detail with reference to Table 2, when the search range of the motion vector is 16, V becomes 16, V / 2 becomes 8, V / 4 becomes 4, and the bits V1 and V0 are offset values. S2, S1, S0 outputted with the V4, V3, and V2 bits being corresponding range values correspond to the V4, V3, and V2 bits among the 13-bit motion vectors. That is, the values corresponding to S2 = V4, S1 = V3, and S0 = V2 are output from the range value extracting means 22. In addition, when the search range of the motion vector is 36, V / 4 becomes 8, so the offset values correspond to V2, V1, and V0, and the information of V5, V4, and V3 bits is output as S2, S1, and S0 information. .

Therefore, when the equality with respect to the size of the motion vector is changed, the bits of the range value extracted by the range value extracting means 22 may be set differently, and accordingly the shift amount applied by the shift circuit 21 described above is applied. The logical AND step between motion vectors may also be set differently.

When the range setting means 30 receives the corresponding range values S2, S1, and S0 information from the range value extracting section 20, the range setting means 30 logically combines the range values of the applied 3 bits and divides them into four equal ranges as shown in Table 1 below. Outputs a value to set the range corresponding to the size. That is, data for logically combining the applied bit information S2, S1, S0 as shown in Equation 1, and setting the size of the motion vector currently applied to the range where the result of the logical combination is '1' corresponds to the range. Output

For example, referring to Equation 1, as a result of logical combination of the applied S2, S1, S0 bit information in each of the four situations described above, if the result of logical combination using the expression S2'S1S0 'is obtained as'1', Range setting information indicating that the magnitude of the applied motion vector corresponds to (1/2) V _max ≤ V <(3/4) V _max is output.

In order to perform a logical combination as shown in Equation 1 on the applied S2, S1, S0 bit information, the range setting means 30 logically multiplies the S2 ', S1, and S0 as shown in FIG. 31), the logical OR element 35 for ORing S2 with the output of the logical AND element 31, the logical AND element 32 for ANDing S2 ', S1 and S0', and the logical AND for S0 ', S2', S1 'and S0. The product element 33 is composed of an AND product 34 that logically multiplies S2 ', S1' and S0 '.

The data output through the configured logic elements 31 to 35 are transmitted to the counting means 40 having counters 1, 2, 3, and 4 (not shown) assigned to each range.

The counting means 40 is a counter 1 (not shown) which performs a count when a range setting value indicating that the range of the applied motion vector is (3/4) V _max ≤ V ≤ V _max is transmitted, and the motion vector currently applied. When a range setting value is transmitted in which the range of (1/2) V _max ≤ V <(3/4) V _max is transmitted, a counter 2 (not shown) that performs a count is displayed. 4) When the range setting value indicating that V _max ≤ V <(1/2) V _max is transmitted, the counter 3 (not shown) which performs the count and the range of the currently applied motion vector are 0 ≤ V <(1 / 4) When the range setting value indicating V _max is transmitted, it is configured and operated by a counter 4 (not shown) which performs a count. That is, if the signal output from the logic element 35 in the range setting means 30 is '1', the counter 1 counts. If the signal output from the logic element 32 is '1', the counter 2 counts. If the signal output from the logic element 33 is '1', the counter 3 performs a count. If the signal output from the non-element 34 is '1', the counter 4 is operated to perform a count. Here, the '1' data that activates the count may be set to a different value at design time.

When the count value of the counter 1 (not shown) is larger than the count value of the other counters by the counting operation, the frequency of occurrence of the motion vector corresponding to the range (3/4) V _max ≤ V ≤ V _max is different. If the count value of the counter 2 (not shown) is greater than the counter value of the other counters, the frequency is greater than (1/2) V _max ≤ V <(3/4) V _max. It means that the frequency of occurrence of the motion vector is greater than the frequency of occurrence in other ranges, and when the count value of the counter 3 (not shown) is larger than the count value of the other counter, (1/4) V _max ≤ V <(1 / 2) It means that the frequency of occurrence of the motion vector corresponding to the V _max range is larger than the frequency of occurrence of the other range, and when the count value of the counter 4 (not shown) is larger than the count value of the other counter, 0 ≤ V <( The frequency of occurrence of the motion vector corresponding to the range of V _max is different It means greater than the frequency of occurrence.

The count values of counters 1, 2, 3, and 4 not shown in the counting means 40 are transmitted to the search range selector 10 shown in FIG. 2, respectively, so as to select an optimal search range.

That is, FIG. 2 is a circuit diagram for calculating the amount of shift applied to the range value extractor 20. When the count values of the counters 1, 2, 3, and 4 which are not shown in the counting means 40 are respectively applied, Decodes the difference value output from the search range selector 10 for selecting the search range, the subtractor 12 for subtracting the difference between the 4-bit shift range code output from the search range selector 10, and the reference value. It consists of the decoder 14 which outputs D8-D0 which are shift amount data applied to the range value extraction part 20. FIG.

The shift amount calculating circuit configured as described above measures the frequency of the motion vectors generated so far in the search range selector 10 when count values are applied from counters 1, 2, 3, and 4 not shown in the counting means 40, respectively. Then, the optimum search range is selected based on the measured results. A shift range code (shift range code as shown in Table 2) corresponding to the selected search range is output. That is, if the frequency of the motion vectors measured while the search range of the currently-operated motion vector is 16 is concentrated in the range less than the maximum value, the search range 16, which is currently set, is selected as the optimal search range. And outputs '0001' information corresponding to the shift range code. However, if the frequency of the measured motion vector is concentrated in the maximum value range, that is, when the value of the counter 1 is recognized as having the largest value, the range of 16 currently set is narrower as the search range. 32 is selected as the optimal search range and '0010' information corresponding to the shift range code is output. The shift range code output from the search range selector 10 is transmitted to the subtractor 12.

The subtractor 12 outputs a difference value between the 4-bit shift range code drawn from the search range selector 10 and the reference value '9'. 9 is the maximum code value that can be output from the search range selector 10. The output difference value is transmitted to the decoder 14. The decoder 14 decodes the applied difference of 4 bits into 9 bits and transmits the difference value to the shift circuit 21 in the range value extractor 20. At this time, the value output from the decoder 14 corresponds to the shift amount for the motion vector to be applied.

As described above, the present invention classifies the motion vectors according to the magnitude of the applied motion vectors so as to determine the frequency according to the magnitudes of the generated motion vectors, thereby determining the search range set in the previous frame to estimate the motion vectors. Applicable to the motion vector size.

Claims (5)

A range value extracting unit which shifts by a predetermined amount of shift so as to have the same comparison form on the basis of the best bit with respect to all applied motion vectors, and extracts a corresponding range value by N equals from the shifted motion vector; A range setting unit for combining a range value output from the range value extraction to output a value for setting a range corresponding to the N equal range of the currently applied motion vector; And counting means having a counter corresponding to each N-divided range, and counting a motion vector generation count value of a range corresponding to a motion vector currently applied by a value for setting a range transmitted from the range setting unit. Motion vector classification circuit, characterized in that. 2. The method of claim 1, wherein the predetermined shift amount is a value obtained by decoding a difference value between a shift range code corresponding to a selected search range and '9' for a bit for the currently applied motion vector applied to the range value extractor. Motion vector classification circuit, characterized in that determined. 2. The method of claim 1, wherein the range value extracting unit sets the step of logically multiplying a bit for the currently applied motion vector by the bit for the predetermined shift amount in the same unit as the bit number of the range value. A shift circuit for shifting the currently applied motion vector by the shift amount of? And range value extracting means for extracting a range value corresponding to the N equals of the currently applied motion vector by ORing the result of each logical product step output from the shift circuit. 2. The logic unit of claim 1, wherein the range setting unit is configured to logically combine the range values applied to output logic signals for setting a counter corresponding to a set range among the counters provided in the counting unit to an active state. Classification circuit according to the size of the motion vector, characterized in that made. The method according to claim 1, wherein the range setting means divides the range of the motion vector into quadrants, and when the range values to be applied are S0, S1, and S2, the range values S0, S1, S2 to be applied are logically expressed by the following equation. And outputting a result of performing logical combining as a value for setting a range of motion vectors to be applied.