KR0142480B1 - The apparatus for function test of braun tube drive circuit - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a functional test apparatus for a CRT driving circuit such as a television receiver, a monitor, and the like, and particularly, a CRT driving circuit capable of determining whether the CRT driving circuit is normal by storing an image signal displayed on a screen in a memory. The present invention relates to an apparatus for inspecting a function of a circuit. In the related art, in order to determine whether the CRT driving circuit is normally operated, it has been troublesome to switch to a corresponding CRT according to the type of the CRT driving circuit.

As shown in FIG. 2, the image signal processing unit 20 converts an image signal output of the image signal processing circuit 11 into a digital signal and stores the image signal in the memory 50 and the vertical deflection circuit 12. The vertical synchronous signal output unit of the horizontal synchronization circuit 13 and the vertical synchronous signal processor 30 for designating the upper address of the memory 50 by converting the vertical synchronous signal output of the digital signal into a digital signal. The CRT on the basis of the image signal stored by controlling the operation of the horizontal synchronous signal processing unit 40 for specifying the lower address of the 50 and the image signal processing unit 20 and the vertical / horizontal synchronization signal processing unit 30, 40. The microprocessor 60 is configured to determine whether the driving circuit operates normally.

Description

Functional test device of CRT driving circuit

1 is a block diagram showing the configuration of a conventional CRT driving circuit;

2 is a block diagram according to the present invention,

(A) and (b) of FIG. 3 are time charts showing vertical and horizontal synchronization signals.

(A) and (b) of FIG. 4 is an embodiment of a screen showing an image signal scanned by a vertical / horizontal synchronization signal.

* Explanation of symbols for main parts of the drawings

10: Brown tube driving circuit 11: Image signal processing signal

12: Vertical sync signal processing circuit 13: Horizontal sync signal processing circuit

20: video signal processor 21: gain adjustment amplifier

22: video signal analog / digital converter 30: vertical synchronization signal processing unit

31: Vertical deflection coil simulator

32: vertical sync signal analog / digital converter

40: horizontal sync signal processor 41: horizontal deflection coil simulator

42: horizontal sync signal analog / digital converter

50: memory 60: microprocessor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a functional test apparatus for a CRT driving circuit such as a television receiver, a monitor, and the like, and particularly, a CRT driving circuit capable of determining whether the CRT driving circuit is normal by storing an image signal displayed on a screen in a memory. It is related with the function test apparatus of the furnace.

As the number of people who enjoy leisure time increases, the spread of television receivers has become popular, and many households have installed television receivers to watch broadcast signals.

In the production plant that produces television receivers, in order to mass-produce popularized TV receivers more efficiently, the TV receivers are not produced in one production line, but parts of the television receivers are produced in different production processes for each part of the television receivers. After production, it is finally combined to produce one television receiver.

In addition, in order to determine whether the TV receivers are normally combined in the production process to produce a normal TV receiver, it is determined whether the normal operation is performed for each part in each production process, and then the combination is again determined to be normal operation. By supplying only the receiver to the market, it is distributing higher quality television receivers to consumers.

Among them, a conventional cathode ray tube for determining the normal operation of a cathode ray tube driving circuit (image signal processing circuit, vertical deflection circuit, horizontal deflection circuit) which controls the driving of the cathode ray tube to output the image signal processed by the television receiver to the cathode ray tube. Referring to FIG. 1 of the functional inspection apparatus of the driving circuit as follows.

First, a video signal input circuit and a vertical / horizontal sync signal input to a CRT driving circuit (video signal processing circuit 100, horizontal deflection circuit 120, vertical deflection circuit 110) to be checked for function are not shown in the figure. A circuit, and the image signal processing circuit 100, the vertical deflection circuit 110, and the horizontal deflection circuit 120 have an electron gun 150, a vertical deflection coil 130, and a horizontal deflection coil installed at a rear end of the CRT. The deflection coils 140 are connected to each other.

When the image signal and the vertical / horizontal synchronization signal are supplied to the image signal processing circuit 100, the vertical deflection circuit 110, and the horizontal deflection circuit 120 of the functional test apparatus of the CRT driving circuit configured as described above, the vertical / horizontal A deflection current flows through the vertical / horizontal coils 130 and 140 based on the vertical / horizontal synchronization signals applied from the deflection circuits 110 and 120 to output an image signal output from the image signal processing circuit 100. It is scanned to the fluorescent surface of the CRT 160 through the 150.

Accordingly, by viewing the image signal displayed on the front surface of the CRT 160, it is determined whether the CRT driving circuit (the image signal processing circuit 100, the vertical deflection circuit 110, and the horizontal deflection circuit 120) operates normally. .

However, since different CRT driving circuits are used depending on the type of TV receiver and monitor, CRTs are replaced with new ones each time the CRT driving circuit is changed in order to determine whether the CRT driving circuits operate normally in a factory line or a laboratory. There was a hassle to determine whether the furnace was operating normally.

That is, in order to determine the normal operation of the CRT driving circuit, the number of CRTs corresponding to the type of CRT driving circuit must be kept, and the CRT should be changed every time the new CRT driving circuit is judged normal operation. In addition to the need for a separate storage place, the time required to replace the CRT was long, regardless of the normal operation determination time of the CRT driving circuit.

In addition, since the CRT driving circuit determines whether the CRT driving circuit operates normally by looking at the image signal displayed on the CRT, the CRT driving circuit cannot be judged correctly.

The present invention has been made to solve the above-mentioned drawbacks, and the digital value of the image signal and the vertical / horizontal synchronization signal output through the CRT driving circuit (image signal processing circuit, horizontal deflection circuit, vertical deflection circuit) are digital values. Is stored in the memory of the microprocessor, and the CRT can automatically determine whether the CRT driving circuit operates normally in contrast to the image signal that passed through the CRT driving circuit and the vertical / horizontal synchronization signal. The purpose is to provide a functional test device.

The present invention for realizing the object as described above is provided with a video signal processing circuit, a vertical deflection circuit and a horizontal deflection circuit CRT driving circuit for processing the video signal output to the CRT as a video signal based on the vertical / horizontal synchronization signal A video signal processing means for converting a video signal output from the video signal processing circuit into a digital signal and storing the same in a memory; and converting a vertical synchronization signal output from the vertical deflection circuit into a digital signal, thereby converting the image signal into a digital signal. Vertical synchronizing signal processing means for designating an address, horizontal synchronizing signal processing means for designating a low address of a memory by converting the horizontal synchronizing signal output from the horizontal deflection path into a digital signal, and perpendicular to the video signal processing means / Controls the operation of the horizontal sync signal processing means and stores the video signal in the memory On the basis of a call to feature a doeeojim composed of a microprocessor to determine the normal operation of a picture tube drive circuit.

Hereinafter, the configuration of the present invention in more detail with reference to the accompanying drawings as follows.

As shown in FIG. 2, the present invention includes a video signal processing circuit 11, a vertical deflection circuit 12 and a horizontal deflection circuit 13, based on a vertical / horizontal synchronization signal output to a CRT. In the CRT driving circuit 10 for processing the video signal processing circuit 11, the video signal processing unit 20 converts the video signal output into a digital signal and stores it in the memory 50, and the vertical deflection circuit ( Converts the vertical synchronous signal output of 12) into a digital signal and converts the vertical synchronous signal output of the horizontal deflection circuit 13 into a digital signal. Based on the stored video signal by controlling the operation of the horizontal synchronous signal processor 40 to designate a lower address of the memory 50 and the operation of the image signal processor 20 and the vertical / horizontal sync signal processor 30 and 40. Normal operation of the CRT drive circuit It consists of the microprocessor 60 which determines a part.

Here, the video signal processing unit 20 converts the video signal output from the video signal processing circuit 11 into a gain adjusting amplifier 21, and converts the buffered and amplified video signal into a digital signal and stores the memory 50 in the memory 50. And a video signal analog / digital converter 22 for supplying the video signal.

In addition, the vertical synchronizing signal processing unit 30 is a vertical deflection coil simulator 31 for varying the reactance value under the control of the microprocessor 60 to set the vertical synchronizing signal level differently, and the variable vertical synchronizing signal digital signal. Is composed of a vertical synchronizing signal analog / digital converter 32 which is converted into a digital signal and supplied to an upper address of the memory 50.

In addition, the horizontal synchronizing signal processing unit 40 has a horizontal deflection coil simulator 41 for varying the reactance value under the control of the microprocessor 60 to set the horizontal synchronizing signal level differently, and digitally converting the variable horizontal synchronizing signal. And a horizontal synchronizing signal analog / digital converter 42 for supplying the lower address of the memory 50 by converting the?

The effects of the present invention configured as described above will be described.

The image signal processing circuit 11 and the vertical deflection circuit 12 of the Brownian driving circuit 10 for determining whether the image signal generated from the video pattern generator and the vertical / horizontal synchronization signal which are not shown in the figure normally operate. When supplied to the horizontal deflection circuit 13, the image signal processing circuit 11, the vertical deflection circuit 12 and the horizontal deflection circuit 13 of the CRT driving circuit 10 process the same to process the image signal processing unit 20. The vertical synchronization signal processor 30 and the horizontal synchronization signal processor 40 are respectively applied.

Accordingly, the vertical deflection coil simulator 31 controls the microprocessor 60 that recognizes the type of the CRT driving circuit 10 to determine whether it operates normally. Correspondingly variably set, the vertical synchronous signal output from the vertical deflection circuit 12 is supplied to the vertical synchronous signal analog / digital converter 32.

Subsequently, in the vertical synchronizing signal analog-to-digital converter 32, the vertical synchronizing signal is converted into a digital signal (digital signals such as 00 to FF, and the present invention will be described using hexadecimal numbers as an example). Low address is assigned.

That is, while converting a vertical synchronization signal as shown in (a) of FIG. 3 of FIG. 3 to (FF) in digital format while moving from the upper side to the lower side of the screen as shown in (a) of FIG. Set to the upper address of the designated address of the memory 50.

In addition, in the horizontal deflection coil simulator 34, the reactance value of the CRT controller 34 recognizes the type of the CRT driving circuit 10 to determine whether it is normally operated. The reactance value thereof corresponds to the CRT driving circuit 10. In this case, the horizontal synchronization signal output from the horizontal deflection circuit 13 is supplied to the analog / digital converter 42 as a horizontal synchronization signal.

Subsequently, the horizontal synchronizing signal analog / digital converter 42 converts the horizontal synchronizing signal into a digital signal (00 to FF: 16) in the same manner as the vertical synchronizing signal analog / digital converter 32 described above to store the memory of the memory 50. It is designated as the column address among the addresses.

That is, the lower address of the memory 50 is designated after the upper address designated by the vertical synchronizing signal analog / digital converter 32 described above, and the horizontal synchronizing signal as shown in (b) of FIG. As shown in (b) of FIG. 1, a designated address of the memory 50 for storing an image signal by converting it into a digital signal (FF: 16) is set while completing the movement from the left side to the right side of the screen.

The gain adjusting amplifier 21 of the video signal processor 20 buffers and amplifies the video signal processed by the video signal processing circuit 11 of the CRT driving circuit 10 to a predetermined level, thereby converting the video signal analog / digital converter 22. When supplied to the video signal, the video signal analog / digital converter 22 converts the applied video signal into a digital signal and stores it in the memory 50.

That is, the video signal is stored in the designated address of the memory 50 set by the upper address set by the vertical sync signal and the lower address set by the horizontal sync signal.

Preferably, the microprocessor 60 is configured to determine the normal operation by comparing the image signal processed in the CRT driving circuit which is output from the image signal data and the video pattern control data stored in the memory 50 to perform normal operation. By determining whether the CRT driving circuit 10 operates normally and outputting it through a monitor (not shown), it is possible to more accurately determine whether the CRT driving circuit operates normally.

By determining whether the CRT driving circuit operates normally by using the function tester of the CRT driving circuit as described above, it is possible to determine whether the CRT driving circuits are normally operated without replacing the CRT including the vertical / horizontal deflection coil. It has an effect.

In addition, since the microprocessor determines whether the video signal has passed through the normal CRT driving circuit and the Congsan signal passed through the CRT driving circuit for determining normal operation, it is possible to accurately determine whether or not it is normal.

Claims (6)

In the CRT driving circuit 10, which includes a video signal processing circuit 11, a vertical deflection circuit 12, and a horizontal deflection circuit 13, for processing a video signal based on a vertical / horizontal synchronization signal output to a CRT, The video signal processing unit 20 converts the video signal output of the video signal processing circuit 11 into a digital signal and stores it in the memory 50, and converts the vertical synchronous signal output of the vertical deflection circuit 12 into a digital signal. The vertical synchronization signal processor 30 designating the upper address of the memory 50 and the horizontal synchronization signal output of the horizontal deflection circuit 13 into a digital signal to designate the lower address of the memory 50. A microprocessor that controls the operation of the signal processor 40, the image signal processor 20, and the vertical / horizontal sync signal processor 30, 40 to determine whether the CRT driving circuit operates normally based on the stored image signal. 60 Functional test device of the CRT driving circuit, characterized in that made. The video signal processing unit (20) of claim 1, wherein the video signal processing unit (20) converts the video signal output from the video signal processing circuit (11) into a gain adjusting amplifier (21) for buffering and amplifying the buffered amplified video signal into a digital signal. And a video signal analog-to-digital converter (22) for supplying the memory (50). The vertical synchronization signal processor (30) of claim 1, wherein the vertical synchronization signal processor (30) and the vertical deflection coil simulator (31) for varying the reactance value under the control of the microprocessor (60) to set the vertical synchronization signal level differently, and the variable vertical synchronization. And a vertical synchronization signal analog / digital converter (32) for converting a signal into a digital signal and supplying the signal to an upper address of the memory (50). The horizontal synchronizing signal processor (40) according to claim 1, wherein the horizontal synchronizing signal processing unit (40) has a horizontal deflection coil simulator (41) for varying reactance values and setting horizontal synchronizing signal levels differently under the control of the microprocessor (60). And a horizontal synchronizing signal analog / digital converter (42) for converting a signal into a digital signal and supplying the signal to a lower address of the memory (50). The apparatus of claim 1, wherein the image signal is stored at a designated address based on the vertical / horizontal synchronization signal. The apparatus of claim 1, wherein the microprocessor 60 determines whether the CRT driving circuit is normally operated by comparing the normal image signal input with the image signal stored in the memory 50. .