KR0141149B1 - Double wide television control apparatus and method using ir cord - Google Patents

Abstract

The present invention relates to a method of controlling a microprocessor of each product in the master microprocessor, having a microprocessor and a master microprocessor of each product in a double / wide television receiver having a video cassette recorder and a CD-OK system. By using an IR (Intra Red) code method, the operation command of the MBR transmitter is input from the master processor and the microprocessor of each product is controlled independently to simplify the transmission port.

Description

A microcomputer control method using an IR (intra-red) code method and a device in a double / wide television receiver having a video cassette recorder and a CD-OK system.

1 is a block diagram showing the configuration of a double / wide television receiver incorporating a video cassette recorder and a CD-OK system according to the present invention.

2 is a detailed block diagram of the audio / video selection unit of FIG.

3 is a diagram showing the configuration of an intra-red (IR) code.

4 is a control flowchart of a microprocessor for implementing the present invention.

5 is another control flow diagram of a microprocessor for practicing the present invention.

6 is an embodiment of the present invention.

The present invention relates to a double / wide television receiver, and more particularly, to a double / wide television receiver incorporating a video cassette recorder and a CD-OK system. With a microprocessor, this master microprocessor relates to a method and apparatus for transmitting an IR (intra-red) signal input from an MBR transmitter to a microprocessor for each product.

First of all, a double / wide television receiver can display a video signal on a wide screen having an aspect ratio of 16: 9, and split two wide screens from side to side to simultaneously display two video signals from different signal sources. As a television receiver having a display system, a video signal reproduced from an external video player such as a video cassette recorder or a compact disc player can be simultaneously viewed.

The video cassette recorder and the CD-OK system are incorporated in such a double / wide television receiver, and each of the products is a microprocessor, that is, a microprocessor (hereinafter referred to as a TV microcomputer) for controlling the operation of the television, and a video cassette recorder operation. Microprocessor (hereinafter referred to as VCR microcomputer) for controlling the video cassette recorder, and CD-OK microprocessor (hereinafter referred to as CD-OK microcom) for controlling the CD-OK unit, and these microprocessors are MBR (MULTI BREND REMOCON multi-brand remote controllers). It is controlled by the master microprocessor to correspond to the operating instructions of the transmitter.

In the method of controlling microprocessors for each product as described above, the most common method is a data transmission method using a line serial method. However, in this method, the timing of operation is slow when controlling each microprocessor, which causes a lot of error when the system is running, and each microprocessor requires many separate ports such as data port, clock port, and strobe port. There is a drawback to the complexity of routines in software programs.

Therefore, the present invention was created to solve the above-mentioned problems,

It is an object of the present invention to provide a method of transmitting data corresponding to an operation using IR code type remote control data so that a stable operation can be performed in a double / wide television receiver having a video cassette recorder and a CD-OK system. .

In order to achieve the above object, a video cassette recorder and a double / wide television receiver having a built-in CD-OK system according to the present invention have a microprocessor of a television unit controlling a television, a microprocessor and a CD of a video cassette recorder controlling a video cassette recorder. Each of the CD-OK unit microprocessors controls the OK unit, and these microprocessors are controlled by the master microprocessor which controls the IR code signal to correspond to the command of the IR code signal output from the MBR transmitter. .

In addition, each microprocessor subordinately connected to the master microprocessor controls the operation of the product families according to the IR signal sent from the master microprocessor, and the master microprocessor controls each microprocessor. It is also characterized in that to perform the control operation necessary for matching. That is, it controls the functions of TV / CD selection, CD door, data, clock, and CD reset necessary for matching the function of CD-OK and TV.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a schematic configuration of a video cassette recorder and a built-in double / wide television receiver with a CD-OK system according to the present invention.

The apparatus shown in FIG. 1 includes an antenna 10, a television signal receiver 11, an audio / video signal selector 12, a video signal processor 13, a television receiver controller 14, a video cassette recorder 15 ), CD-OK system unit 16, master control unit 17, CRT driving unit 18, CRT 19, audio signal processing unit 20, left and right speakers 21 and 22, and user's command operation unit 23, 24).

In addition, the television signal receiver 11 receives first and second tuners 110 and 111 for generating an intermediate frequency processed video signal by receiving a broadcast signal modulated by a carrier wave introduced through the antenna 10, the second And first and second demodulators 112 and 113 for inputting an intermediate frequency processed video signal generated by tuners 110 and 111 to generate first and second audio / video signals.

Also, the video / audio selection unit will be described in detail with reference to FIG. 2.

In addition, the signal signal processing unit 13 outputs the first and second comb filters 131 and 132 and the first and second comb filters 131 and 132 which respectively input the left and right video signals and separate the signals into hull / color signals. A second luminance signal, a second luminance signal, a second luminance signal, and a double / wide processing unit for outputting a second luminance / chrominance signal as a third luminance / chrominity signal; The matrix unit 134 converts the luminance / chromatic signal into an RGB signal.

In addition, the television receiver control unit 14 is controlled by the third microprocessor 171, the first microprocessor 141 for controlling the double / wide processor 133, the audio processor 20 and the first OSD (143), The first microprocessor 141 includes a first ROM, 142, a first OSD 143, and a selection switching OSD selecting unit 144 that selects the first OSD 143 and the master OSD.

The video cassette recorder 15 generates a third audio / video signal and inputs it to the audio / video signal selector 12 for playback, or outputs from the audio / video signal selector 12. A video cassette recorder 151 for inputting and recording an audio / video signal of 5, a second microprocessor 152 for controlling the video cassette recorder 151 under the control of a third microprocessor 171, and the second The second ROM 153 includes a program controlled by the microprocessor 152.

In addition, the CD-OK system unit 16 generates a fourth audio / video signal and inputs it to the audio / video signal selector 12, and outputs the sixth audio / video signal selector 12. A CD-OK 161 which operates by injecting an audio / video signal, a fourth microprocessor 162 that controls the CD-OK 161 under the control of a third microprocessor 171, and the fourth microprocessor The control program controlled by 162 includes a fourth ROM 163.

In addition, the master controller 17 controls the audio / video signal selection unit 12, the master OSD 173, the video cassette recorder unit 15, and the CD-OK control operation received from the user's command operation units 23 and 24. A third microprocessor 171 instructing the unit 16, a third ROM 172 and a master OSD 173 containing a control program controlled by the third microprocessor 171 are included.

Next, the operation of the apparatus shown in FIG. 1 will be described in more detail.

The television signal receiver 11 demodulates the broadcast signal introduced through the antenna 10 to output the first and second audio / video signals, and the video cassette recorder 15 is the video cassette recorder 15. Outputs a third audio / video signal reproduced from the audio / video signal to the audio / video signal selection unit 12, and the CD-OK unit 16 generates the fourth audio generated by the CD-OK 16; A video signal is output and provided to the audio / video signal selector 12.

The audio / video signal selection unit 12 selectively combines a plurality of audio / video signals provided on the input side thereof and outputs them as left and right screen video signals, left and right screen audio signals, and fifth and sixth audio / video signals. do.

2 is a block diagram showing a more specific configuration of the audio / video signal selection unit 12 shown in FIG.

The apparatus shown in FIG. 2 includes a video signal selector 121 and an audio signal selector 122, and the video signal selector 121 receives first to fourth video signals or an external input signal. And selectively combine them to output the left and right screen video signals, the fifth video signal, the sixth video signal, and the external output video signal.

The pattern of the video signals output as described above is determined by the video control signal CONT1 output from the television receiver control unit 14 and provided to the double / wide processing unit 133.

In addition, the audio signal selector 122 receives a first to fourth audio signal or an external input signal and selectively combines them to output the left and right screen audio signals, the fifth audio signal, the sixth audio signal, and the external output audio signal. do.

The pattern of the audio signals output as described above is determined by the audio control signal CONT2 output from the television receiver control unit 14 and provided to the audio signal processing unit 20.

Here, the external input / output audio / video signals allow additional externally supplied audio / video signals or externally generated audio / video signals to provide general purpose of the product family. It can be done.

In addition, the video signal processor 13 processes the left and right screen video signals provided by the audio / video signal selector 12 and doubles and wides them. In order to simultaneously display two video signals on one screen, it is necessary to match the horizontal and vertical scanning periods of the combined video signal with the horizontal scanning period of each video signal before combining. Here, it is assumed that the horizontal and vertical scanning periods of the two video signals to be combined are the same. However, special treatment is required when the horizontal and vertical scanning periods are different.

This technology is applied to NTSC / PAL, HD / NTSC converter, etc.

The scanning period of the combined video signal is adjusted using a memory.

For this purpose, the video signal is separated into luminance / chromatic signals, digitally converted and recorded in the memory. By adjusting the read speed of the memory, the scanning period of the output image signal can be determined.

Next, the double / wide processing unit 133 will be described in more detail.

Its apparatus includes first and second analog / digital converters, first and second frame memories, first and second write address generators, read address generators, and first and second digital / analog converters. It includes a left and right screen switching unit and a deflection unit.

Next, the operation of the double / wide processor 133 will be described in detail.

The first and second recording address generators respectively generate a recording address having a recording speed equal to the scanning speed of the left and right screen video signals, and the video signals digitally converted by the first and second analog / digital converters are The data is written to the first and second frame memories. At this time, the recording speeds recorded in the frame memory are the same as the scanning speeds of the left and right screen video signals, respectively.

In addition, the read address generator generates a read address having a read speed corresponding to twice the scanning speed of the left screen video signal.

Therefore, the read speeds of the first and second frame memories correspond to twice the scanning speeds of the left and right screen video signals, respectively.

On the other hand, the horizontal scanning period of the image signal is divided into two parts of the first half and the second half, the first half reads the video signal recorded in the first frame memory, and the second half reads the video signal recorded in the second frame memory. Is read at twice the recorded speed, the two video signals are combined into one video signal and output.

The left and right screen switching unit inverts the left and right screens on the screen by changing the switching order of the signals read out from the first and second frame memories.

In addition, the CRT driver 18 shown in FIG. 1 drives the RGB signal output from the video signal processor 13 to the CRT 19 to display an image signal.

In addition, the audio signal processor 20 processes the left and right screen audio signals provided by the audio / video signal selector 12 in surround, or selects and processes the left and right speakers 21 through a speaker / headphone. , 22). Here, the audio signal corresponding to the video signal of the left and right screens is output through the left and right speakers, or the audio signal corresponding to the video signal of the left screen is output to the left and right speakers, and the signal corresponding to the video signal of the right screen is output to the headphone output terminal. Selectable operation such as output is possible.

The television receiver control unit 14 controls the tuners 110 and 111 and the video signal processing unit 13 in response to a command input by an operation of the key input unit 23 or the remote controller 24.

The television receiver control unit 14 also generates the first and second tuner controls T1 and T2 to control the tuning operation of the tuners 110 and 111. By specifying different broadcast channels by each tuner, two channels can be watched at the same time.

On the other hand, the television receiver control unit 14 controls the video signal processor 13 by generating a double / wide control signal and a left and right inverted signal.

In addition, the first ROM 142 of the television receiver control unit 14 stores a program necessary for controlling the double / wide television receiver, and the first microprocessor 141 stores a program recorded in the first ROM 142. The control operation is performed by the control unit, and a sentence for the operation unit is generated through the first OSD 143.

In addition, the OSD switching unit 144 selects one of the OSD signal generated from the first OSD (143) or the OSD signal generated from the master control unit 17 to provide to the CRT driver 18. The CRT driver 18 drives the CRT 19 according to a signal in which an OSD signal and an RGB signal superimposed thereon are superimposed.

The television receiver control unit 14, the video cassette recorder unit 15, the CD- to perform a predetermined operation corresponding to the operation command input through the master control unit 17, the key input unit 23 or the remote control unit 24. The OK unit 16 and the audio / video signal selection unit 12 are controlled.

In the third ROM 172 of the master controller 17, programs necessary for various types of control are stored.

The third microprocessor 171 performs a control operation by a program recorded in the third ROM 172 and generates it through the text signal master OSD 173 for the operation unit.

In addition, the master control unit 174 generates a selection signal for selecting an audio / video signal to control the audio / video signal selection unit 12 so as to control the video signal processing unit 13, the audio signal processing unit 20, and the video. A signal suitable for the predetermined operation of the cassette recorder + section 15 and the CD-OK section 16 is provided.

3 is a block diagram showing the configuration of the IR code system.

The IR code system of FIG. 2, i.e., the format of the remote control data, consists of a custom code 30 for recording information of a maker and a data code 32 for recording respective information according to an operation form. In addition, the first two bytes of the transmission basic signal are a custom code, and the next two bytes are composed of a data code (that is, an IR code).

This custom code is a matter that can be determined according to the characteristics of each manufacturer. According to the present invention, the custom code is set to 5 for a video cassette recorder, 7 for a television video, and 2 for a CD-OK, for example. When the custom code is set in this way, the master microprocessor sends the control signal received from the MBR transmitter to each microprocessor, and the microprocessor of each product sets it on each microprocessor in comparison with the custom code transmitted. If the code matches the custom code information, the product-specific operation is controlled.

4 is a control flowchart of a microprocessor using an IR code method.

The control of the VCR microprocessor 420 described in FIG. 4 is controlled by the master microprocessor 460, which is the same method as the conventional method, and five lines, that is, a data input / output line, a clock line, a strobe line, and a reset line. The configuration of the TV microprocessor 400 and the CD-OK microprocessor 440 will be described in the case of controlling by using an IR code method. However, the control using the IR code under the control of the VCR microprocessor 420 according to the type of each microprocessor is described in FIG.

In addition, the microprocessor shown in FIG. 4 is the same as the microprocessor shown in FIG. That is, the first microprocessor of FIG. 1 is the same as the TV microprocessor 400 of FIG. 4, the second microprocessor of FIG. 1 is the same as the VCR microprocessor 420 of FIG. 4, and the fourth microprocessor of FIG. Same as the CD-OK microprocessor 440 of FIG. 4, and the third microprocessor of FIG. 1 is the same as the master microprocessor 460 of FIG. Also, the positions of these microprocessors are the same as those shown in FIG.

The basic configuration of the block diagram shown in FIG. 4 includes a TV microprocessor 400 for controlling the operation of a television receiver, a VCR microprocessor 420 for controlling the operation of a video cassette recorder, and a CD-OK system for controlling the operation. CD-OK microprocessor 440, IR code inputted through pre-amp 470 to command instructions from MBR (MULTI BREND REMOCON multi-brand remote control MBR) transmitter 480 The control signal of the IR code inputted through the TV microprocessor 400 to the TV microprocessor 400 and the CD-OK microprocessor 44, and the master for controlling the microprocessors (400, 420, 440) Microprocessor 460 is provided.

That is, the IR code type signal transmitted from the MBR transmitter 480 is received by the preamplifier 470, input to the IR data input of the master microprocessor 460, and outputted to the IR out.

The IR data output signal is input to the TV microprocessor 400 and the CD-OK microprocessor 420 so that only the relevant microprocessor of the microprocessors 400 and 420 operates.

Accordingly, the CD-OK is outputted to the data, clock, and strobe master microprocessor 460 by serial communication, and the TV microprocessor 420 is checked with the master microprocessor 460 by the power port.

FIG. 5 is a block diagram of the VCR microprocessor 500 also using the same IR code as the data transfer method of the TV microprocessor 520 and the CD-OK microprocessor 540 in FIG. The operation below is the same as described in FIG.

6 is an embodiment of the present invention.

Input IR signal from MBR transmitter to master microcomputer. (60 levels)

The input IR signal is simultaneously output from the master microcomputer to the VCR microcomputer, CD-OK microcomputer, and TV microcomputer. (Step 62)

Only the recognized product family executes the action. (Step 66)

As described above, in the present invention, a video cassette recorder and a CD-OK system are incorporated in a double / wide television receiver, and in particular, each product family controls each microprocessor, namely, a microprocessor of a television unit controlling a television, a video cassette recorder. It has a microprocessor of the video cassette recorder section, and a CD-OK section microprocessor controlling the CD-OK section, and a master microprocessor controlling the microprocessor dependently. The microprocessor carries out IR codes for signals output from the MBR transmitter. It accepts a signal and outputs it as an IR signal to each microprocessor to perform a simple and stable operation by controlling each microprocessor dependently.

Claims (3)

An apparatus for controlling a microprocessor of each product in a double / wide television receiver having a video cassette recorder and a CD-OK system, the apparatus comprising: an MBR transmitter for instructing operation execution; A television unit microprocessor for controlling the television; A microprocessor of the video cassette recorder unit for controlling the video cassette recorder; A CD-OK unit microprocessor for controlling the CD-OK unit; And a master microprocessor that controls the microprocessors to correspond to the instructions of the MBR transmitter and performs control operations necessary for matching between the products. A method of controlling a microprocessor of each product in a master microprocessor, comprising a microprocessor and a master microprocessor of each product in a double / wide television receiver having a video cassette recorder and a CD-OK system. Inputting an IR signal from the MBR transmitter to the master microprocessor; Simultaneously outputting an input IR signal from the master microprocessor to the microprocessor of the television, the microprocessor of the video cassette recorder and the CD-OK microprocessor; The microprocessors recognize a custom code set for each product; And executing only the recognized family of products. In the outputting step of claim 2, the IR code signal is output to a television microprocessor and a CD-OK microprocessor, and the video cassette recorder microprocessor outputs the input signal using a serial line. Control method of the microprocessor.